DMA-attributes.txt 6.9 KB

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  1. ==============
  2. DMA attributes
  3. ==============
  4. This document describes the semantics of the DMA attributes that are
  5. defined in linux/dma-mapping.h.
  6. DMA_ATTR_WRITE_BARRIER
  7. ----------------------
  8. DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA
  9. to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces
  10. all pending DMA writes to complete, and thus provides a mechanism to
  11. strictly order DMA from a device across all intervening busses and
  12. bridges. This barrier is not specific to a particular type of
  13. interconnect, it applies to the system as a whole, and so its
  14. implementation must account for the idiosyncrasies of the system all
  15. the way from the DMA device to memory.
  16. As an example of a situation where DMA_ATTR_WRITE_BARRIER would be
  17. useful, suppose that a device does a DMA write to indicate that data is
  18. ready and available in memory. The DMA of the "completion indication"
  19. could race with data DMA. Mapping the memory used for completion
  20. indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
  21. DMA_ATTR_WEAK_ORDERING
  22. ----------------------
  23. DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
  24. may be weakly ordered, that is that reads and writes may pass each other.
  25. Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
  26. those that do not will simply ignore the attribute and exhibit default
  27. behavior.
  28. DMA_ATTR_WRITE_COMBINE
  29. ----------------------
  30. DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
  31. buffered to improve performance.
  32. Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
  33. those that do not will simply ignore the attribute and exhibit default
  34. behavior.
  35. DMA_ATTR_NON_CONSISTENT
  36. -----------------------
  37. DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
  38. consistent or non-consistent memory as it sees fit. By using this API,
  39. you are guaranteeing to the platform that you have all the correct and
  40. necessary sync points for this memory in the driver.
  41. DMA_ATTR_NO_KERNEL_MAPPING
  42. --------------------------
  43. DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel
  44. virtual mapping for the allocated buffer. On some architectures creating
  45. such mapping is non-trivial task and consumes very limited resources
  46. (like kernel virtual address space or dma consistent address space).
  47. Buffers allocated with this attribute can be only passed to user space
  48. by calling dma_mmap_attrs(). By using this API, you are guaranteeing
  49. that you won't dereference the pointer returned by dma_alloc_attr(). You
  50. can treat it as a cookie that must be passed to dma_mmap_attrs() and
  51. dma_free_attrs(). Make sure that both of these also get this attribute
  52. set on each call.
  53. Since it is optional for platforms to implement
  54. DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
  55. attribute and exhibit default behavior.
  56. DMA_ATTR_SKIP_CPU_SYNC
  57. ----------------------
  58. By default dma_map_{single,page,sg} functions family transfer a given
  59. buffer from CPU domain to device domain. Some advanced use cases might
  60. require sharing a buffer between more than one device. This requires
  61. having a mapping created separately for each device and is usually
  62. performed by calling dma_map_{single,page,sg} function more than once
  63. for the given buffer with device pointer to each device taking part in
  64. the buffer sharing. The first call transfers a buffer from 'CPU' domain
  65. to 'device' domain, what synchronizes CPU caches for the given region
  66. (usually it means that the cache has been flushed or invalidated
  67. depending on the dma direction). However, next calls to
  68. dma_map_{single,page,sg}() for other devices will perform exactly the
  69. same synchronization operation on the CPU cache. CPU cache synchronization
  70. might be a time consuming operation, especially if the buffers are
  71. large, so it is highly recommended to avoid it if possible.
  72. DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of
  73. the CPU cache for the given buffer assuming that it has been already
  74. transferred to 'device' domain. This attribute can be also used for
  75. dma_unmap_{single,page,sg} functions family to force buffer to stay in
  76. device domain after releasing a mapping for it. Use this attribute with
  77. care!
  78. DMA_ATTR_FORCE_CONTIGUOUS
  79. -------------------------
  80. By default DMA-mapping subsystem is allowed to assemble the buffer
  81. allocated by dma_alloc_attrs() function from individual pages if it can
  82. be mapped as contiguous chunk into device dma address space. By
  83. specifying this attribute the allocated buffer is forced to be contiguous
  84. also in physical memory.
  85. DMA_ATTR_ALLOC_SINGLE_PAGES
  86. ---------------------------
  87. This is a hint to the DMA-mapping subsystem that it's probably not worth
  88. the time to try to allocate memory to in a way that gives better TLB
  89. efficiency (AKA it's not worth trying to build the mapping out of larger
  90. pages). You might want to specify this if:
  91. - You know that the accesses to this memory won't thrash the TLB.
  92. You might know that the accesses are likely to be sequential or
  93. that they aren't sequential but it's unlikely you'll ping-pong
  94. between many addresses that are likely to be in different physical
  95. pages.
  96. - You know that the penalty of TLB misses while accessing the
  97. memory will be small enough to be inconsequential. If you are
  98. doing a heavy operation like decryption or decompression this
  99. might be the case.
  100. - You know that the DMA mapping is fairly transitory. If you expect
  101. the mapping to have a short lifetime then it may be worth it to
  102. optimize allocation (avoid coming up with large pages) instead of
  103. getting the slight performance win of larger pages.
  104. Setting this hint doesn't guarantee that you won't get huge pages, but it
  105. means that we won't try quite as hard to get them.
  106. .. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM,
  107. though ARM64 patches will likely be posted soon.
  108. DMA_ATTR_NO_WARN
  109. ----------------
  110. This tells the DMA-mapping subsystem to suppress allocation failure reports
  111. (similarly to __GFP_NOWARN).
  112. On some architectures allocation failures are reported with error messages
  113. to the system logs. Although this can help to identify and debug problems,
  114. drivers which handle failures (eg, retry later) have no problems with them,
  115. and can actually flood the system logs with error messages that aren't any
  116. problem at all, depending on the implementation of the retry mechanism.
  117. So, this provides a way for drivers to avoid those error messages on calls
  118. where allocation failures are not a problem, and shouldn't bother the logs.
  119. .. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC.
  120. DMA_ATTR_PRIVILEGED
  121. -------------------
  122. Some advanced peripherals such as remote processors and GPUs perform
  123. accesses to DMA buffers in both privileged "supervisor" and unprivileged
  124. "user" modes. This attribute is used to indicate to the DMA-mapping
  125. subsystem that the buffer is fully accessible at the elevated privilege
  126. level (and ideally inaccessible or at least read-only at the
  127. lesser-privileged levels).