ccu_sdm.c 4.4 KB

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  1. /*
  2. * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. */
  9. #include <linux/clk-provider.h>
  10. #include <linux/spinlock.h>
  11. #include "ccu_sdm.h"
  12. bool ccu_sdm_helper_is_enabled(struct ccu_common *common,
  13. struct ccu_sdm_internal *sdm)
  14. {
  15. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  16. return false;
  17. if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable))
  18. return false;
  19. return !!(readl(common->base + sdm->tuning_reg) & sdm->tuning_enable);
  20. }
  21. void ccu_sdm_helper_enable(struct ccu_common *common,
  22. struct ccu_sdm_internal *sdm,
  23. unsigned long rate)
  24. {
  25. unsigned long flags;
  26. unsigned int i;
  27. u32 reg;
  28. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  29. return;
  30. /* Set the pattern */
  31. for (i = 0; i < sdm->table_size; i++)
  32. if (sdm->table[i].rate == rate)
  33. writel(sdm->table[i].pattern,
  34. common->base + sdm->tuning_reg);
  35. /* Make sure SDM is enabled */
  36. spin_lock_irqsave(common->lock, flags);
  37. reg = readl(common->base + sdm->tuning_reg);
  38. writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg);
  39. spin_unlock_irqrestore(common->lock, flags);
  40. spin_lock_irqsave(common->lock, flags);
  41. reg = readl(common->base + common->reg);
  42. writel(reg | sdm->enable, common->base + common->reg);
  43. spin_unlock_irqrestore(common->lock, flags);
  44. }
  45. void ccu_sdm_helper_disable(struct ccu_common *common,
  46. struct ccu_sdm_internal *sdm)
  47. {
  48. unsigned long flags;
  49. u32 reg;
  50. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  51. return;
  52. spin_lock_irqsave(common->lock, flags);
  53. reg = readl(common->base + common->reg);
  54. writel(reg & ~sdm->enable, common->base + common->reg);
  55. spin_unlock_irqrestore(common->lock, flags);
  56. spin_lock_irqsave(common->lock, flags);
  57. reg = readl(common->base + sdm->tuning_reg);
  58. writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg);
  59. spin_unlock_irqrestore(common->lock, flags);
  60. }
  61. /*
  62. * Sigma delta modulation provides a way to do fractional-N frequency
  63. * synthesis, in essence allowing the PLL to output any frequency
  64. * within its operational range. On earlier SoCs such as the A10/A20,
  65. * some PLLs support this. On later SoCs, all PLLs support this.
  66. *
  67. * The datasheets do not explain what the "wave top" and "wave bottom"
  68. * parameters mean or do, nor how to calculate the effective output
  69. * frequency. The only examples (and real world usage) are for the audio
  70. * PLL to generate 24.576 and 22.5792 MHz clock rates used by the audio
  71. * peripherals. The author lacks the underlying domain knowledge to
  72. * pursue this.
  73. *
  74. * The goal and function of the following code is to support the two
  75. * clock rates used by the audio subsystem, allowing for proper audio
  76. * playback and capture without any pitch or speed changes.
  77. */
  78. bool ccu_sdm_helper_has_rate(struct ccu_common *common,
  79. struct ccu_sdm_internal *sdm,
  80. unsigned long rate)
  81. {
  82. unsigned int i;
  83. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  84. return false;
  85. for (i = 0; i < sdm->table_size; i++)
  86. if (sdm->table[i].rate == rate)
  87. return true;
  88. return false;
  89. }
  90. unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common,
  91. struct ccu_sdm_internal *sdm,
  92. u32 m, u32 n)
  93. {
  94. unsigned int i;
  95. u32 reg;
  96. pr_debug("%s: Read sigma-delta modulation setting\n",
  97. clk_hw_get_name(&common->hw));
  98. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  99. return 0;
  100. pr_debug("%s: clock is sigma-delta modulated\n",
  101. clk_hw_get_name(&common->hw));
  102. reg = readl(common->base + sdm->tuning_reg);
  103. pr_debug("%s: pattern reg is 0x%x",
  104. clk_hw_get_name(&common->hw), reg);
  105. for (i = 0; i < sdm->table_size; i++)
  106. if (sdm->table[i].pattern == reg &&
  107. sdm->table[i].m == m && sdm->table[i].n == n)
  108. return sdm->table[i].rate;
  109. /* We can't calculate the effective clock rate, so just fail. */
  110. return 0;
  111. }
  112. int ccu_sdm_helper_get_factors(struct ccu_common *common,
  113. struct ccu_sdm_internal *sdm,
  114. unsigned long rate,
  115. unsigned long *m, unsigned long *n)
  116. {
  117. unsigned int i;
  118. if (!(common->features & CCU_FEATURE_SIGMA_DELTA_MOD))
  119. return -EINVAL;
  120. for (i = 0; i < sdm->table_size; i++)
  121. if (sdm->table[i].rate == rate) {
  122. *m = sdm->table[i].m;
  123. *n = sdm->table[i].n;
  124. return 0;
  125. }
  126. /* nothing found */
  127. return -EINVAL;
  128. }