u8500_hsem.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * u8500 HWSEM driver
  4. *
  5. * Copyright (C) 2010-2011 ST-Ericsson
  6. *
  7. * Implements u8500 semaphore handling for protocol 1, no interrupts.
  8. *
  9. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  10. * Heavily borrowed from the work of :
  11. * Simon Que <sque@ti.com>
  12. * Hari Kanigeri <h-kanigeri2@ti.com>
  13. * Ohad Ben-Cohen <ohad@wizery.com>
  14. */
  15. #include <linux/module.h>
  16. #include <linux/delay.h>
  17. #include <linux/io.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/hwspinlock.h>
  22. #include <linux/platform_device.h>
  23. #include "hwspinlock_internal.h"
  24. /*
  25. * Implementation of STE's HSem protocol 1 without interrutps.
  26. * The only masterID we allow is '0x01' to force people to use
  27. * HSems for synchronisation between processors rather than processes
  28. * on the ARM core.
  29. */
  30. #define U8500_MAX_SEMAPHORE 32 /* a total of 32 semaphore */
  31. #define RESET_SEMAPHORE (0) /* free */
  32. /*
  33. * CPU ID for master running u8500 kernel.
  34. * Hswpinlocks should only be used to synchonise operations
  35. * between the Cortex A9 core and the other CPUs. Hence
  36. * forcing the masterID to a preset value.
  37. */
  38. #define HSEM_MASTER_ID 0x01
  39. #define HSEM_REGISTER_OFFSET 0x08
  40. #define HSEM_CTRL_REG 0x00
  41. #define HSEM_ICRALL 0x90
  42. #define HSEM_PROTOCOL_1 0x01
  43. static int u8500_hsem_trylock(struct hwspinlock *lock)
  44. {
  45. void __iomem *lock_addr = lock->priv;
  46. writel(HSEM_MASTER_ID, lock_addr);
  47. /* get only first 4 bit and compare to masterID.
  48. * if equal, we have the semaphore, otherwise
  49. * someone else has it.
  50. */
  51. return (HSEM_MASTER_ID == (0x0F & readl(lock_addr)));
  52. }
  53. static void u8500_hsem_unlock(struct hwspinlock *lock)
  54. {
  55. void __iomem *lock_addr = lock->priv;
  56. /* release the lock by writing 0 to it */
  57. writel(RESET_SEMAPHORE, lock_addr);
  58. }
  59. /*
  60. * u8500: what value is recommended here ?
  61. */
  62. static void u8500_hsem_relax(struct hwspinlock *lock)
  63. {
  64. ndelay(50);
  65. }
  66. static const struct hwspinlock_ops u8500_hwspinlock_ops = {
  67. .trylock = u8500_hsem_trylock,
  68. .unlock = u8500_hsem_unlock,
  69. .relax = u8500_hsem_relax,
  70. };
  71. static int u8500_hsem_probe(struct platform_device *pdev)
  72. {
  73. struct hwspinlock_pdata *pdata = pdev->dev.platform_data;
  74. struct hwspinlock_device *bank;
  75. struct hwspinlock *hwlock;
  76. struct resource *res;
  77. void __iomem *io_base;
  78. int i, ret, num_locks = U8500_MAX_SEMAPHORE;
  79. ulong val;
  80. if (!pdata)
  81. return -ENODEV;
  82. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  83. if (!res)
  84. return -ENODEV;
  85. io_base = ioremap(res->start, resource_size(res));
  86. if (!io_base)
  87. return -ENOMEM;
  88. /* make sure protocol 1 is selected */
  89. val = readl(io_base + HSEM_CTRL_REG);
  90. writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG);
  91. /* clear all interrupts */
  92. writel(0xFFFF, io_base + HSEM_ICRALL);
  93. bank = kzalloc(struct_size(bank, lock, num_locks), GFP_KERNEL);
  94. if (!bank) {
  95. ret = -ENOMEM;
  96. goto iounmap_base;
  97. }
  98. platform_set_drvdata(pdev, bank);
  99. for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
  100. hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i;
  101. /* no pm needed for HSem but required to comply with hwspilock core */
  102. pm_runtime_enable(&pdev->dev);
  103. ret = hwspin_lock_register(bank, &pdev->dev, &u8500_hwspinlock_ops,
  104. pdata->base_id, num_locks);
  105. if (ret)
  106. goto reg_fail;
  107. return 0;
  108. reg_fail:
  109. pm_runtime_disable(&pdev->dev);
  110. kfree(bank);
  111. iounmap_base:
  112. iounmap(io_base);
  113. return ret;
  114. }
  115. static int u8500_hsem_remove(struct platform_device *pdev)
  116. {
  117. struct hwspinlock_device *bank = platform_get_drvdata(pdev);
  118. void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET;
  119. int ret;
  120. /* clear all interrupts */
  121. writel(0xFFFF, io_base + HSEM_ICRALL);
  122. ret = hwspin_lock_unregister(bank);
  123. if (ret) {
  124. dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
  125. return ret;
  126. }
  127. pm_runtime_disable(&pdev->dev);
  128. iounmap(io_base);
  129. kfree(bank);
  130. return 0;
  131. }
  132. static struct platform_driver u8500_hsem_driver = {
  133. .probe = u8500_hsem_probe,
  134. .remove = u8500_hsem_remove,
  135. .driver = {
  136. .name = "u8500_hsem",
  137. },
  138. };
  139. static int __init u8500_hsem_init(void)
  140. {
  141. return platform_driver_register(&u8500_hsem_driver);
  142. }
  143. /* board init code might need to reserve hwspinlocks for predefined purposes */
  144. postcore_initcall(u8500_hsem_init);
  145. static void __exit u8500_hsem_exit(void)
  146. {
  147. platform_driver_unregister(&u8500_hsem_driver);
  148. }
  149. module_exit(u8500_hsem_exit);
  150. MODULE_LICENSE("GPL v2");
  151. MODULE_DESCRIPTION("Hardware Spinlock driver for u8500");
  152. MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");