main.c 44 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Main component of the bnxt_re driver
  37. */
  38. #include <linux/module.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mutex.h>
  42. #include <linux/list.h>
  43. #include <linux/rculist.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/pci.h>
  46. #include <net/dcbnl.h>
  47. #include <net/ipv6.h>
  48. #include <net/addrconf.h>
  49. #include <linux/if_ether.h>
  50. #include <rdma/ib_verbs.h>
  51. #include <rdma/ib_user_verbs.h>
  52. #include <rdma/ib_umem.h>
  53. #include <rdma/ib_addr.h>
  54. #include "bnxt_ulp.h"
  55. #include "roce_hsi.h"
  56. #include "qplib_res.h"
  57. #include "qplib_sp.h"
  58. #include "qplib_fp.h"
  59. #include "qplib_rcfw.h"
  60. #include "bnxt_re.h"
  61. #include "ib_verbs.h"
  62. #include <rdma/bnxt_re-abi.h>
  63. #include "bnxt.h"
  64. #include "hw_counters.h"
  65. static char version[] =
  66. BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n";
  67. MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
  68. MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
  69. MODULE_LICENSE("Dual BSD/GPL");
  70. /* globals */
  71. static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
  72. /* Mutex to protect the list of bnxt_re devices added */
  73. static DEFINE_MUTEX(bnxt_re_dev_lock);
  74. static struct workqueue_struct *bnxt_re_wq;
  75. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
  76. /* SR-IOV helper functions */
  77. static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
  78. {
  79. struct bnxt *bp;
  80. bp = netdev_priv(rdev->en_dev->net);
  81. if (BNXT_VF(bp))
  82. rdev->is_virtfn = 1;
  83. }
  84. /* Set the maximum number of each resource that the driver actually wants
  85. * to allocate. This may be up to the maximum number the firmware has
  86. * reserved for the function. The driver may choose to allocate fewer
  87. * resources than the firmware maximum.
  88. */
  89. static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
  90. {
  91. u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0;
  92. u32 i;
  93. u32 vf_pct;
  94. u32 num_vfs;
  95. struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
  96. rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
  97. dev_attr->max_qp);
  98. rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
  99. /* Use max_mr from fw since max_mrw does not get set */
  100. rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count,
  101. dev_attr->max_mr);
  102. rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
  103. dev_attr->max_srq);
  104. rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT,
  105. dev_attr->max_cq);
  106. for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
  107. rdev->qplib_ctx.tqm_count[i] =
  108. rdev->dev_attr.tqm_alloc_reqs[i];
  109. if (rdev->num_vfs) {
  110. /*
  111. * Reserve a set of resources for the PF. Divide the remaining
  112. * resources among the VFs
  113. */
  114. vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
  115. num_vfs = 100 * rdev->num_vfs;
  116. vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs;
  117. vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs;
  118. vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs;
  119. /*
  120. * The driver allows many more MRs than other resources. If the
  121. * firmware does also, then reserve a fixed amount for the PF
  122. * and divide the rest among VFs. VFs may use many MRs for NFS
  123. * mounts, ISER, NVME applications, etc. If the firmware
  124. * severely restricts the number of MRs, then let PF have
  125. * half and divide the rest among VFs, as for the other
  126. * resource types.
  127. */
  128. if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K)
  129. vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs;
  130. else
  131. vf_mrws = (rdev->qplib_ctx.mrw_count -
  132. BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs;
  133. vf_gids = BNXT_RE_MAX_GID_PER_VF;
  134. }
  135. rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws;
  136. rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids;
  137. rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps;
  138. rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs;
  139. rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs;
  140. }
  141. /* for handling bnxt_en callbacks later */
  142. static void bnxt_re_stop(void *p)
  143. {
  144. }
  145. static void bnxt_re_start(void *p)
  146. {
  147. }
  148. static void bnxt_re_sriov_config(void *p, int num_vfs)
  149. {
  150. struct bnxt_re_dev *rdev = p;
  151. if (!rdev)
  152. return;
  153. rdev->num_vfs = num_vfs;
  154. bnxt_re_set_resource_limits(rdev);
  155. bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
  156. &rdev->qplib_ctx);
  157. }
  158. static void bnxt_re_shutdown(void *p)
  159. {
  160. struct bnxt_re_dev *rdev = p;
  161. if (!rdev)
  162. return;
  163. bnxt_re_ib_unreg(rdev);
  164. }
  165. static void bnxt_re_stop_irq(void *handle)
  166. {
  167. struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
  168. struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
  169. struct bnxt_qplib_nq *nq;
  170. int indx;
  171. for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
  172. nq = &rdev->nq[indx - 1];
  173. bnxt_qplib_nq_stop_irq(nq, false);
  174. }
  175. bnxt_qplib_rcfw_stop_irq(rcfw, false);
  176. }
  177. static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
  178. {
  179. struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
  180. struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
  181. struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
  182. struct bnxt_qplib_nq *nq;
  183. int indx, rc;
  184. if (!ent) {
  185. /* Not setting the f/w timeout bit in rcfw.
  186. * During the driver unload the first command
  187. * to f/w will timeout and that will set the
  188. * timeout bit.
  189. */
  190. dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n");
  191. return;
  192. }
  193. /* Vectors may change after restart, so update with new vectors
  194. * in device sctructure.
  195. */
  196. for (indx = 0; indx < rdev->num_msix; indx++)
  197. rdev->msix_entries[indx].vector = ent[indx].vector;
  198. bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
  199. false);
  200. for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
  201. nq = &rdev->nq[indx - 1];
  202. rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
  203. msix_ent[indx].vector, false);
  204. if (rc)
  205. dev_warn(rdev_to_dev(rdev),
  206. "Failed to reinit NQ index %d\n", indx - 1);
  207. }
  208. }
  209. static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
  210. .ulp_async_notifier = NULL,
  211. .ulp_stop = bnxt_re_stop,
  212. .ulp_start = bnxt_re_start,
  213. .ulp_sriov_config = bnxt_re_sriov_config,
  214. .ulp_shutdown = bnxt_re_shutdown,
  215. .ulp_irq_stop = bnxt_re_stop_irq,
  216. .ulp_irq_restart = bnxt_re_start_irq
  217. };
  218. /* RoCE -> Net driver */
  219. /* Driver registration routines used to let the networking driver (bnxt_en)
  220. * to know that the RoCE driver is now installed
  221. */
  222. static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
  223. {
  224. struct bnxt_en_dev *en_dev;
  225. int rc;
  226. if (!rdev)
  227. return -EINVAL;
  228. en_dev = rdev->en_dev;
  229. rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
  230. BNXT_ROCE_ULP);
  231. return rc;
  232. }
  233. static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
  234. {
  235. struct bnxt_en_dev *en_dev;
  236. int rc = 0;
  237. if (!rdev)
  238. return -EINVAL;
  239. en_dev = rdev->en_dev;
  240. rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
  241. &bnxt_re_ulp_ops, rdev);
  242. return rc;
  243. }
  244. static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
  245. {
  246. struct bnxt_en_dev *en_dev;
  247. int rc;
  248. if (!rdev)
  249. return -EINVAL;
  250. en_dev = rdev->en_dev;
  251. rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
  252. return rc;
  253. }
  254. static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
  255. {
  256. int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
  257. struct bnxt_en_dev *en_dev;
  258. if (!rdev)
  259. return -EINVAL;
  260. en_dev = rdev->en_dev;
  261. num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
  262. num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
  263. rdev->msix_entries,
  264. num_msix_want);
  265. if (num_msix_got < BNXT_RE_MIN_MSIX) {
  266. rc = -EINVAL;
  267. goto done;
  268. }
  269. if (num_msix_got != num_msix_want) {
  270. dev_warn(rdev_to_dev(rdev),
  271. "Requested %d MSI-X vectors, got %d\n",
  272. num_msix_want, num_msix_got);
  273. }
  274. rdev->num_msix = num_msix_got;
  275. done:
  276. return rc;
  277. }
  278. static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
  279. u16 opcd, u16 crid, u16 trid)
  280. {
  281. hdr->req_type = cpu_to_le16(opcd);
  282. hdr->cmpl_ring = cpu_to_le16(crid);
  283. hdr->target_id = cpu_to_le16(trid);
  284. }
  285. static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
  286. int msg_len, void *resp, int resp_max_len,
  287. int timeout)
  288. {
  289. fw_msg->msg = msg;
  290. fw_msg->msg_len = msg_len;
  291. fw_msg->resp = resp;
  292. fw_msg->resp_max_len = resp_max_len;
  293. fw_msg->timeout = timeout;
  294. }
  295. static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id)
  296. {
  297. struct bnxt_en_dev *en_dev = rdev->en_dev;
  298. struct hwrm_ring_free_input req = {0};
  299. struct hwrm_ring_free_output resp;
  300. struct bnxt_fw_msg fw_msg;
  301. int rc = -EINVAL;
  302. if (!en_dev)
  303. return rc;
  304. memset(&fw_msg, 0, sizeof(fw_msg));
  305. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
  306. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  307. req.ring_id = cpu_to_le16(fw_ring_id);
  308. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  309. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  310. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  311. if (rc)
  312. dev_err(rdev_to_dev(rdev),
  313. "Failed to free HW ring:%d :%#x", req.ring_id, rc);
  314. return rc;
  315. }
  316. static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
  317. int pages, int type, u32 ring_mask,
  318. u32 map_index, u16 *fw_ring_id)
  319. {
  320. struct bnxt_en_dev *en_dev = rdev->en_dev;
  321. struct hwrm_ring_alloc_input req = {0};
  322. struct hwrm_ring_alloc_output resp;
  323. struct bnxt_fw_msg fw_msg;
  324. int rc = -EINVAL;
  325. if (!en_dev)
  326. return rc;
  327. memset(&fw_msg, 0, sizeof(fw_msg));
  328. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
  329. req.enables = 0;
  330. req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
  331. if (pages > 1) {
  332. /* Page size is in log2 units */
  333. req.page_size = BNXT_PAGE_SHIFT;
  334. req.page_tbl_depth = 1;
  335. }
  336. req.fbo = 0;
  337. /* Association of ring index with doorbell index and MSIX number */
  338. req.logical_id = cpu_to_le16(map_index);
  339. req.length = cpu_to_le32(ring_mask + 1);
  340. req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
  341. req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
  342. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  343. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  344. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  345. if (!rc)
  346. *fw_ring_id = le16_to_cpu(resp.ring_id);
  347. return rc;
  348. }
  349. static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
  350. u32 fw_stats_ctx_id)
  351. {
  352. struct bnxt_en_dev *en_dev = rdev->en_dev;
  353. struct hwrm_stat_ctx_free_input req = {0};
  354. struct bnxt_fw_msg fw_msg;
  355. int rc = -EINVAL;
  356. if (!en_dev)
  357. return rc;
  358. memset(&fw_msg, 0, sizeof(fw_msg));
  359. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
  360. req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
  361. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
  362. sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
  363. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  364. if (rc)
  365. dev_err(rdev_to_dev(rdev),
  366. "Failed to free HW stats context %#x", rc);
  367. return rc;
  368. }
  369. static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
  370. dma_addr_t dma_map,
  371. u32 *fw_stats_ctx_id)
  372. {
  373. struct hwrm_stat_ctx_alloc_output resp = {0};
  374. struct hwrm_stat_ctx_alloc_input req = {0};
  375. struct bnxt_en_dev *en_dev = rdev->en_dev;
  376. struct bnxt_fw_msg fw_msg;
  377. int rc = -EINVAL;
  378. *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
  379. if (!en_dev)
  380. return rc;
  381. memset(&fw_msg, 0, sizeof(fw_msg));
  382. bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
  383. req.update_period_ms = cpu_to_le32(1000);
  384. req.stats_dma_addr = cpu_to_le64(dma_map);
  385. req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
  386. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  387. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  388. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  389. if (!rc)
  390. *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
  391. return rc;
  392. }
  393. /* Device */
  394. static bool is_bnxt_re_dev(struct net_device *netdev)
  395. {
  396. struct ethtool_drvinfo drvinfo;
  397. if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
  398. memset(&drvinfo, 0, sizeof(drvinfo));
  399. netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
  400. if (strcmp(drvinfo.driver, "bnxt_en"))
  401. return false;
  402. return true;
  403. }
  404. return false;
  405. }
  406. static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
  407. {
  408. struct bnxt_re_dev *rdev;
  409. rcu_read_lock();
  410. list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
  411. if (rdev->netdev == netdev) {
  412. rcu_read_unlock();
  413. return rdev;
  414. }
  415. }
  416. rcu_read_unlock();
  417. return NULL;
  418. }
  419. static void bnxt_re_dev_unprobe(struct net_device *netdev,
  420. struct bnxt_en_dev *en_dev)
  421. {
  422. dev_put(netdev);
  423. module_put(en_dev->pdev->driver->driver.owner);
  424. }
  425. static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
  426. {
  427. struct bnxt *bp = netdev_priv(netdev);
  428. struct bnxt_en_dev *en_dev;
  429. struct pci_dev *pdev;
  430. /* Call bnxt_en's RoCE probe via indirect API */
  431. if (!bp->ulp_probe)
  432. return ERR_PTR(-EINVAL);
  433. en_dev = bp->ulp_probe(netdev);
  434. if (IS_ERR(en_dev))
  435. return en_dev;
  436. pdev = en_dev->pdev;
  437. if (!pdev)
  438. return ERR_PTR(-EINVAL);
  439. if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
  440. dev_info(&pdev->dev,
  441. "%s: probe error: RoCE is not supported on this device",
  442. ROCE_DRV_MODULE_NAME);
  443. return ERR_PTR(-ENODEV);
  444. }
  445. /* Bump net device reference count */
  446. if (!try_module_get(pdev->driver->driver.owner))
  447. return ERR_PTR(-ENODEV);
  448. dev_hold(netdev);
  449. return en_dev;
  450. }
  451. static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
  452. {
  453. ib_unregister_device(&rdev->ibdev);
  454. }
  455. static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
  456. {
  457. struct ib_device *ibdev = &rdev->ibdev;
  458. /* ib device init */
  459. ibdev->owner = THIS_MODULE;
  460. ibdev->node_type = RDMA_NODE_IB_CA;
  461. strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX);
  462. strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
  463. strlen(BNXT_RE_DESC) + 5);
  464. ibdev->phys_port_cnt = 1;
  465. bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
  466. ibdev->num_comp_vectors = 1;
  467. ibdev->dev.parent = &rdev->en_dev->pdev->dev;
  468. ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
  469. /* User space */
  470. ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION;
  471. ibdev->uverbs_cmd_mask =
  472. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  473. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  474. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  475. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  476. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  477. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  478. (1ull << IB_USER_VERBS_CMD_REREG_MR) |
  479. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  480. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  481. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  482. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  483. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  484. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  485. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  486. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  487. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  488. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  489. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  490. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  491. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  492. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  493. (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
  494. (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
  495. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  496. /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
  497. /* Kernel verbs */
  498. ibdev->query_device = bnxt_re_query_device;
  499. ibdev->modify_device = bnxt_re_modify_device;
  500. ibdev->query_port = bnxt_re_query_port;
  501. ibdev->get_port_immutable = bnxt_re_get_port_immutable;
  502. ibdev->get_dev_fw_str = bnxt_re_query_fw_str;
  503. ibdev->query_pkey = bnxt_re_query_pkey;
  504. ibdev->get_netdev = bnxt_re_get_netdev;
  505. ibdev->add_gid = bnxt_re_add_gid;
  506. ibdev->del_gid = bnxt_re_del_gid;
  507. ibdev->get_link_layer = bnxt_re_get_link_layer;
  508. ibdev->alloc_pd = bnxt_re_alloc_pd;
  509. ibdev->dealloc_pd = bnxt_re_dealloc_pd;
  510. ibdev->create_ah = bnxt_re_create_ah;
  511. ibdev->modify_ah = bnxt_re_modify_ah;
  512. ibdev->query_ah = bnxt_re_query_ah;
  513. ibdev->destroy_ah = bnxt_re_destroy_ah;
  514. ibdev->create_srq = bnxt_re_create_srq;
  515. ibdev->modify_srq = bnxt_re_modify_srq;
  516. ibdev->query_srq = bnxt_re_query_srq;
  517. ibdev->destroy_srq = bnxt_re_destroy_srq;
  518. ibdev->post_srq_recv = bnxt_re_post_srq_recv;
  519. ibdev->create_qp = bnxt_re_create_qp;
  520. ibdev->modify_qp = bnxt_re_modify_qp;
  521. ibdev->query_qp = bnxt_re_query_qp;
  522. ibdev->destroy_qp = bnxt_re_destroy_qp;
  523. ibdev->post_send = bnxt_re_post_send;
  524. ibdev->post_recv = bnxt_re_post_recv;
  525. ibdev->create_cq = bnxt_re_create_cq;
  526. ibdev->destroy_cq = bnxt_re_destroy_cq;
  527. ibdev->poll_cq = bnxt_re_poll_cq;
  528. ibdev->req_notify_cq = bnxt_re_req_notify_cq;
  529. ibdev->get_dma_mr = bnxt_re_get_dma_mr;
  530. ibdev->dereg_mr = bnxt_re_dereg_mr;
  531. ibdev->alloc_mr = bnxt_re_alloc_mr;
  532. ibdev->map_mr_sg = bnxt_re_map_mr_sg;
  533. ibdev->reg_user_mr = bnxt_re_reg_user_mr;
  534. ibdev->alloc_ucontext = bnxt_re_alloc_ucontext;
  535. ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext;
  536. ibdev->mmap = bnxt_re_mmap;
  537. ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats;
  538. ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats;
  539. ibdev->driver_id = RDMA_DRIVER_BNXT_RE;
  540. return ib_register_device(ibdev, NULL);
  541. }
  542. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  543. char *buf)
  544. {
  545. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  546. return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
  547. }
  548. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  549. char *buf)
  550. {
  551. struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev);
  552. return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
  553. }
  554. static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL);
  555. static DEVICE_ATTR(hca_type, 0444, show_hca, NULL);
  556. static struct device_attribute *bnxt_re_attributes[] = {
  557. &dev_attr_hw_rev,
  558. &dev_attr_hca_type
  559. };
  560. static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
  561. {
  562. dev_put(rdev->netdev);
  563. rdev->netdev = NULL;
  564. mutex_lock(&bnxt_re_dev_lock);
  565. list_del_rcu(&rdev->list);
  566. mutex_unlock(&bnxt_re_dev_lock);
  567. synchronize_rcu();
  568. ib_dealloc_device(&rdev->ibdev);
  569. /* rdev is gone */
  570. }
  571. static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
  572. struct bnxt_en_dev *en_dev)
  573. {
  574. struct bnxt_re_dev *rdev;
  575. /* Allocate bnxt_re_dev instance here */
  576. rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev));
  577. if (!rdev) {
  578. dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
  579. ROCE_DRV_MODULE_NAME);
  580. return NULL;
  581. }
  582. /* Default values */
  583. rdev->netdev = netdev;
  584. dev_hold(rdev->netdev);
  585. rdev->en_dev = en_dev;
  586. rdev->id = rdev->en_dev->pdev->devfn;
  587. INIT_LIST_HEAD(&rdev->qp_list);
  588. mutex_init(&rdev->qp_lock);
  589. atomic_set(&rdev->qp_count, 0);
  590. atomic_set(&rdev->cq_count, 0);
  591. atomic_set(&rdev->srq_count, 0);
  592. atomic_set(&rdev->mr_count, 0);
  593. atomic_set(&rdev->mw_count, 0);
  594. rdev->cosq[0] = 0xFFFF;
  595. rdev->cosq[1] = 0xFFFF;
  596. mutex_lock(&bnxt_re_dev_lock);
  597. list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
  598. mutex_unlock(&bnxt_re_dev_lock);
  599. return rdev;
  600. }
  601. static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
  602. *unaffi_async)
  603. {
  604. switch (unaffi_async->event) {
  605. case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
  606. break;
  607. case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
  608. break;
  609. case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
  610. break;
  611. case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
  612. break;
  613. case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
  614. break;
  615. case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
  616. break;
  617. case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
  618. break;
  619. case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
  620. break;
  621. case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
  622. break;
  623. case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
  624. break;
  625. case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
  626. break;
  627. default:
  628. return -EINVAL;
  629. }
  630. return 0;
  631. }
  632. static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
  633. struct bnxt_re_qp *qp)
  634. {
  635. struct ib_event event;
  636. unsigned int flags;
  637. if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
  638. rdma_is_kernel_res(&qp->ib_qp.res)) {
  639. flags = bnxt_re_lock_cqs(qp);
  640. bnxt_qplib_add_flush_qp(&qp->qplib_qp);
  641. bnxt_re_unlock_cqs(qp, flags);
  642. }
  643. memset(&event, 0, sizeof(event));
  644. if (qp->qplib_qp.srq) {
  645. event.device = &qp->rdev->ibdev;
  646. event.element.qp = &qp->ib_qp;
  647. event.event = IB_EVENT_QP_LAST_WQE_REACHED;
  648. }
  649. if (event.device && qp->ib_qp.event_handler)
  650. qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
  651. return 0;
  652. }
  653. static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
  654. void *obj)
  655. {
  656. int rc = 0;
  657. u8 event;
  658. if (!obj)
  659. return rc; /* QP was already dead, still return success */
  660. event = affi_async->event;
  661. if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
  662. struct bnxt_qplib_qp *lib_qp = obj;
  663. struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
  664. qplib_qp);
  665. rc = bnxt_re_handle_qp_async_event(affi_async, qp);
  666. }
  667. return rc;
  668. }
  669. static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
  670. void *aeqe, void *obj)
  671. {
  672. struct creq_qp_event *affi_async;
  673. struct creq_func_event *unaffi_async;
  674. u8 type;
  675. int rc;
  676. type = ((struct creq_base *)aeqe)->type;
  677. if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
  678. unaffi_async = aeqe;
  679. rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
  680. } else {
  681. affi_async = aeqe;
  682. rc = bnxt_re_handle_affi_async_event(affi_async, obj);
  683. }
  684. return rc;
  685. }
  686. static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
  687. struct bnxt_qplib_srq *handle, u8 event)
  688. {
  689. struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
  690. qplib_srq);
  691. struct ib_event ib_event;
  692. int rc = 0;
  693. if (!srq) {
  694. dev_err(NULL, "%s: SRQ is NULL, SRQN not handled",
  695. ROCE_DRV_MODULE_NAME);
  696. rc = -EINVAL;
  697. goto done;
  698. }
  699. ib_event.device = &srq->rdev->ibdev;
  700. ib_event.element.srq = &srq->ib_srq;
  701. if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
  702. ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
  703. else
  704. ib_event.event = IB_EVENT_SRQ_ERR;
  705. if (srq->ib_srq.event_handler) {
  706. /* Lock event_handler? */
  707. (*srq->ib_srq.event_handler)(&ib_event,
  708. srq->ib_srq.srq_context);
  709. }
  710. done:
  711. return rc;
  712. }
  713. static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
  714. struct bnxt_qplib_cq *handle)
  715. {
  716. struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
  717. qplib_cq);
  718. if (!cq) {
  719. dev_err(NULL, "%s: CQ is NULL, CQN not handled",
  720. ROCE_DRV_MODULE_NAME);
  721. return -EINVAL;
  722. }
  723. if (cq->ib_cq.comp_handler) {
  724. /* Lock comp_handler? */
  725. (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
  726. }
  727. return 0;
  728. }
  729. static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
  730. {
  731. int i;
  732. for (i = 1; i < rdev->num_msix; i++)
  733. bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
  734. if (rdev->qplib_res.rcfw)
  735. bnxt_qplib_cleanup_res(&rdev->qplib_res);
  736. }
  737. static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
  738. {
  739. int rc = 0, i;
  740. int num_vec_enabled = 0;
  741. bnxt_qplib_init_res(&rdev->qplib_res);
  742. for (i = 1; i < rdev->num_msix ; i++) {
  743. rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
  744. i - 1, rdev->msix_entries[i].vector,
  745. rdev->msix_entries[i].db_offset,
  746. &bnxt_re_cqn_handler,
  747. &bnxt_re_srqn_handler);
  748. if (rc) {
  749. dev_err(rdev_to_dev(rdev),
  750. "Failed to enable NQ with rc = 0x%x", rc);
  751. goto fail;
  752. }
  753. num_vec_enabled++;
  754. }
  755. return 0;
  756. fail:
  757. for (i = num_vec_enabled; i >= 0; i--)
  758. bnxt_qplib_disable_nq(&rdev->nq[i]);
  759. return rc;
  760. }
  761. static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
  762. {
  763. int i;
  764. for (i = 0; i < rdev->num_msix - 1; i++) {
  765. bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id);
  766. bnxt_qplib_free_nq(&rdev->nq[i]);
  767. }
  768. }
  769. static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
  770. {
  771. bnxt_re_free_nq_res(rdev);
  772. if (rdev->qplib_res.dpi_tbl.max) {
  773. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  774. &rdev->qplib_res.dpi_tbl,
  775. &rdev->dpi_privileged);
  776. }
  777. if (rdev->qplib_res.rcfw) {
  778. bnxt_qplib_free_res(&rdev->qplib_res);
  779. rdev->qplib_res.rcfw = NULL;
  780. }
  781. }
  782. static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
  783. {
  784. int rc = 0, i;
  785. int num_vec_created = 0;
  786. /* Configure and allocate resources for qplib */
  787. rdev->qplib_res.rcfw = &rdev->rcfw;
  788. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
  789. rdev->is_virtfn);
  790. if (rc)
  791. goto fail;
  792. rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
  793. rdev->netdev, &rdev->dev_attr);
  794. if (rc)
  795. goto fail;
  796. rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
  797. &rdev->dpi_privileged,
  798. rdev);
  799. if (rc)
  800. goto dealloc_res;
  801. for (i = 0; i < rdev->num_msix - 1; i++) {
  802. rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
  803. BNXT_RE_MAX_SRQC_COUNT + 2;
  804. rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
  805. if (rc) {
  806. dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x",
  807. i, rc);
  808. goto free_nq;
  809. }
  810. rc = bnxt_re_net_ring_alloc
  811. (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr,
  812. rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count,
  813. HWRM_RING_ALLOC_CMPL,
  814. BNXT_QPLIB_NQE_MAX_CNT - 1,
  815. rdev->msix_entries[i + 1].ring_idx,
  816. &rdev->nq[i].ring_id);
  817. if (rc) {
  818. dev_err(rdev_to_dev(rdev),
  819. "Failed to allocate NQ fw id with rc = 0x%x",
  820. rc);
  821. bnxt_qplib_free_nq(&rdev->nq[i]);
  822. goto free_nq;
  823. }
  824. num_vec_created++;
  825. }
  826. return 0;
  827. free_nq:
  828. for (i = num_vec_created; i >= 0; i--) {
  829. bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id);
  830. bnxt_qplib_free_nq(&rdev->nq[i]);
  831. }
  832. bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
  833. &rdev->qplib_res.dpi_tbl,
  834. &rdev->dpi_privileged);
  835. dealloc_res:
  836. bnxt_qplib_free_res(&rdev->qplib_res);
  837. fail:
  838. rdev->qplib_res.rcfw = NULL;
  839. return rc;
  840. }
  841. static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
  842. u8 port_num, enum ib_event_type event)
  843. {
  844. struct ib_event ib_event;
  845. ib_event.device = ibdev;
  846. if (qp) {
  847. ib_event.element.qp = qp;
  848. ib_event.event = event;
  849. if (qp->event_handler)
  850. qp->event_handler(&ib_event, qp->qp_context);
  851. } else {
  852. ib_event.element.port_num = port_num;
  853. ib_event.event = event;
  854. ib_dispatch_event(&ib_event);
  855. }
  856. }
  857. #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
  858. static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
  859. u64 *cid_map)
  860. {
  861. struct hwrm_queue_pri2cos_qcfg_input req = {0};
  862. struct bnxt *bp = netdev_priv(rdev->netdev);
  863. struct hwrm_queue_pri2cos_qcfg_output resp;
  864. struct bnxt_en_dev *en_dev = rdev->en_dev;
  865. struct bnxt_fw_msg fw_msg;
  866. u32 flags = 0;
  867. u8 *qcfgmap, *tmp_map;
  868. int rc = 0, i;
  869. if (!cid_map)
  870. return -EINVAL;
  871. memset(&fw_msg, 0, sizeof(fw_msg));
  872. bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
  873. HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
  874. flags |= (dir & 0x01);
  875. flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
  876. req.flags = cpu_to_le32(flags);
  877. req.port_id = bp->pf.port_id;
  878. bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
  879. sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
  880. rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
  881. if (rc)
  882. return rc;
  883. if (resp.queue_cfg_info) {
  884. dev_warn(rdev_to_dev(rdev),
  885. "Asymmetric cos queue configuration detected");
  886. dev_warn(rdev_to_dev(rdev),
  887. " on device, QoS may not be fully functional\n");
  888. }
  889. qcfgmap = &resp.pri0_cos_queue_id;
  890. tmp_map = (u8 *)cid_map;
  891. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  892. tmp_map[i] = qcfgmap[i];
  893. return rc;
  894. }
  895. static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
  896. struct bnxt_re_qp *qp)
  897. {
  898. return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
  899. }
  900. static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
  901. {
  902. int mask = IB_QP_STATE;
  903. struct ib_qp_attr qp_attr;
  904. struct bnxt_re_qp *qp;
  905. qp_attr.qp_state = IB_QPS_ERR;
  906. mutex_lock(&rdev->qp_lock);
  907. list_for_each_entry(qp, &rdev->qp_list, list) {
  908. /* Modify the state of all QPs except QP1/Shadow QP */
  909. if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
  910. if (qp->qplib_qp.state !=
  911. CMDQ_MODIFY_QP_NEW_STATE_RESET &&
  912. qp->qplib_qp.state !=
  913. CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  914. bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
  915. 1, IB_EVENT_QP_FATAL);
  916. bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
  917. NULL);
  918. }
  919. }
  920. }
  921. mutex_unlock(&rdev->qp_lock);
  922. }
  923. static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
  924. {
  925. struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
  926. struct bnxt_qplib_gid gid;
  927. u16 gid_idx, index;
  928. int rc = 0;
  929. if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  930. return 0;
  931. if (!sgid_tbl) {
  932. dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated");
  933. return -EINVAL;
  934. }
  935. for (index = 0; index < sgid_tbl->active; index++) {
  936. gid_idx = sgid_tbl->hw_id[index];
  937. if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
  938. sizeof(bnxt_qplib_gid_zero)))
  939. continue;
  940. /* need to modify the VLAN enable setting of non VLAN GID only
  941. * as setting is done for VLAN GID while adding GID
  942. */
  943. if (sgid_tbl->vlan[index])
  944. continue;
  945. memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
  946. rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
  947. rdev->qplib_res.netdev->dev_addr);
  948. }
  949. return rc;
  950. }
  951. static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
  952. {
  953. u32 prio_map = 0, tmp_map = 0;
  954. struct net_device *netdev;
  955. struct dcb_app app;
  956. netdev = rdev->netdev;
  957. memset(&app, 0, sizeof(app));
  958. app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
  959. app.protocol = ETH_P_IBOE;
  960. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  961. prio_map = tmp_map;
  962. app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
  963. app.protocol = ROCE_V2_UDP_DPORT;
  964. tmp_map = dcb_ieee_getapp_mask(netdev, &app);
  965. prio_map |= tmp_map;
  966. return prio_map;
  967. }
  968. static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
  969. {
  970. u16 prio;
  971. u8 id;
  972. for (prio = 0, id = 0; prio < 8; prio++) {
  973. if (prio_map & (1 << prio)) {
  974. cosq[id] = cid_map[prio];
  975. id++;
  976. if (id == 2) /* Max 2 tcs supported */
  977. break;
  978. }
  979. }
  980. }
  981. static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
  982. {
  983. u8 prio_map = 0;
  984. u64 cid_map;
  985. int rc;
  986. /* Get priority for roce */
  987. prio_map = bnxt_re_get_priority_mask(rdev);
  988. if (prio_map == rdev->cur_prio_map)
  989. return 0;
  990. rdev->cur_prio_map = prio_map;
  991. /* Get cosq id for this priority */
  992. rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
  993. if (rc) {
  994. dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
  995. return rc;
  996. }
  997. /* Parse CoS IDs for app priority */
  998. bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
  999. /* Config BONO. */
  1000. rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
  1001. if (rc) {
  1002. dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
  1003. rdev->cosq[0], rdev->cosq[1]);
  1004. return rc;
  1005. }
  1006. /* Actual priorities are not programmed as they are already
  1007. * done by L2 driver; just enable or disable priority vlan tagging
  1008. */
  1009. if ((prio_map == 0 && rdev->qplib_res.prio) ||
  1010. (prio_map != 0 && !rdev->qplib_res.prio)) {
  1011. rdev->qplib_res.prio = prio_map ? true : false;
  1012. bnxt_re_update_gid(rdev);
  1013. }
  1014. return 0;
  1015. }
  1016. static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
  1017. {
  1018. int i, rc;
  1019. if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
  1020. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++)
  1021. device_remove_file(&rdev->ibdev.dev,
  1022. bnxt_re_attributes[i]);
  1023. /* Cleanup ib dev */
  1024. bnxt_re_unregister_ib(rdev);
  1025. }
  1026. if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
  1027. cancel_delayed_work(&rdev->worker);
  1028. if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
  1029. &rdev->flags))
  1030. bnxt_re_cleanup_res(rdev);
  1031. if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
  1032. bnxt_re_free_res(rdev);
  1033. if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
  1034. rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
  1035. if (rc)
  1036. dev_warn(rdev_to_dev(rdev),
  1037. "Failed to deinitialize RCFW: %#x", rc);
  1038. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
  1039. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  1040. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  1041. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id);
  1042. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  1043. }
  1044. if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
  1045. rc = bnxt_re_free_msix(rdev);
  1046. if (rc)
  1047. dev_warn(rdev_to_dev(rdev),
  1048. "Failed to free MSI-X vectors: %#x", rc);
  1049. }
  1050. if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
  1051. rc = bnxt_re_unregister_netdev(rdev);
  1052. if (rc)
  1053. dev_warn(rdev_to_dev(rdev),
  1054. "Failed to unregister with netdev: %#x", rc);
  1055. }
  1056. }
  1057. /* worker thread for polling periodic events. Now used for QoS programming*/
  1058. static void bnxt_re_worker(struct work_struct *work)
  1059. {
  1060. struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
  1061. worker.work);
  1062. bnxt_re_setup_qos(rdev);
  1063. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  1064. }
  1065. static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
  1066. {
  1067. int i, j, rc;
  1068. bool locked;
  1069. /* Acquire rtnl lock through out this function */
  1070. rtnl_lock();
  1071. locked = true;
  1072. /* Registered a new RoCE device instance to netdev */
  1073. rc = bnxt_re_register_netdev(rdev);
  1074. if (rc) {
  1075. rtnl_unlock();
  1076. pr_err("Failed to register with netedev: %#x\n", rc);
  1077. return -EINVAL;
  1078. }
  1079. set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
  1080. /* Check whether VF or PF */
  1081. bnxt_re_get_sriov_func_type(rdev);
  1082. rc = bnxt_re_request_msix(rdev);
  1083. if (rc) {
  1084. pr_err("Failed to get MSI-X vectors: %#x\n", rc);
  1085. rc = -EINVAL;
  1086. goto fail;
  1087. }
  1088. set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
  1089. /* Establish RCFW Communication Channel to initialize the context
  1090. * memory for the function and all child VFs
  1091. */
  1092. rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
  1093. BNXT_RE_MAX_QPC_COUNT);
  1094. if (rc) {
  1095. pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
  1096. goto fail;
  1097. }
  1098. rc = bnxt_re_net_ring_alloc
  1099. (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr,
  1100. rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count,
  1101. HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1,
  1102. rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx,
  1103. &rdev->rcfw.creq_ring_id);
  1104. if (rc) {
  1105. pr_err("Failed to allocate CREQ: %#x\n", rc);
  1106. goto free_rcfw;
  1107. }
  1108. rc = bnxt_qplib_enable_rcfw_channel
  1109. (rdev->en_dev->pdev, &rdev->rcfw,
  1110. rdev->msix_entries[BNXT_RE_AEQ_IDX].vector,
  1111. rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset,
  1112. rdev->is_virtfn, &bnxt_re_aeq_handler);
  1113. if (rc) {
  1114. pr_err("Failed to enable RCFW channel: %#x\n", rc);
  1115. goto free_ring;
  1116. }
  1117. rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
  1118. rdev->is_virtfn);
  1119. if (rc)
  1120. goto disable_rcfw;
  1121. if (!rdev->is_virtfn)
  1122. bnxt_re_set_resource_limits(rdev);
  1123. rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0);
  1124. if (rc) {
  1125. pr_err("Failed to allocate QPLIB context: %#x\n", rc);
  1126. goto disable_rcfw;
  1127. }
  1128. rc = bnxt_re_net_stats_ctx_alloc(rdev,
  1129. rdev->qplib_ctx.stats.dma_map,
  1130. &rdev->qplib_ctx.stats.fw_id);
  1131. if (rc) {
  1132. pr_err("Failed to allocate stats context: %#x\n", rc);
  1133. goto free_ctx;
  1134. }
  1135. rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
  1136. rdev->is_virtfn);
  1137. if (rc) {
  1138. pr_err("Failed to initialize RCFW: %#x\n", rc);
  1139. goto free_sctx;
  1140. }
  1141. set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
  1142. /* Resources based on the 'new' device caps */
  1143. rc = bnxt_re_alloc_res(rdev);
  1144. if (rc) {
  1145. pr_err("Failed to allocate resources: %#x\n", rc);
  1146. goto fail;
  1147. }
  1148. set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
  1149. rc = bnxt_re_init_res(rdev);
  1150. if (rc) {
  1151. pr_err("Failed to initialize resources: %#x\n", rc);
  1152. goto fail;
  1153. }
  1154. set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
  1155. if (!rdev->is_virtfn) {
  1156. rc = bnxt_re_setup_qos(rdev);
  1157. if (rc)
  1158. pr_info("RoCE priority not yet configured\n");
  1159. INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
  1160. set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
  1161. schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
  1162. }
  1163. rtnl_unlock();
  1164. locked = false;
  1165. /* Register ib dev */
  1166. rc = bnxt_re_register_ib(rdev);
  1167. if (rc) {
  1168. pr_err("Failed to register with IB: %#x\n", rc);
  1169. goto fail;
  1170. }
  1171. set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
  1172. dev_info(rdev_to_dev(rdev), "Device registered successfully");
  1173. for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) {
  1174. rc = device_create_file(&rdev->ibdev.dev,
  1175. bnxt_re_attributes[i]);
  1176. if (rc) {
  1177. dev_err(rdev_to_dev(rdev),
  1178. "Failed to create IB sysfs: %#x", rc);
  1179. /* Must clean up all created device files */
  1180. for (j = 0; j < i; j++)
  1181. device_remove_file(&rdev->ibdev.dev,
  1182. bnxt_re_attributes[j]);
  1183. bnxt_re_unregister_ib(rdev);
  1184. goto fail;
  1185. }
  1186. }
  1187. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1188. &rdev->active_width);
  1189. set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
  1190. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
  1191. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
  1192. return 0;
  1193. free_sctx:
  1194. bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
  1195. free_ctx:
  1196. bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
  1197. disable_rcfw:
  1198. bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
  1199. free_ring:
  1200. bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id);
  1201. free_rcfw:
  1202. bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
  1203. fail:
  1204. if (!locked)
  1205. rtnl_lock();
  1206. bnxt_re_ib_unreg(rdev);
  1207. rtnl_unlock();
  1208. return rc;
  1209. }
  1210. static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
  1211. {
  1212. struct bnxt_en_dev *en_dev = rdev->en_dev;
  1213. struct net_device *netdev = rdev->netdev;
  1214. bnxt_re_dev_remove(rdev);
  1215. if (netdev)
  1216. bnxt_re_dev_unprobe(netdev, en_dev);
  1217. }
  1218. static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
  1219. {
  1220. struct bnxt_en_dev *en_dev;
  1221. int rc = 0;
  1222. if (!is_bnxt_re_dev(netdev))
  1223. return -ENODEV;
  1224. en_dev = bnxt_re_dev_probe(netdev);
  1225. if (IS_ERR(en_dev)) {
  1226. if (en_dev != ERR_PTR(-ENODEV))
  1227. pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
  1228. rc = PTR_ERR(en_dev);
  1229. goto exit;
  1230. }
  1231. *rdev = bnxt_re_dev_add(netdev, en_dev);
  1232. if (!*rdev) {
  1233. rc = -ENOMEM;
  1234. bnxt_re_dev_unprobe(netdev, en_dev);
  1235. goto exit;
  1236. }
  1237. exit:
  1238. return rc;
  1239. }
  1240. static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
  1241. {
  1242. pci_dev_put(rdev->en_dev->pdev);
  1243. }
  1244. /* Handle all deferred netevents tasks */
  1245. static void bnxt_re_task(struct work_struct *work)
  1246. {
  1247. struct bnxt_re_work *re_work;
  1248. struct bnxt_re_dev *rdev;
  1249. int rc = 0;
  1250. re_work = container_of(work, struct bnxt_re_work, work);
  1251. rdev = re_work->rdev;
  1252. if (re_work->event != NETDEV_REGISTER &&
  1253. !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
  1254. return;
  1255. switch (re_work->event) {
  1256. case NETDEV_REGISTER:
  1257. rc = bnxt_re_ib_reg(rdev);
  1258. if (rc) {
  1259. dev_err(rdev_to_dev(rdev),
  1260. "Failed to register with IB: %#x", rc);
  1261. bnxt_re_remove_one(rdev);
  1262. bnxt_re_dev_unreg(rdev);
  1263. goto exit;
  1264. }
  1265. break;
  1266. case NETDEV_UP:
  1267. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1268. IB_EVENT_PORT_ACTIVE);
  1269. break;
  1270. case NETDEV_DOWN:
  1271. bnxt_re_dev_stop(rdev);
  1272. break;
  1273. case NETDEV_CHANGE:
  1274. if (!netif_carrier_ok(rdev->netdev))
  1275. bnxt_re_dev_stop(rdev);
  1276. else if (netif_carrier_ok(rdev->netdev))
  1277. bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
  1278. IB_EVENT_PORT_ACTIVE);
  1279. ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
  1280. &rdev->active_width);
  1281. break;
  1282. default:
  1283. break;
  1284. }
  1285. smp_mb__before_atomic();
  1286. atomic_dec(&rdev->sched_count);
  1287. exit:
  1288. kfree(re_work);
  1289. }
  1290. static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
  1291. {
  1292. pci_dev_get(rdev->en_dev->pdev);
  1293. }
  1294. /*
  1295. * "Notifier chain callback can be invoked for the same chain from
  1296. * different CPUs at the same time".
  1297. *
  1298. * For cases when the netdev is already present, our call to the
  1299. * register_netdevice_notifier() will actually get the rtnl_lock()
  1300. * before sending NETDEV_REGISTER and (if up) NETDEV_UP
  1301. * events.
  1302. *
  1303. * But for cases when the netdev is not already present, the notifier
  1304. * chain is subjected to be invoked from different CPUs simultaneously.
  1305. *
  1306. * This is protected by the netdev_mutex.
  1307. */
  1308. static int bnxt_re_netdev_event(struct notifier_block *notifier,
  1309. unsigned long event, void *ptr)
  1310. {
  1311. struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
  1312. struct bnxt_re_work *re_work;
  1313. struct bnxt_re_dev *rdev;
  1314. int rc = 0;
  1315. bool sch_work = false;
  1316. real_dev = rdma_vlan_dev_real_dev(netdev);
  1317. if (!real_dev)
  1318. real_dev = netdev;
  1319. rdev = bnxt_re_from_netdev(real_dev);
  1320. if (!rdev && event != NETDEV_REGISTER)
  1321. goto exit;
  1322. if (real_dev != netdev)
  1323. goto exit;
  1324. switch (event) {
  1325. case NETDEV_REGISTER:
  1326. if (rdev)
  1327. break;
  1328. rc = bnxt_re_dev_reg(&rdev, real_dev);
  1329. if (rc == -ENODEV)
  1330. break;
  1331. if (rc) {
  1332. pr_err("Failed to register with the device %s: %#x\n",
  1333. real_dev->name, rc);
  1334. break;
  1335. }
  1336. bnxt_re_init_one(rdev);
  1337. sch_work = true;
  1338. break;
  1339. case NETDEV_UNREGISTER:
  1340. /* netdev notifier will call NETDEV_UNREGISTER again later since
  1341. * we are still holding the reference to the netdev
  1342. */
  1343. if (atomic_read(&rdev->sched_count) > 0)
  1344. goto exit;
  1345. bnxt_re_ib_unreg(rdev);
  1346. bnxt_re_remove_one(rdev);
  1347. bnxt_re_dev_unreg(rdev);
  1348. break;
  1349. default:
  1350. sch_work = true;
  1351. break;
  1352. }
  1353. if (sch_work) {
  1354. /* Allocate for the deferred task */
  1355. re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
  1356. if (re_work) {
  1357. re_work->rdev = rdev;
  1358. re_work->event = event;
  1359. re_work->vlan_dev = (real_dev == netdev ?
  1360. NULL : netdev);
  1361. INIT_WORK(&re_work->work, bnxt_re_task);
  1362. atomic_inc(&rdev->sched_count);
  1363. queue_work(bnxt_re_wq, &re_work->work);
  1364. }
  1365. }
  1366. exit:
  1367. return NOTIFY_DONE;
  1368. }
  1369. static struct notifier_block bnxt_re_netdev_notifier = {
  1370. .notifier_call = bnxt_re_netdev_event
  1371. };
  1372. static int __init bnxt_re_mod_init(void)
  1373. {
  1374. int rc = 0;
  1375. pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
  1376. bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
  1377. if (!bnxt_re_wq)
  1378. return -ENOMEM;
  1379. INIT_LIST_HEAD(&bnxt_re_dev_list);
  1380. rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
  1381. if (rc) {
  1382. pr_err("%s: Cannot register to netdevice_notifier",
  1383. ROCE_DRV_MODULE_NAME);
  1384. goto err_netdev;
  1385. }
  1386. return 0;
  1387. err_netdev:
  1388. destroy_workqueue(bnxt_re_wq);
  1389. return rc;
  1390. }
  1391. static void __exit bnxt_re_mod_exit(void)
  1392. {
  1393. struct bnxt_re_dev *rdev, *next;
  1394. LIST_HEAD(to_be_deleted);
  1395. mutex_lock(&bnxt_re_dev_lock);
  1396. /* Free all adapter allocated resources */
  1397. if (!list_empty(&bnxt_re_dev_list))
  1398. list_splice_init(&bnxt_re_dev_list, &to_be_deleted);
  1399. mutex_unlock(&bnxt_re_dev_lock);
  1400. /*
  1401. * Cleanup the devices in reverse order so that the VF device
  1402. * cleanup is done before PF cleanup
  1403. */
  1404. list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) {
  1405. dev_info(rdev_to_dev(rdev), "Unregistering Device");
  1406. /*
  1407. * Flush out any scheduled tasks before destroying the
  1408. * resources
  1409. */
  1410. flush_workqueue(bnxt_re_wq);
  1411. bnxt_re_dev_stop(rdev);
  1412. /* Acquire the rtnl_lock as the L2 resources are freed here */
  1413. rtnl_lock();
  1414. bnxt_re_ib_unreg(rdev);
  1415. rtnl_unlock();
  1416. bnxt_re_remove_one(rdev);
  1417. bnxt_re_dev_unreg(rdev);
  1418. }
  1419. unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
  1420. if (bnxt_re_wq)
  1421. destroy_workqueue(bnxt_re_wq);
  1422. }
  1423. module_init(bnxt_re_mod_init);
  1424. module_exit(bnxt_re_mod_exit);