qplib_fp.c 77 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Fast Path Operators
  37. */
  38. #include <linux/interrupt.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/sched.h>
  41. #include <linux/slab.h>
  42. #include <linux/pci.h>
  43. #include <linux/prefetch.h>
  44. #include "roce_hsi.h"
  45. #include "qplib_res.h"
  46. #include "qplib_rcfw.h"
  47. #include "qplib_sp.h"
  48. #include "qplib_fp.h"
  49. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq);
  50. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
  51. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type);
  52. static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
  53. {
  54. qp->sq.condition = false;
  55. qp->sq.send_phantom = false;
  56. qp->sq.single = false;
  57. }
  58. /* Flush list */
  59. static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  60. {
  61. struct bnxt_qplib_cq *scq, *rcq;
  62. scq = qp->scq;
  63. rcq = qp->rcq;
  64. if (!qp->sq.flushed) {
  65. dev_dbg(&scq->hwq.pdev->dev,
  66. "QPLIB: FP: Adding to SQ Flush list = %p",
  67. qp);
  68. bnxt_qplib_cancel_phantom_processing(qp);
  69. list_add_tail(&qp->sq_flush, &scq->sqf_head);
  70. qp->sq.flushed = true;
  71. }
  72. if (!qp->srq) {
  73. if (!qp->rq.flushed) {
  74. dev_dbg(&rcq->hwq.pdev->dev,
  75. "QPLIB: FP: Adding to RQ Flush list = %p",
  76. qp);
  77. list_add_tail(&qp->rq_flush, &rcq->rqf_head);
  78. qp->rq.flushed = true;
  79. }
  80. }
  81. }
  82. static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
  83. unsigned long *flags)
  84. __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
  85. {
  86. spin_lock_irqsave(&qp->scq->flush_lock, *flags);
  87. if (qp->scq == qp->rcq)
  88. __acquire(&qp->rcq->flush_lock);
  89. else
  90. spin_lock(&qp->rcq->flush_lock);
  91. }
  92. static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
  93. unsigned long *flags)
  94. __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
  95. {
  96. if (qp->scq == qp->rcq)
  97. __release(&qp->rcq->flush_lock);
  98. else
  99. spin_unlock(&qp->rcq->flush_lock);
  100. spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
  101. }
  102. void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  103. {
  104. unsigned long flags;
  105. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  106. __bnxt_qplib_add_flush_qp(qp);
  107. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  108. }
  109. static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
  110. {
  111. if (qp->sq.flushed) {
  112. qp->sq.flushed = false;
  113. list_del(&qp->sq_flush);
  114. }
  115. if (!qp->srq) {
  116. if (qp->rq.flushed) {
  117. qp->rq.flushed = false;
  118. list_del(&qp->rq_flush);
  119. }
  120. }
  121. }
  122. void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
  123. {
  124. unsigned long flags;
  125. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  126. __clean_cq(qp->scq, (u64)(unsigned long)qp);
  127. qp->sq.hwq.prod = 0;
  128. qp->sq.hwq.cons = 0;
  129. __clean_cq(qp->rcq, (u64)(unsigned long)qp);
  130. qp->rq.hwq.prod = 0;
  131. qp->rq.hwq.cons = 0;
  132. __bnxt_qplib_del_flush_qp(qp);
  133. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  134. }
  135. static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
  136. {
  137. struct bnxt_qplib_nq_work *nq_work =
  138. container_of(work, struct bnxt_qplib_nq_work, work);
  139. struct bnxt_qplib_cq *cq = nq_work->cq;
  140. struct bnxt_qplib_nq *nq = nq_work->nq;
  141. if (cq && nq) {
  142. spin_lock_bh(&cq->compl_lock);
  143. if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
  144. dev_dbg(&nq->pdev->dev,
  145. "%s:Trigger cq = %p event nq = %p\n",
  146. __func__, cq, nq);
  147. nq->cqn_handler(nq, cq);
  148. }
  149. spin_unlock_bh(&cq->compl_lock);
  150. }
  151. kfree(nq_work);
  152. }
  153. static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
  154. struct bnxt_qplib_qp *qp)
  155. {
  156. struct bnxt_qplib_q *rq = &qp->rq;
  157. struct bnxt_qplib_q *sq = &qp->sq;
  158. if (qp->rq_hdr_buf)
  159. dma_free_coherent(&res->pdev->dev,
  160. rq->hwq.max_elements * qp->rq_hdr_buf_size,
  161. qp->rq_hdr_buf, qp->rq_hdr_buf_map);
  162. if (qp->sq_hdr_buf)
  163. dma_free_coherent(&res->pdev->dev,
  164. sq->hwq.max_elements * qp->sq_hdr_buf_size,
  165. qp->sq_hdr_buf, qp->sq_hdr_buf_map);
  166. qp->rq_hdr_buf = NULL;
  167. qp->sq_hdr_buf = NULL;
  168. qp->rq_hdr_buf_map = 0;
  169. qp->sq_hdr_buf_map = 0;
  170. qp->sq_hdr_buf_size = 0;
  171. qp->rq_hdr_buf_size = 0;
  172. }
  173. static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
  174. struct bnxt_qplib_qp *qp)
  175. {
  176. struct bnxt_qplib_q *rq = &qp->rq;
  177. struct bnxt_qplib_q *sq = &qp->sq;
  178. int rc = 0;
  179. if (qp->sq_hdr_buf_size && sq->hwq.max_elements) {
  180. qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  181. sq->hwq.max_elements *
  182. qp->sq_hdr_buf_size,
  183. &qp->sq_hdr_buf_map, GFP_KERNEL);
  184. if (!qp->sq_hdr_buf) {
  185. rc = -ENOMEM;
  186. dev_err(&res->pdev->dev,
  187. "QPLIB: Failed to create sq_hdr_buf");
  188. goto fail;
  189. }
  190. }
  191. if (qp->rq_hdr_buf_size && rq->hwq.max_elements) {
  192. qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  193. rq->hwq.max_elements *
  194. qp->rq_hdr_buf_size,
  195. &qp->rq_hdr_buf_map,
  196. GFP_KERNEL);
  197. if (!qp->rq_hdr_buf) {
  198. rc = -ENOMEM;
  199. dev_err(&res->pdev->dev,
  200. "QPLIB: Failed to create rq_hdr_buf");
  201. goto fail;
  202. }
  203. }
  204. return 0;
  205. fail:
  206. bnxt_qplib_free_qp_hdr_buf(res, qp);
  207. return rc;
  208. }
  209. static void bnxt_qplib_service_nq(unsigned long data)
  210. {
  211. struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data;
  212. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  213. struct nq_base *nqe, **nq_ptr;
  214. struct bnxt_qplib_cq *cq;
  215. int num_cqne_processed = 0;
  216. int num_srqne_processed = 0;
  217. u32 sw_cons, raw_cons;
  218. u16 type;
  219. int budget = nq->budget;
  220. uintptr_t q_handle;
  221. /* Service the NQ until empty */
  222. raw_cons = hwq->cons;
  223. while (budget--) {
  224. sw_cons = HWQ_CMP(raw_cons, hwq);
  225. nq_ptr = (struct nq_base **)hwq->pbl_ptr;
  226. nqe = &nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)];
  227. if (!NQE_CMP_VALID(nqe, raw_cons, hwq->max_elements))
  228. break;
  229. /*
  230. * The valid test of the entry must be done first before
  231. * reading any further.
  232. */
  233. dma_rmb();
  234. type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
  235. switch (type) {
  236. case NQ_BASE_TYPE_CQ_NOTIFICATION:
  237. {
  238. struct nq_cn *nqcne = (struct nq_cn *)nqe;
  239. q_handle = le32_to_cpu(nqcne->cq_handle_low);
  240. q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
  241. << 32;
  242. cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
  243. bnxt_qplib_arm_cq_enable(cq);
  244. spin_lock_bh(&cq->compl_lock);
  245. atomic_set(&cq->arm_state, 0);
  246. if (!nq->cqn_handler(nq, (cq)))
  247. num_cqne_processed++;
  248. else
  249. dev_warn(&nq->pdev->dev,
  250. "QPLIB: cqn - type 0x%x not handled",
  251. type);
  252. spin_unlock_bh(&cq->compl_lock);
  253. break;
  254. }
  255. case NQ_BASE_TYPE_SRQ_EVENT:
  256. {
  257. struct nq_srq_event *nqsrqe =
  258. (struct nq_srq_event *)nqe;
  259. q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
  260. q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
  261. << 32;
  262. bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle,
  263. DBR_DBR_TYPE_SRQ_ARMENA);
  264. if (!nq->srqn_handler(nq,
  265. (struct bnxt_qplib_srq *)q_handle,
  266. nqsrqe->event))
  267. num_srqne_processed++;
  268. else
  269. dev_warn(&nq->pdev->dev,
  270. "QPLIB: SRQ event 0x%x not handled",
  271. nqsrqe->event);
  272. break;
  273. }
  274. case NQ_BASE_TYPE_DBQ_EVENT:
  275. break;
  276. default:
  277. dev_warn(&nq->pdev->dev,
  278. "QPLIB: nqe with type = 0x%x not handled",
  279. type);
  280. break;
  281. }
  282. raw_cons++;
  283. }
  284. if (hwq->cons != raw_cons) {
  285. hwq->cons = raw_cons;
  286. NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements);
  287. }
  288. }
  289. static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
  290. {
  291. struct bnxt_qplib_nq *nq = dev_instance;
  292. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  293. struct nq_base **nq_ptr;
  294. u32 sw_cons;
  295. /* Prefetch the NQ element */
  296. sw_cons = HWQ_CMP(hwq->cons, hwq);
  297. nq_ptr = (struct nq_base **)nq->hwq.pbl_ptr;
  298. prefetch(&nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]);
  299. /* Fan out to CPU affinitized kthreads? */
  300. tasklet_schedule(&nq->worker);
  301. return IRQ_HANDLED;
  302. }
  303. void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
  304. {
  305. tasklet_disable(&nq->worker);
  306. /* Mask h/w interrupt */
  307. NQ_DB(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements);
  308. /* Sync with last running IRQ handler */
  309. synchronize_irq(nq->vector);
  310. if (kill)
  311. tasklet_kill(&nq->worker);
  312. if (nq->requested) {
  313. irq_set_affinity_hint(nq->vector, NULL);
  314. free_irq(nq->vector, nq);
  315. nq->requested = false;
  316. }
  317. }
  318. void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
  319. {
  320. if (nq->cqn_wq) {
  321. destroy_workqueue(nq->cqn_wq);
  322. nq->cqn_wq = NULL;
  323. }
  324. /* Make sure the HW is stopped! */
  325. if (nq->requested)
  326. bnxt_qplib_nq_stop_irq(nq, true);
  327. if (nq->bar_reg_iomem)
  328. iounmap(nq->bar_reg_iomem);
  329. nq->bar_reg_iomem = NULL;
  330. nq->cqn_handler = NULL;
  331. nq->srqn_handler = NULL;
  332. nq->vector = 0;
  333. }
  334. int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
  335. int msix_vector, bool need_init)
  336. {
  337. int rc;
  338. if (nq->requested)
  339. return -EFAULT;
  340. nq->vector = msix_vector;
  341. if (need_init)
  342. tasklet_init(&nq->worker, bnxt_qplib_service_nq,
  343. (unsigned long)nq);
  344. else
  345. tasklet_enable(&nq->worker);
  346. snprintf(nq->name, sizeof(nq->name), "bnxt_qplib_nq-%d", nq_indx);
  347. rc = request_irq(nq->vector, bnxt_qplib_nq_irq, 0, nq->name, nq);
  348. if (rc)
  349. return rc;
  350. cpumask_clear(&nq->mask);
  351. cpumask_set_cpu(nq_indx, &nq->mask);
  352. rc = irq_set_affinity_hint(nq->vector, &nq->mask);
  353. if (rc) {
  354. dev_warn(&nq->pdev->dev,
  355. "QPLIB: set affinity failed; vector: %d nq_idx: %d\n",
  356. nq->vector, nq_indx);
  357. }
  358. nq->requested = true;
  359. NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements);
  360. return rc;
  361. }
  362. int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
  363. int nq_idx, int msix_vector, int bar_reg_offset,
  364. int (*cqn_handler)(struct bnxt_qplib_nq *nq,
  365. struct bnxt_qplib_cq *),
  366. int (*srqn_handler)(struct bnxt_qplib_nq *nq,
  367. struct bnxt_qplib_srq *,
  368. u8 event))
  369. {
  370. resource_size_t nq_base;
  371. int rc = -1;
  372. if (cqn_handler)
  373. nq->cqn_handler = cqn_handler;
  374. if (srqn_handler)
  375. nq->srqn_handler = srqn_handler;
  376. /* Have a task to schedule CQ notifiers in post send case */
  377. nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq");
  378. if (!nq->cqn_wq)
  379. return -ENOMEM;
  380. nq->bar_reg = NQ_CONS_PCI_BAR_REGION;
  381. nq->bar_reg_off = bar_reg_offset;
  382. nq_base = pci_resource_start(pdev, nq->bar_reg);
  383. if (!nq_base) {
  384. rc = -ENOMEM;
  385. goto fail;
  386. }
  387. nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4);
  388. if (!nq->bar_reg_iomem) {
  389. rc = -ENOMEM;
  390. goto fail;
  391. }
  392. rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
  393. if (rc) {
  394. dev_err(&nq->pdev->dev,
  395. "QPLIB: Failed to request irq for nq-idx %d", nq_idx);
  396. goto fail;
  397. }
  398. return 0;
  399. fail:
  400. bnxt_qplib_disable_nq(nq);
  401. return rc;
  402. }
  403. void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
  404. {
  405. if (nq->hwq.max_elements) {
  406. bnxt_qplib_free_hwq(nq->pdev, &nq->hwq);
  407. nq->hwq.max_elements = 0;
  408. }
  409. }
  410. int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq)
  411. {
  412. nq->pdev = pdev;
  413. if (!nq->hwq.max_elements ||
  414. nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
  415. nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
  416. if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0,
  417. &nq->hwq.max_elements,
  418. BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0,
  419. PAGE_SIZE, HWQ_TYPE_L2_CMPL))
  420. return -ENOMEM;
  421. nq->budget = 8;
  422. return 0;
  423. }
  424. /* SRQ */
  425. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type)
  426. {
  427. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  428. struct dbr_dbr db_msg = { 0 };
  429. void __iomem *db;
  430. u32 sw_prod = 0;
  431. /* Ring DB */
  432. sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold :
  433. HWQ_CMP(srq_hwq->prod, srq_hwq);
  434. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  435. DBR_DBR_INDEX_MASK);
  436. db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) &
  437. DBR_DBR_XID_MASK) | arm_type);
  438. db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ?
  439. srq->dbr_base : srq->dpi->dbr;
  440. wmb(); /* barrier before db ring */
  441. __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64));
  442. }
  443. int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
  444. struct bnxt_qplib_srq *srq)
  445. {
  446. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  447. struct cmdq_destroy_srq req;
  448. struct creq_destroy_srq_resp resp;
  449. u16 cmd_flags = 0;
  450. int rc;
  451. RCFW_CMD_PREP(req, DESTROY_SRQ, cmd_flags);
  452. /* Configure the request */
  453. req.srq_cid = cpu_to_le32(srq->id);
  454. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  455. (void *)&resp, NULL, 0);
  456. if (rc)
  457. return rc;
  458. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  459. kfree(srq->swq);
  460. return 0;
  461. }
  462. int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
  463. struct bnxt_qplib_srq *srq)
  464. {
  465. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  466. struct cmdq_create_srq req;
  467. struct creq_create_srq_resp resp;
  468. struct bnxt_qplib_pbl *pbl;
  469. u16 cmd_flags = 0;
  470. int rc, idx;
  471. srq->hwq.max_elements = srq->max_wqe;
  472. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &srq->hwq, srq->sglist,
  473. srq->nmap, &srq->hwq.max_elements,
  474. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  475. PAGE_SIZE, HWQ_TYPE_QUEUE);
  476. if (rc)
  477. goto exit;
  478. srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq),
  479. GFP_KERNEL);
  480. if (!srq->swq) {
  481. rc = -ENOMEM;
  482. goto fail;
  483. }
  484. RCFW_CMD_PREP(req, CREATE_SRQ, cmd_flags);
  485. /* Configure the request */
  486. req.dpi = cpu_to_le32(srq->dpi->dpi);
  487. req.srq_handle = cpu_to_le64((uintptr_t)srq);
  488. req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
  489. pbl = &srq->hwq.pbl[PBL_LVL_0];
  490. req.pg_size_lvl = cpu_to_le16((((u16)srq->hwq.level &
  491. CMDQ_CREATE_SRQ_LVL_MASK) <<
  492. CMDQ_CREATE_SRQ_LVL_SFT) |
  493. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  494. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K :
  495. pbl->pg_size == ROCE_PG_SIZE_8K ?
  496. CMDQ_CREATE_SRQ_PG_SIZE_PG_8K :
  497. pbl->pg_size == ROCE_PG_SIZE_64K ?
  498. CMDQ_CREATE_SRQ_PG_SIZE_PG_64K :
  499. pbl->pg_size == ROCE_PG_SIZE_2M ?
  500. CMDQ_CREATE_SRQ_PG_SIZE_PG_2M :
  501. pbl->pg_size == ROCE_PG_SIZE_8M ?
  502. CMDQ_CREATE_SRQ_PG_SIZE_PG_8M :
  503. pbl->pg_size == ROCE_PG_SIZE_1G ?
  504. CMDQ_CREATE_SRQ_PG_SIZE_PG_1G :
  505. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K));
  506. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  507. req.pd_id = cpu_to_le32(srq->pd->id);
  508. req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
  509. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  510. (void *)&resp, NULL, 0);
  511. if (rc)
  512. goto fail;
  513. spin_lock_init(&srq->lock);
  514. srq->start_idx = 0;
  515. srq->last_idx = srq->hwq.max_elements - 1;
  516. for (idx = 0; idx < srq->hwq.max_elements; idx++)
  517. srq->swq[idx].next_idx = idx + 1;
  518. srq->swq[srq->last_idx].next_idx = -1;
  519. srq->id = le32_to_cpu(resp.xid);
  520. srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  521. if (srq->threshold)
  522. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA);
  523. srq->arm_req = false;
  524. return 0;
  525. fail:
  526. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  527. kfree(srq->swq);
  528. exit:
  529. return rc;
  530. }
  531. int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
  532. struct bnxt_qplib_srq *srq)
  533. {
  534. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  535. u32 sw_prod, sw_cons, count = 0;
  536. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  537. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  538. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  539. srq_hwq->max_elements - sw_cons + sw_prod;
  540. if (count > srq->threshold) {
  541. srq->arm_req = false;
  542. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  543. } else {
  544. /* Deferred arming */
  545. srq->arm_req = true;
  546. }
  547. return 0;
  548. }
  549. int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
  550. struct bnxt_qplib_srq *srq)
  551. {
  552. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  553. struct cmdq_query_srq req;
  554. struct creq_query_srq_resp resp;
  555. struct bnxt_qplib_rcfw_sbuf *sbuf;
  556. struct creq_query_srq_resp_sb *sb;
  557. u16 cmd_flags = 0;
  558. int rc = 0;
  559. RCFW_CMD_PREP(req, QUERY_SRQ, cmd_flags);
  560. req.srq_cid = cpu_to_le32(srq->id);
  561. /* Configure the request */
  562. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  563. if (!sbuf)
  564. return -ENOMEM;
  565. sb = sbuf->sb;
  566. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  567. (void *)sbuf, 0);
  568. srq->threshold = le16_to_cpu(sb->srq_limit);
  569. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  570. return rc;
  571. }
  572. int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
  573. struct bnxt_qplib_swqe *wqe)
  574. {
  575. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  576. struct rq_wqe *srqe, **srqe_ptr;
  577. struct sq_sge *hw_sge;
  578. u32 sw_prod, sw_cons, count = 0;
  579. int i, rc = 0, next;
  580. spin_lock(&srq_hwq->lock);
  581. if (srq->start_idx == srq->last_idx) {
  582. dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!",
  583. srq->id);
  584. rc = -EINVAL;
  585. spin_unlock(&srq_hwq->lock);
  586. goto done;
  587. }
  588. next = srq->start_idx;
  589. srq->start_idx = srq->swq[next].next_idx;
  590. spin_unlock(&srq_hwq->lock);
  591. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  592. srqe_ptr = (struct rq_wqe **)srq_hwq->pbl_ptr;
  593. srqe = &srqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  594. memset(srqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  595. /* Calculate wqe_size16 and data_len */
  596. for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
  597. i < wqe->num_sge; i++, hw_sge++) {
  598. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  599. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  600. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  601. }
  602. srqe->wqe_type = wqe->type;
  603. srqe->flags = wqe->flags;
  604. srqe->wqe_size = wqe->num_sge +
  605. ((offsetof(typeof(*srqe), data) + 15) >> 4);
  606. srqe->wr_id[0] = cpu_to_le32((u32)next);
  607. srq->swq[next].wr_id = wqe->wr_id;
  608. srq_hwq->prod++;
  609. spin_lock(&srq_hwq->lock);
  610. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  611. /* retaining srq_hwq->cons for this logic
  612. * actually the lock is only required to
  613. * read srq_hwq->cons.
  614. */
  615. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  616. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  617. srq_hwq->max_elements - sw_cons + sw_prod;
  618. spin_unlock(&srq_hwq->lock);
  619. /* Ring DB */
  620. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ);
  621. if (srq->arm_req == true && count > srq->threshold) {
  622. srq->arm_req = false;
  623. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  624. }
  625. done:
  626. return rc;
  627. }
  628. /* QP */
  629. int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  630. {
  631. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  632. struct cmdq_create_qp1 req;
  633. struct creq_create_qp1_resp resp;
  634. struct bnxt_qplib_pbl *pbl;
  635. struct bnxt_qplib_q *sq = &qp->sq;
  636. struct bnxt_qplib_q *rq = &qp->rq;
  637. int rc;
  638. u16 cmd_flags = 0;
  639. u32 qp_flags = 0;
  640. RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags);
  641. /* General */
  642. req.type = qp->type;
  643. req.dpi = cpu_to_le32(qp->dpi->dpi);
  644. req.qp_handle = cpu_to_le64(qp->qp_handle);
  645. /* SQ */
  646. sq->hwq.max_elements = sq->max_wqe;
  647. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, NULL, 0,
  648. &sq->hwq.max_elements,
  649. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 0,
  650. PAGE_SIZE, HWQ_TYPE_QUEUE);
  651. if (rc)
  652. goto exit;
  653. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  654. if (!sq->swq) {
  655. rc = -ENOMEM;
  656. goto fail_sq;
  657. }
  658. pbl = &sq->hwq.pbl[PBL_LVL_0];
  659. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  660. req.sq_pg_size_sq_lvl =
  661. ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK)
  662. << CMDQ_CREATE_QP1_SQ_LVL_SFT) |
  663. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  664. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K :
  665. pbl->pg_size == ROCE_PG_SIZE_8K ?
  666. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K :
  667. pbl->pg_size == ROCE_PG_SIZE_64K ?
  668. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K :
  669. pbl->pg_size == ROCE_PG_SIZE_2M ?
  670. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M :
  671. pbl->pg_size == ROCE_PG_SIZE_8M ?
  672. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M :
  673. pbl->pg_size == ROCE_PG_SIZE_1G ?
  674. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G :
  675. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K);
  676. if (qp->scq)
  677. req.scq_cid = cpu_to_le32(qp->scq->id);
  678. qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
  679. /* RQ */
  680. if (rq->max_wqe) {
  681. rq->hwq.max_elements = qp->rq.max_wqe;
  682. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, NULL, 0,
  683. &rq->hwq.max_elements,
  684. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  685. PAGE_SIZE, HWQ_TYPE_QUEUE);
  686. if (rc)
  687. goto fail_sq;
  688. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  689. GFP_KERNEL);
  690. if (!rq->swq) {
  691. rc = -ENOMEM;
  692. goto fail_rq;
  693. }
  694. pbl = &rq->hwq.pbl[PBL_LVL_0];
  695. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  696. req.rq_pg_size_rq_lvl =
  697. ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) <<
  698. CMDQ_CREATE_QP1_RQ_LVL_SFT) |
  699. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  700. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K :
  701. pbl->pg_size == ROCE_PG_SIZE_8K ?
  702. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K :
  703. pbl->pg_size == ROCE_PG_SIZE_64K ?
  704. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K :
  705. pbl->pg_size == ROCE_PG_SIZE_2M ?
  706. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M :
  707. pbl->pg_size == ROCE_PG_SIZE_8M ?
  708. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M :
  709. pbl->pg_size == ROCE_PG_SIZE_1G ?
  710. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G :
  711. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K);
  712. if (qp->rcq)
  713. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  714. }
  715. /* Header buffer - allow hdr_buf pass in */
  716. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  717. if (rc) {
  718. rc = -ENOMEM;
  719. goto fail;
  720. }
  721. req.qp_flags = cpu_to_le32(qp_flags);
  722. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  723. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  724. req.sq_fwo_sq_sge =
  725. cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
  726. CMDQ_CREATE_QP1_SQ_SGE_SFT);
  727. req.rq_fwo_rq_sge =
  728. cpu_to_le16((rq->max_sge & CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
  729. CMDQ_CREATE_QP1_RQ_SGE_SFT);
  730. req.pd_id = cpu_to_le32(qp->pd->id);
  731. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  732. (void *)&resp, NULL, 0);
  733. if (rc)
  734. goto fail;
  735. qp->id = le32_to_cpu(resp.xid);
  736. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  737. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  738. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  739. return 0;
  740. fail:
  741. bnxt_qplib_free_qp_hdr_buf(res, qp);
  742. fail_rq:
  743. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  744. kfree(rq->swq);
  745. fail_sq:
  746. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  747. kfree(sq->swq);
  748. exit:
  749. return rc;
  750. }
  751. int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  752. {
  753. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  754. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  755. struct cmdq_create_qp req;
  756. struct creq_create_qp_resp resp;
  757. struct bnxt_qplib_pbl *pbl;
  758. struct sq_psn_search **psn_search_ptr;
  759. unsigned long int psn_search, poff = 0;
  760. struct bnxt_qplib_q *sq = &qp->sq;
  761. struct bnxt_qplib_q *rq = &qp->rq;
  762. struct bnxt_qplib_hwq *xrrq;
  763. int i, rc, req_size, psn_sz;
  764. u16 cmd_flags = 0, max_ssge;
  765. u32 sw_prod, qp_flags = 0;
  766. RCFW_CMD_PREP(req, CREATE_QP, cmd_flags);
  767. /* General */
  768. req.type = qp->type;
  769. req.dpi = cpu_to_le32(qp->dpi->dpi);
  770. req.qp_handle = cpu_to_le64(qp->qp_handle);
  771. /* SQ */
  772. psn_sz = (qp->type == CMDQ_CREATE_QP_TYPE_RC) ?
  773. sizeof(struct sq_psn_search) : 0;
  774. sq->hwq.max_elements = sq->max_wqe;
  775. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, sq->sglist,
  776. sq->nmap, &sq->hwq.max_elements,
  777. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE,
  778. psn_sz,
  779. PAGE_SIZE, HWQ_TYPE_QUEUE);
  780. if (rc)
  781. goto exit;
  782. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  783. if (!sq->swq) {
  784. rc = -ENOMEM;
  785. goto fail_sq;
  786. }
  787. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  788. if (psn_sz) {
  789. psn_search_ptr = (struct sq_psn_search **)
  790. &hw_sq_send_ptr[get_sqe_pg
  791. (sq->hwq.max_elements)];
  792. psn_search = (unsigned long int)
  793. &hw_sq_send_ptr[get_sqe_pg(sq->hwq.max_elements)]
  794. [get_sqe_idx(sq->hwq.max_elements)];
  795. if (psn_search & ~PAGE_MASK) {
  796. /* If the psn_search does not start on a page boundary,
  797. * then calculate the offset
  798. */
  799. poff = (psn_search & ~PAGE_MASK) /
  800. BNXT_QPLIB_MAX_PSNE_ENTRY_SIZE;
  801. }
  802. for (i = 0; i < sq->hwq.max_elements; i++)
  803. sq->swq[i].psn_search =
  804. &psn_search_ptr[get_psne_pg(i + poff)]
  805. [get_psne_idx(i + poff)];
  806. }
  807. pbl = &sq->hwq.pbl[PBL_LVL_0];
  808. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  809. req.sq_pg_size_sq_lvl =
  810. ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK)
  811. << CMDQ_CREATE_QP_SQ_LVL_SFT) |
  812. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  813. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K :
  814. pbl->pg_size == ROCE_PG_SIZE_8K ?
  815. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K :
  816. pbl->pg_size == ROCE_PG_SIZE_64K ?
  817. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K :
  818. pbl->pg_size == ROCE_PG_SIZE_2M ?
  819. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M :
  820. pbl->pg_size == ROCE_PG_SIZE_8M ?
  821. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M :
  822. pbl->pg_size == ROCE_PG_SIZE_1G ?
  823. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G :
  824. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K);
  825. /* initialize all SQ WQEs to LOCAL_INVALID (sq prep for hw fetch) */
  826. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  827. for (sw_prod = 0; sw_prod < sq->hwq.max_elements; sw_prod++) {
  828. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  829. [get_sqe_idx(sw_prod)];
  830. hw_sq_send_hdr->wqe_type = SQ_BASE_WQE_TYPE_LOCAL_INVALID;
  831. }
  832. if (qp->scq)
  833. req.scq_cid = cpu_to_le32(qp->scq->id);
  834. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
  835. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
  836. if (qp->sig_type)
  837. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
  838. /* RQ */
  839. if (rq->max_wqe) {
  840. rq->hwq.max_elements = rq->max_wqe;
  841. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, rq->sglist,
  842. rq->nmap, &rq->hwq.max_elements,
  843. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  844. PAGE_SIZE, HWQ_TYPE_QUEUE);
  845. if (rc)
  846. goto fail_sq;
  847. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  848. GFP_KERNEL);
  849. if (!rq->swq) {
  850. rc = -ENOMEM;
  851. goto fail_rq;
  852. }
  853. pbl = &rq->hwq.pbl[PBL_LVL_0];
  854. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  855. req.rq_pg_size_rq_lvl =
  856. ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) <<
  857. CMDQ_CREATE_QP_RQ_LVL_SFT) |
  858. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  859. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K :
  860. pbl->pg_size == ROCE_PG_SIZE_8K ?
  861. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K :
  862. pbl->pg_size == ROCE_PG_SIZE_64K ?
  863. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K :
  864. pbl->pg_size == ROCE_PG_SIZE_2M ?
  865. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M :
  866. pbl->pg_size == ROCE_PG_SIZE_8M ?
  867. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M :
  868. pbl->pg_size == ROCE_PG_SIZE_1G ?
  869. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G :
  870. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K);
  871. } else {
  872. /* SRQ */
  873. if (qp->srq) {
  874. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
  875. req.srq_cid = cpu_to_le32(qp->srq->id);
  876. }
  877. }
  878. if (qp->rcq)
  879. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  880. req.qp_flags = cpu_to_le32(qp_flags);
  881. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  882. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  883. qp->sq_hdr_buf = NULL;
  884. qp->rq_hdr_buf = NULL;
  885. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  886. if (rc)
  887. goto fail_rq;
  888. /* CTRL-22434: Irrespective of the requested SGE count on the SQ
  889. * always create the QP with max send sges possible if the requested
  890. * inline size is greater than 0.
  891. */
  892. max_ssge = qp->max_inline_data ? 6 : sq->max_sge;
  893. req.sq_fwo_sq_sge = cpu_to_le16(
  894. ((max_ssge & CMDQ_CREATE_QP_SQ_SGE_MASK)
  895. << CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
  896. req.rq_fwo_rq_sge = cpu_to_le16(
  897. ((rq->max_sge & CMDQ_CREATE_QP_RQ_SGE_MASK)
  898. << CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
  899. /* ORRQ and IRRQ */
  900. if (psn_sz) {
  901. xrrq = &qp->orrq;
  902. xrrq->max_elements =
  903. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  904. req_size = xrrq->max_elements *
  905. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  906. req_size &= ~(PAGE_SIZE - 1);
  907. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  908. &xrrq->max_elements,
  909. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE,
  910. 0, req_size, HWQ_TYPE_CTX);
  911. if (rc)
  912. goto fail_buf_free;
  913. pbl = &xrrq->pbl[PBL_LVL_0];
  914. req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  915. xrrq = &qp->irrq;
  916. xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
  917. qp->max_dest_rd_atomic);
  918. req_size = xrrq->max_elements *
  919. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  920. req_size &= ~(PAGE_SIZE - 1);
  921. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  922. &xrrq->max_elements,
  923. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE,
  924. 0, req_size, HWQ_TYPE_CTX);
  925. if (rc)
  926. goto fail_orrq;
  927. pbl = &xrrq->pbl[PBL_LVL_0];
  928. req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  929. }
  930. req.pd_id = cpu_to_le32(qp->pd->id);
  931. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  932. (void *)&resp, NULL, 0);
  933. if (rc)
  934. goto fail;
  935. qp->id = le32_to_cpu(resp.xid);
  936. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  937. INIT_LIST_HEAD(&qp->sq_flush);
  938. INIT_LIST_HEAD(&qp->rq_flush);
  939. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  940. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  941. return 0;
  942. fail:
  943. if (qp->irrq.max_elements)
  944. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  945. fail_orrq:
  946. if (qp->orrq.max_elements)
  947. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  948. fail_buf_free:
  949. bnxt_qplib_free_qp_hdr_buf(res, qp);
  950. fail_rq:
  951. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  952. kfree(rq->swq);
  953. fail_sq:
  954. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  955. kfree(sq->swq);
  956. exit:
  957. return rc;
  958. }
  959. static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
  960. {
  961. switch (qp->state) {
  962. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  963. /* INIT->RTR, configure the path_mtu to the default
  964. * 2048 if not being requested
  965. */
  966. if (!(qp->modify_flags &
  967. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
  968. qp->modify_flags |=
  969. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
  970. qp->path_mtu =
  971. CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
  972. }
  973. qp->modify_flags &=
  974. ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
  975. /* Bono FW require the max_dest_rd_atomic to be >= 1 */
  976. if (qp->max_dest_rd_atomic < 1)
  977. qp->max_dest_rd_atomic = 1;
  978. qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
  979. /* Bono FW 20.6.5 requires SGID_INDEX configuration */
  980. if (!(qp->modify_flags &
  981. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
  982. qp->modify_flags |=
  983. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
  984. qp->ah.sgid_index = 0;
  985. }
  986. break;
  987. default:
  988. break;
  989. }
  990. }
  991. static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
  992. {
  993. switch (qp->state) {
  994. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  995. /* Bono FW requires the max_rd_atomic to be >= 1 */
  996. if (qp->max_rd_atomic < 1)
  997. qp->max_rd_atomic = 1;
  998. /* Bono FW does not allow PKEY_INDEX,
  999. * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
  1000. * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
  1001. * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
  1002. * modification
  1003. */
  1004. qp->modify_flags &=
  1005. ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
  1006. CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
  1007. CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
  1008. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
  1009. CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
  1010. CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
  1011. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
  1012. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
  1013. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
  1014. CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
  1015. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
  1016. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
  1017. break;
  1018. default:
  1019. break;
  1020. }
  1021. }
  1022. static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
  1023. {
  1024. switch (qp->cur_qp_state) {
  1025. case CMDQ_MODIFY_QP_NEW_STATE_RESET:
  1026. break;
  1027. case CMDQ_MODIFY_QP_NEW_STATE_INIT:
  1028. __modify_flags_from_init_state(qp);
  1029. break;
  1030. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  1031. __modify_flags_from_rtr_state(qp);
  1032. break;
  1033. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  1034. break;
  1035. case CMDQ_MODIFY_QP_NEW_STATE_SQD:
  1036. break;
  1037. case CMDQ_MODIFY_QP_NEW_STATE_SQE:
  1038. break;
  1039. case CMDQ_MODIFY_QP_NEW_STATE_ERR:
  1040. break;
  1041. default:
  1042. break;
  1043. }
  1044. }
  1045. int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1046. {
  1047. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1048. struct cmdq_modify_qp req;
  1049. struct creq_modify_qp_resp resp;
  1050. u16 cmd_flags = 0, pkey;
  1051. u32 temp32[4];
  1052. u32 bmask;
  1053. int rc;
  1054. RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags);
  1055. /* Filter out the qp_attr_mask based on the state->new transition */
  1056. __filter_modify_flags(qp);
  1057. bmask = qp->modify_flags;
  1058. req.modify_mask = cpu_to_le32(qp->modify_flags);
  1059. req.qp_cid = cpu_to_le32(qp->id);
  1060. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
  1061. req.network_type_en_sqd_async_notify_new_state =
  1062. (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
  1063. (qp->en_sqd_async_notify ?
  1064. CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
  1065. }
  1066. req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
  1067. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
  1068. req.access = qp->access;
  1069. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) {
  1070. if (!bnxt_qplib_get_pkey(res, &res->pkey_tbl,
  1071. qp->pkey_index, &pkey))
  1072. req.pkey = cpu_to_le16(pkey);
  1073. }
  1074. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
  1075. req.qkey = cpu_to_le32(qp->qkey);
  1076. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
  1077. memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
  1078. req.dgid[0] = cpu_to_le32(temp32[0]);
  1079. req.dgid[1] = cpu_to_le32(temp32[1]);
  1080. req.dgid[2] = cpu_to_le32(temp32[2]);
  1081. req.dgid[3] = cpu_to_le32(temp32[3]);
  1082. }
  1083. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
  1084. req.flow_label = cpu_to_le32(qp->ah.flow_label);
  1085. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)
  1086. req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id
  1087. [qp->ah.sgid_index]);
  1088. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
  1089. req.hop_limit = qp->ah.hop_limit;
  1090. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
  1091. req.traffic_class = qp->ah.traffic_class;
  1092. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
  1093. memcpy(req.dest_mac, qp->ah.dmac, 6);
  1094. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
  1095. req.path_mtu = qp->path_mtu;
  1096. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
  1097. req.timeout = qp->timeout;
  1098. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
  1099. req.retry_cnt = qp->retry_cnt;
  1100. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
  1101. req.rnr_retry = qp->rnr_retry;
  1102. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
  1103. req.min_rnr_timer = qp->min_rnr_timer;
  1104. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
  1105. req.rq_psn = cpu_to_le32(qp->rq.psn);
  1106. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
  1107. req.sq_psn = cpu_to_le32(qp->sq.psn);
  1108. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
  1109. req.max_rd_atomic =
  1110. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  1111. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
  1112. req.max_dest_rd_atomic =
  1113. IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
  1114. req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
  1115. req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
  1116. req.sq_sge = cpu_to_le16(qp->sq.max_sge);
  1117. req.rq_sge = cpu_to_le16(qp->rq.max_sge);
  1118. req.max_inline_data = cpu_to_le32(qp->max_inline_data);
  1119. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
  1120. req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
  1121. req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id);
  1122. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1123. (void *)&resp, NULL, 0);
  1124. if (rc)
  1125. return rc;
  1126. qp->cur_qp_state = qp->state;
  1127. return 0;
  1128. }
  1129. int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1130. {
  1131. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1132. struct cmdq_query_qp req;
  1133. struct creq_query_qp_resp resp;
  1134. struct bnxt_qplib_rcfw_sbuf *sbuf;
  1135. struct creq_query_qp_resp_sb *sb;
  1136. u16 cmd_flags = 0;
  1137. u32 temp32[4];
  1138. int i, rc = 0;
  1139. RCFW_CMD_PREP(req, QUERY_QP, cmd_flags);
  1140. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  1141. if (!sbuf)
  1142. return -ENOMEM;
  1143. sb = sbuf->sb;
  1144. req.qp_cid = cpu_to_le32(qp->id);
  1145. req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
  1146. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  1147. (void *)sbuf, 0);
  1148. if (rc)
  1149. goto bail;
  1150. /* Extract the context from the side buffer */
  1151. qp->state = sb->en_sqd_async_notify_state &
  1152. CREQ_QUERY_QP_RESP_SB_STATE_MASK;
  1153. qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
  1154. CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ?
  1155. true : false;
  1156. qp->access = sb->access;
  1157. qp->pkey_index = le16_to_cpu(sb->pkey);
  1158. qp->qkey = le32_to_cpu(sb->qkey);
  1159. temp32[0] = le32_to_cpu(sb->dgid[0]);
  1160. temp32[1] = le32_to_cpu(sb->dgid[1]);
  1161. temp32[2] = le32_to_cpu(sb->dgid[2]);
  1162. temp32[3] = le32_to_cpu(sb->dgid[3]);
  1163. memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
  1164. qp->ah.flow_label = le32_to_cpu(sb->flow_label);
  1165. qp->ah.sgid_index = 0;
  1166. for (i = 0; i < res->sgid_tbl.max; i++) {
  1167. if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
  1168. qp->ah.sgid_index = i;
  1169. break;
  1170. }
  1171. }
  1172. if (i == res->sgid_tbl.max)
  1173. dev_warn(&res->pdev->dev, "QPLIB: SGID not found??");
  1174. qp->ah.hop_limit = sb->hop_limit;
  1175. qp->ah.traffic_class = sb->traffic_class;
  1176. memcpy(qp->ah.dmac, sb->dest_mac, 6);
  1177. qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1178. CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
  1179. CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
  1180. qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1181. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
  1182. CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
  1183. qp->timeout = sb->timeout;
  1184. qp->retry_cnt = sb->retry_cnt;
  1185. qp->rnr_retry = sb->rnr_retry;
  1186. qp->min_rnr_timer = sb->min_rnr_timer;
  1187. qp->rq.psn = le32_to_cpu(sb->rq_psn);
  1188. qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
  1189. qp->sq.psn = le32_to_cpu(sb->sq_psn);
  1190. qp->max_dest_rd_atomic =
  1191. IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
  1192. qp->sq.max_wqe = qp->sq.hwq.max_elements;
  1193. qp->rq.max_wqe = qp->rq.hwq.max_elements;
  1194. qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
  1195. qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
  1196. qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
  1197. qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
  1198. memcpy(qp->smac, sb->src_mac, 6);
  1199. qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
  1200. bail:
  1201. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  1202. return rc;
  1203. }
  1204. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
  1205. {
  1206. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1207. struct cq_base *hw_cqe, **hw_cqe_ptr;
  1208. int i;
  1209. for (i = 0; i < cq_hwq->max_elements; i++) {
  1210. hw_cqe_ptr = (struct cq_base **)cq_hwq->pbl_ptr;
  1211. hw_cqe = &hw_cqe_ptr[CQE_PG(i)][CQE_IDX(i)];
  1212. if (!CQE_CMP_VALID(hw_cqe, i, cq_hwq->max_elements))
  1213. continue;
  1214. /*
  1215. * The valid test of the entry must be done first before
  1216. * reading any further.
  1217. */
  1218. dma_rmb();
  1219. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  1220. case CQ_BASE_CQE_TYPE_REQ:
  1221. case CQ_BASE_CQE_TYPE_TERMINAL:
  1222. {
  1223. struct cq_req *cqe = (struct cq_req *)hw_cqe;
  1224. if (qp == le64_to_cpu(cqe->qp_handle))
  1225. cqe->qp_handle = 0;
  1226. break;
  1227. }
  1228. case CQ_BASE_CQE_TYPE_RES_RC:
  1229. case CQ_BASE_CQE_TYPE_RES_UD:
  1230. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  1231. {
  1232. struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
  1233. if (qp == le64_to_cpu(cqe->qp_handle))
  1234. cqe->qp_handle = 0;
  1235. break;
  1236. }
  1237. default:
  1238. break;
  1239. }
  1240. }
  1241. }
  1242. int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
  1243. struct bnxt_qplib_qp *qp)
  1244. {
  1245. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1246. struct cmdq_destroy_qp req;
  1247. struct creq_destroy_qp_resp resp;
  1248. u16 cmd_flags = 0;
  1249. int rc;
  1250. rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID;
  1251. rcfw->qp_tbl[qp->id].qp_handle = NULL;
  1252. RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags);
  1253. req.qp_cid = cpu_to_le32(qp->id);
  1254. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1255. (void *)&resp, NULL, 0);
  1256. if (rc) {
  1257. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  1258. rcfw->qp_tbl[qp->id].qp_handle = qp;
  1259. return rc;
  1260. }
  1261. return 0;
  1262. }
  1263. void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
  1264. struct bnxt_qplib_qp *qp)
  1265. {
  1266. bnxt_qplib_free_qp_hdr_buf(res, qp);
  1267. bnxt_qplib_free_hwq(res->pdev, &qp->sq.hwq);
  1268. kfree(qp->sq.swq);
  1269. bnxt_qplib_free_hwq(res->pdev, &qp->rq.hwq);
  1270. kfree(qp->rq.swq);
  1271. if (qp->irrq.max_elements)
  1272. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  1273. if (qp->orrq.max_elements)
  1274. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  1275. }
  1276. void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
  1277. struct bnxt_qplib_sge *sge)
  1278. {
  1279. struct bnxt_qplib_q *sq = &qp->sq;
  1280. u32 sw_prod;
  1281. memset(sge, 0, sizeof(*sge));
  1282. if (qp->sq_hdr_buf) {
  1283. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1284. sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
  1285. sw_prod * qp->sq_hdr_buf_size);
  1286. sge->lkey = 0xFFFFFFFF;
  1287. sge->size = qp->sq_hdr_buf_size;
  1288. return qp->sq_hdr_buf + sw_prod * sge->size;
  1289. }
  1290. return NULL;
  1291. }
  1292. u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
  1293. {
  1294. struct bnxt_qplib_q *rq = &qp->rq;
  1295. return HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1296. }
  1297. dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
  1298. {
  1299. return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
  1300. }
  1301. void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
  1302. struct bnxt_qplib_sge *sge)
  1303. {
  1304. struct bnxt_qplib_q *rq = &qp->rq;
  1305. u32 sw_prod;
  1306. memset(sge, 0, sizeof(*sge));
  1307. if (qp->rq_hdr_buf) {
  1308. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1309. sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
  1310. sw_prod * qp->rq_hdr_buf_size);
  1311. sge->lkey = 0xFFFFFFFF;
  1312. sge->size = qp->rq_hdr_buf_size;
  1313. return qp->rq_hdr_buf + sw_prod * sge->size;
  1314. }
  1315. return NULL;
  1316. }
  1317. void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
  1318. {
  1319. struct bnxt_qplib_q *sq = &qp->sq;
  1320. struct dbr_dbr db_msg = { 0 };
  1321. u32 sw_prod;
  1322. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1323. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1324. DBR_DBR_INDEX_MASK);
  1325. db_msg.type_xid =
  1326. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1327. DBR_DBR_TYPE_SQ);
  1328. /* Flush all the WQE writes to HW */
  1329. wmb();
  1330. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1331. }
  1332. int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
  1333. struct bnxt_qplib_swqe *wqe)
  1334. {
  1335. struct bnxt_qplib_q *sq = &qp->sq;
  1336. struct bnxt_qplib_swq *swq;
  1337. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  1338. struct sq_sge *hw_sge;
  1339. struct bnxt_qplib_nq_work *nq_work = NULL;
  1340. bool sch_handler = false;
  1341. u32 sw_prod;
  1342. u8 wqe_size16;
  1343. int i, rc = 0, data_len = 0, pkt_num = 0;
  1344. __le32 temp32;
  1345. if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS) {
  1346. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1347. sch_handler = true;
  1348. dev_dbg(&sq->hwq.pdev->dev,
  1349. "%s Error QP. Scheduling for poll_cq\n",
  1350. __func__);
  1351. goto queue_err;
  1352. }
  1353. }
  1354. if (bnxt_qplib_queue_full(sq)) {
  1355. dev_err(&sq->hwq.pdev->dev,
  1356. "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x",
  1357. sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements,
  1358. sq->q_full_delta);
  1359. rc = -ENOMEM;
  1360. goto done;
  1361. }
  1362. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1363. swq = &sq->swq[sw_prod];
  1364. swq->wr_id = wqe->wr_id;
  1365. swq->type = wqe->type;
  1366. swq->flags = wqe->flags;
  1367. if (qp->sig_type)
  1368. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1369. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1370. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  1371. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  1372. [get_sqe_idx(sw_prod)];
  1373. memset(hw_sq_send_hdr, 0, BNXT_QPLIB_MAX_SQE_ENTRY_SIZE);
  1374. if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
  1375. /* Copy the inline data */
  1376. if (wqe->inline_len > BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) {
  1377. dev_warn(&sq->hwq.pdev->dev,
  1378. "QPLIB: Inline data length > 96 detected");
  1379. data_len = BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH;
  1380. } else {
  1381. data_len = wqe->inline_len;
  1382. }
  1383. memcpy(hw_sq_send_hdr->data, wqe->inline_data, data_len);
  1384. wqe_size16 = (data_len + 15) >> 4;
  1385. } else {
  1386. for (i = 0, hw_sge = (struct sq_sge *)hw_sq_send_hdr->data;
  1387. i < wqe->num_sge; i++, hw_sge++) {
  1388. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1389. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1390. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1391. data_len += wqe->sg_list[i].size;
  1392. }
  1393. /* Each SGE entry = 1 WQE size16 */
  1394. wqe_size16 = wqe->num_sge;
  1395. /* HW requires wqe size has room for atleast one SGE even if
  1396. * none was supplied by ULP
  1397. */
  1398. if (!wqe->num_sge)
  1399. wqe_size16++;
  1400. }
  1401. /* Specifics */
  1402. switch (wqe->type) {
  1403. case BNXT_QPLIB_SWQE_TYPE_SEND:
  1404. if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
  1405. /* Assemble info for Raw Ethertype QPs */
  1406. struct sq_send_raweth_qp1 *sqe =
  1407. (struct sq_send_raweth_qp1 *)hw_sq_send_hdr;
  1408. sqe->wqe_type = wqe->type;
  1409. sqe->flags = wqe->flags;
  1410. sqe->wqe_size = wqe_size16 +
  1411. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1412. sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
  1413. sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
  1414. sqe->length = cpu_to_le32(data_len);
  1415. sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
  1416. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
  1417. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
  1418. break;
  1419. }
  1420. /* fall thru */
  1421. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
  1422. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
  1423. {
  1424. struct sq_send *sqe = (struct sq_send *)hw_sq_send_hdr;
  1425. sqe->wqe_type = wqe->type;
  1426. sqe->flags = wqe->flags;
  1427. sqe->wqe_size = wqe_size16 +
  1428. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1429. sqe->inv_key_or_imm_data = cpu_to_le32(
  1430. wqe->send.inv_key);
  1431. if (qp->type == CMDQ_CREATE_QP_TYPE_UD) {
  1432. sqe->q_key = cpu_to_le32(wqe->send.q_key);
  1433. sqe->dst_qp = cpu_to_le32(
  1434. wqe->send.dst_qp & SQ_SEND_DST_QP_MASK);
  1435. sqe->length = cpu_to_le32(data_len);
  1436. sqe->avid = cpu_to_le32(wqe->send.avid &
  1437. SQ_SEND_AVID_MASK);
  1438. sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
  1439. } else {
  1440. sqe->length = cpu_to_le32(data_len);
  1441. sqe->dst_qp = 0;
  1442. sqe->avid = 0;
  1443. if (qp->mtu)
  1444. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1445. if (!pkt_num)
  1446. pkt_num = 1;
  1447. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1448. }
  1449. break;
  1450. }
  1451. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
  1452. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
  1453. case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
  1454. {
  1455. struct sq_rdma *sqe = (struct sq_rdma *)hw_sq_send_hdr;
  1456. sqe->wqe_type = wqe->type;
  1457. sqe->flags = wqe->flags;
  1458. sqe->wqe_size = wqe_size16 +
  1459. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1460. sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
  1461. sqe->length = cpu_to_le32((u32)data_len);
  1462. sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
  1463. sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
  1464. if (qp->mtu)
  1465. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1466. if (!pkt_num)
  1467. pkt_num = 1;
  1468. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1469. break;
  1470. }
  1471. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
  1472. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
  1473. {
  1474. struct sq_atomic *sqe = (struct sq_atomic *)hw_sq_send_hdr;
  1475. sqe->wqe_type = wqe->type;
  1476. sqe->flags = wqe->flags;
  1477. sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
  1478. sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
  1479. sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
  1480. sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
  1481. if (qp->mtu)
  1482. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1483. if (!pkt_num)
  1484. pkt_num = 1;
  1485. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1486. break;
  1487. }
  1488. case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
  1489. {
  1490. struct sq_localinvalidate *sqe =
  1491. (struct sq_localinvalidate *)hw_sq_send_hdr;
  1492. sqe->wqe_type = wqe->type;
  1493. sqe->flags = wqe->flags;
  1494. sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
  1495. break;
  1496. }
  1497. case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
  1498. {
  1499. struct sq_fr_pmr *sqe = (struct sq_fr_pmr *)hw_sq_send_hdr;
  1500. sqe->wqe_type = wqe->type;
  1501. sqe->flags = wqe->flags;
  1502. sqe->access_cntl = wqe->frmr.access_cntl |
  1503. SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
  1504. sqe->zero_based_page_size_log =
  1505. (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
  1506. SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
  1507. (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
  1508. sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
  1509. temp32 = cpu_to_le32(wqe->frmr.length);
  1510. memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
  1511. sqe->numlevels_pbl_page_size_log =
  1512. ((wqe->frmr.pbl_pg_sz_log <<
  1513. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
  1514. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
  1515. ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
  1516. SQ_FR_PMR_NUMLEVELS_MASK);
  1517. for (i = 0; i < wqe->frmr.page_list_len; i++)
  1518. wqe->frmr.pbl_ptr[i] = cpu_to_le64(
  1519. wqe->frmr.page_list[i] |
  1520. PTU_PTE_VALID);
  1521. sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
  1522. sqe->va = cpu_to_le64(wqe->frmr.va);
  1523. break;
  1524. }
  1525. case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
  1526. {
  1527. struct sq_bind *sqe = (struct sq_bind *)hw_sq_send_hdr;
  1528. sqe->wqe_type = wqe->type;
  1529. sqe->flags = wqe->flags;
  1530. sqe->access_cntl = wqe->bind.access_cntl;
  1531. sqe->mw_type_zero_based = wqe->bind.mw_type |
  1532. (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
  1533. sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
  1534. sqe->l_key = cpu_to_le32(wqe->bind.r_key);
  1535. sqe->va = cpu_to_le64(wqe->bind.va);
  1536. temp32 = cpu_to_le32(wqe->bind.length);
  1537. memcpy(&sqe->length, &temp32, sizeof(wqe->bind.length));
  1538. break;
  1539. }
  1540. default:
  1541. /* Bad wqe, return error */
  1542. rc = -EINVAL;
  1543. goto done;
  1544. }
  1545. swq->next_psn = sq->psn & BTH_PSN_MASK;
  1546. if (swq->psn_search) {
  1547. swq->psn_search->opcode_start_psn = cpu_to_le32(
  1548. ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
  1549. SQ_PSN_SEARCH_START_PSN_MASK) |
  1550. ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
  1551. SQ_PSN_SEARCH_OPCODE_MASK));
  1552. swq->psn_search->flags_next_psn = cpu_to_le32(
  1553. ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
  1554. SQ_PSN_SEARCH_NEXT_PSN_MASK));
  1555. }
  1556. queue_err:
  1557. if (sch_handler) {
  1558. /* Store the ULP info in the software structures */
  1559. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1560. swq = &sq->swq[sw_prod];
  1561. swq->wr_id = wqe->wr_id;
  1562. swq->type = wqe->type;
  1563. swq->flags = wqe->flags;
  1564. if (qp->sig_type)
  1565. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1566. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1567. }
  1568. sq->hwq.prod++;
  1569. qp->wqe_cnt++;
  1570. done:
  1571. if (sch_handler) {
  1572. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1573. if (nq_work) {
  1574. nq_work->cq = qp->scq;
  1575. nq_work->nq = qp->scq->nq;
  1576. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1577. queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
  1578. } else {
  1579. dev_err(&sq->hwq.pdev->dev,
  1580. "QPLIB: FP: Failed to allocate SQ nq_work!");
  1581. rc = -ENOMEM;
  1582. }
  1583. }
  1584. return rc;
  1585. }
  1586. void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
  1587. {
  1588. struct bnxt_qplib_q *rq = &qp->rq;
  1589. struct dbr_dbr db_msg = { 0 };
  1590. u32 sw_prod;
  1591. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1592. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1593. DBR_DBR_INDEX_MASK);
  1594. db_msg.type_xid =
  1595. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1596. DBR_DBR_TYPE_RQ);
  1597. /* Flush the writes to HW Rx WQE before the ringing Rx DB */
  1598. wmb();
  1599. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1600. }
  1601. int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
  1602. struct bnxt_qplib_swqe *wqe)
  1603. {
  1604. struct bnxt_qplib_q *rq = &qp->rq;
  1605. struct rq_wqe *rqe, **rqe_ptr;
  1606. struct sq_sge *hw_sge;
  1607. struct bnxt_qplib_nq_work *nq_work = NULL;
  1608. bool sch_handler = false;
  1609. u32 sw_prod;
  1610. int i, rc = 0;
  1611. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1612. sch_handler = true;
  1613. dev_dbg(&rq->hwq.pdev->dev,
  1614. "%s Error QP. Scheduling for poll_cq\n",
  1615. __func__);
  1616. goto queue_err;
  1617. }
  1618. if (bnxt_qplib_queue_full(rq)) {
  1619. dev_err(&rq->hwq.pdev->dev,
  1620. "QPLIB: FP: QP (0x%x) RQ is full!", qp->id);
  1621. rc = -EINVAL;
  1622. goto done;
  1623. }
  1624. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1625. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1626. rqe_ptr = (struct rq_wqe **)rq->hwq.pbl_ptr;
  1627. rqe = &rqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  1628. memset(rqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  1629. /* Calculate wqe_size16 and data_len */
  1630. for (i = 0, hw_sge = (struct sq_sge *)rqe->data;
  1631. i < wqe->num_sge; i++, hw_sge++) {
  1632. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1633. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1634. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1635. }
  1636. rqe->wqe_type = wqe->type;
  1637. rqe->flags = wqe->flags;
  1638. rqe->wqe_size = wqe->num_sge +
  1639. ((offsetof(typeof(*rqe), data) + 15) >> 4);
  1640. /* HW requires wqe size has room for atleast one SGE even if none
  1641. * was supplied by ULP
  1642. */
  1643. if (!wqe->num_sge)
  1644. rqe->wqe_size++;
  1645. /* Supply the rqe->wr_id index to the wr_id_tbl for now */
  1646. rqe->wr_id[0] = cpu_to_le32(sw_prod);
  1647. queue_err:
  1648. if (sch_handler) {
  1649. /* Store the ULP info in the software structures */
  1650. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1651. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1652. }
  1653. rq->hwq.prod++;
  1654. if (sch_handler) {
  1655. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1656. if (nq_work) {
  1657. nq_work->cq = qp->rcq;
  1658. nq_work->nq = qp->rcq->nq;
  1659. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1660. queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
  1661. } else {
  1662. dev_err(&rq->hwq.pdev->dev,
  1663. "QPLIB: FP: Failed to allocate RQ nq_work!");
  1664. rc = -ENOMEM;
  1665. }
  1666. }
  1667. done:
  1668. return rc;
  1669. }
  1670. /* CQ */
  1671. /* Spinlock must be held */
  1672. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq)
  1673. {
  1674. struct dbr_dbr db_msg = { 0 };
  1675. db_msg.type_xid =
  1676. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1677. DBR_DBR_TYPE_CQ_ARMENA);
  1678. /* Flush memory writes before enabling the CQ */
  1679. wmb();
  1680. __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64));
  1681. }
  1682. static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  1683. {
  1684. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1685. struct dbr_dbr db_msg = { 0 };
  1686. u32 sw_cons;
  1687. /* Ring DB */
  1688. sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq);
  1689. db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) &
  1690. DBR_DBR_INDEX_MASK);
  1691. db_msg.type_xid =
  1692. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1693. arm_type);
  1694. /* flush memory writes before arming the CQ */
  1695. wmb();
  1696. __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1697. }
  1698. int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1699. {
  1700. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1701. struct cmdq_create_cq req;
  1702. struct creq_create_cq_resp resp;
  1703. struct bnxt_qplib_pbl *pbl;
  1704. u16 cmd_flags = 0;
  1705. int rc;
  1706. cq->hwq.max_elements = cq->max_wqe;
  1707. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &cq->hwq, cq->sghead,
  1708. cq->nmap, &cq->hwq.max_elements,
  1709. BNXT_QPLIB_MAX_CQE_ENTRY_SIZE, 0,
  1710. PAGE_SIZE, HWQ_TYPE_QUEUE);
  1711. if (rc)
  1712. goto exit;
  1713. RCFW_CMD_PREP(req, CREATE_CQ, cmd_flags);
  1714. if (!cq->dpi) {
  1715. dev_err(&rcfw->pdev->dev,
  1716. "QPLIB: FP: CREATE_CQ failed due to NULL DPI");
  1717. return -EINVAL;
  1718. }
  1719. req.dpi = cpu_to_le32(cq->dpi->dpi);
  1720. req.cq_handle = cpu_to_le64(cq->cq_handle);
  1721. req.cq_size = cpu_to_le32(cq->hwq.max_elements);
  1722. pbl = &cq->hwq.pbl[PBL_LVL_0];
  1723. req.pg_size_lvl = cpu_to_le32(
  1724. ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) <<
  1725. CMDQ_CREATE_CQ_LVL_SFT) |
  1726. (pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_CREATE_CQ_PG_SIZE_PG_4K :
  1727. pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_CREATE_CQ_PG_SIZE_PG_8K :
  1728. pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_CREATE_CQ_PG_SIZE_PG_64K :
  1729. pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_CREATE_CQ_PG_SIZE_PG_2M :
  1730. pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_CREATE_CQ_PG_SIZE_PG_8M :
  1731. pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_CREATE_CQ_PG_SIZE_PG_1G :
  1732. CMDQ_CREATE_CQ_PG_SIZE_PG_4K));
  1733. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  1734. req.cq_fco_cnq_id = cpu_to_le32(
  1735. (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
  1736. CMDQ_CREATE_CQ_CNQ_ID_SFT);
  1737. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1738. (void *)&resp, NULL, 0);
  1739. if (rc)
  1740. goto fail;
  1741. cq->id = le32_to_cpu(resp.xid);
  1742. cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  1743. cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
  1744. init_waitqueue_head(&cq->waitq);
  1745. INIT_LIST_HEAD(&cq->sqf_head);
  1746. INIT_LIST_HEAD(&cq->rqf_head);
  1747. spin_lock_init(&cq->compl_lock);
  1748. spin_lock_init(&cq->flush_lock);
  1749. bnxt_qplib_arm_cq_enable(cq);
  1750. return 0;
  1751. fail:
  1752. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1753. exit:
  1754. return rc;
  1755. }
  1756. int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1757. {
  1758. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1759. struct cmdq_destroy_cq req;
  1760. struct creq_destroy_cq_resp resp;
  1761. u16 cmd_flags = 0;
  1762. int rc;
  1763. RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags);
  1764. req.cq_cid = cpu_to_le32(cq->id);
  1765. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1766. (void *)&resp, NULL, 0);
  1767. if (rc)
  1768. return rc;
  1769. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1770. return 0;
  1771. }
  1772. static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
  1773. struct bnxt_qplib_cqe **pcqe, int *budget)
  1774. {
  1775. u32 sw_prod, sw_cons;
  1776. struct bnxt_qplib_cqe *cqe;
  1777. int rc = 0;
  1778. /* Now complete all outstanding SQEs with FLUSHED_ERR */
  1779. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1780. cqe = *pcqe;
  1781. while (*budget) {
  1782. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1783. if (sw_cons == sw_prod) {
  1784. break;
  1785. }
  1786. /* Skip the FENCE WQE completions */
  1787. if (sq->swq[sw_cons].wr_id == BNXT_QPLIB_FENCE_WRID) {
  1788. bnxt_qplib_cancel_phantom_processing(qp);
  1789. goto skip_compl;
  1790. }
  1791. memset(cqe, 0, sizeof(*cqe));
  1792. cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1793. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  1794. cqe->qp_handle = (u64)(unsigned long)qp;
  1795. cqe->wr_id = sq->swq[sw_cons].wr_id;
  1796. cqe->src_qp = qp->id;
  1797. cqe->type = sq->swq[sw_cons].type;
  1798. cqe++;
  1799. (*budget)--;
  1800. skip_compl:
  1801. sq->hwq.cons++;
  1802. }
  1803. *pcqe = cqe;
  1804. if (!(*budget) && HWQ_CMP(sq->hwq.cons, &sq->hwq) != sw_prod)
  1805. /* Out of budget */
  1806. rc = -EAGAIN;
  1807. return rc;
  1808. }
  1809. static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
  1810. struct bnxt_qplib_cqe **pcqe, int *budget)
  1811. {
  1812. struct bnxt_qplib_cqe *cqe;
  1813. u32 sw_prod, sw_cons;
  1814. int rc = 0;
  1815. int opcode = 0;
  1816. switch (qp->type) {
  1817. case CMDQ_CREATE_QP1_TYPE_GSI:
  1818. opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
  1819. break;
  1820. case CMDQ_CREATE_QP_TYPE_RC:
  1821. opcode = CQ_BASE_CQE_TYPE_RES_RC;
  1822. break;
  1823. case CMDQ_CREATE_QP_TYPE_UD:
  1824. opcode = CQ_BASE_CQE_TYPE_RES_UD;
  1825. break;
  1826. }
  1827. /* Flush the rest of the RQ */
  1828. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1829. cqe = *pcqe;
  1830. while (*budget) {
  1831. sw_cons = HWQ_CMP(rq->hwq.cons, &rq->hwq);
  1832. if (sw_cons == sw_prod)
  1833. break;
  1834. memset(cqe, 0, sizeof(*cqe));
  1835. cqe->status =
  1836. CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1837. cqe->opcode = opcode;
  1838. cqe->qp_handle = (unsigned long)qp;
  1839. cqe->wr_id = rq->swq[sw_cons].wr_id;
  1840. cqe++;
  1841. (*budget)--;
  1842. rq->hwq.cons++;
  1843. }
  1844. *pcqe = cqe;
  1845. if (!*budget && HWQ_CMP(rq->hwq.cons, &rq->hwq) != sw_prod)
  1846. /* Out of budget */
  1847. rc = -EAGAIN;
  1848. return rc;
  1849. }
  1850. void bnxt_qplib_mark_qp_error(void *qp_handle)
  1851. {
  1852. struct bnxt_qplib_qp *qp = qp_handle;
  1853. if (!qp)
  1854. return;
  1855. /* Must block new posting of SQ and RQ */
  1856. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  1857. bnxt_qplib_cancel_phantom_processing(qp);
  1858. }
  1859. /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
  1860. * CQE is track from sw_cq_cons to max_element but valid only if VALID=1
  1861. */
  1862. static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
  1863. u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons)
  1864. {
  1865. struct bnxt_qplib_q *sq = &qp->sq;
  1866. struct bnxt_qplib_swq *swq;
  1867. u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx;
  1868. struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr;
  1869. struct cq_req *peek_req_hwcqe;
  1870. struct bnxt_qplib_qp *peek_qp;
  1871. struct bnxt_qplib_q *peek_sq;
  1872. int i, rc = 0;
  1873. /* Normal mode */
  1874. /* Check for the psn_search marking before completing */
  1875. swq = &sq->swq[sw_sq_cons];
  1876. if (swq->psn_search &&
  1877. le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
  1878. /* Unmark */
  1879. swq->psn_search->flags_next_psn = cpu_to_le32
  1880. (le32_to_cpu(swq->psn_search->flags_next_psn)
  1881. & ~0x80000000);
  1882. dev_dbg(&cq->hwq.pdev->dev,
  1883. "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
  1884. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1885. sq->condition = true;
  1886. sq->send_phantom = true;
  1887. /* TODO: Only ARM if the previous SQE is ARMALL */
  1888. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL);
  1889. rc = -EAGAIN;
  1890. goto out;
  1891. }
  1892. if (sq->condition) {
  1893. /* Peek at the completions */
  1894. peek_raw_cq_cons = cq->hwq.cons;
  1895. peek_sw_cq_cons = cq_cons;
  1896. i = cq->hwq.max_elements;
  1897. while (i--) {
  1898. peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq);
  1899. peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  1900. peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)]
  1901. [CQE_IDX(peek_sw_cq_cons)];
  1902. /* If the next hwcqe is VALID */
  1903. if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons,
  1904. cq->hwq.max_elements)) {
  1905. /*
  1906. * The valid test of the entry must be done first before
  1907. * reading any further.
  1908. */
  1909. dma_rmb();
  1910. /* If the next hwcqe is a REQ */
  1911. if ((peek_hwcqe->cqe_type_toggle &
  1912. CQ_BASE_CQE_TYPE_MASK) ==
  1913. CQ_BASE_CQE_TYPE_REQ) {
  1914. peek_req_hwcqe = (struct cq_req *)
  1915. peek_hwcqe;
  1916. peek_qp = (struct bnxt_qplib_qp *)
  1917. ((unsigned long)
  1918. le64_to_cpu
  1919. (peek_req_hwcqe->qp_handle));
  1920. peek_sq = &peek_qp->sq;
  1921. peek_sq_cons_idx = HWQ_CMP(le16_to_cpu(
  1922. peek_req_hwcqe->sq_cons_idx) - 1
  1923. , &sq->hwq);
  1924. /* If the hwcqe's sq's wr_id matches */
  1925. if (peek_sq == sq &&
  1926. sq->swq[peek_sq_cons_idx].wr_id ==
  1927. BNXT_QPLIB_FENCE_WRID) {
  1928. /*
  1929. * Unbreak only if the phantom
  1930. * comes back
  1931. */
  1932. dev_dbg(&cq->hwq.pdev->dev,
  1933. "FP:Got Phantom CQE");
  1934. sq->condition = false;
  1935. sq->single = true;
  1936. rc = 0;
  1937. goto out;
  1938. }
  1939. }
  1940. /* Valid but not the phantom, so keep looping */
  1941. } else {
  1942. /* Not valid yet, just exit and wait */
  1943. rc = -EINVAL;
  1944. goto out;
  1945. }
  1946. peek_sw_cq_cons++;
  1947. peek_raw_cq_cons++;
  1948. }
  1949. dev_err(&cq->hwq.pdev->dev,
  1950. "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x",
  1951. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1952. rc = -EINVAL;
  1953. }
  1954. out:
  1955. return rc;
  1956. }
  1957. static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
  1958. struct cq_req *hwcqe,
  1959. struct bnxt_qplib_cqe **pcqe, int *budget,
  1960. u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
  1961. {
  1962. struct bnxt_qplib_qp *qp;
  1963. struct bnxt_qplib_q *sq;
  1964. struct bnxt_qplib_cqe *cqe;
  1965. u32 sw_sq_cons, cqe_sq_cons;
  1966. struct bnxt_qplib_swq *swq;
  1967. int rc = 0;
  1968. qp = (struct bnxt_qplib_qp *)((unsigned long)
  1969. le64_to_cpu(hwcqe->qp_handle));
  1970. if (!qp) {
  1971. dev_err(&cq->hwq.pdev->dev,
  1972. "QPLIB: FP: Process Req qp is NULL");
  1973. return -EINVAL;
  1974. }
  1975. sq = &qp->sq;
  1976. cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq);
  1977. if (cqe_sq_cons > sq->hwq.max_elements) {
  1978. dev_err(&cq->hwq.pdev->dev,
  1979. "QPLIB: FP: CQ Process req reported ");
  1980. dev_err(&cq->hwq.pdev->dev,
  1981. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  1982. cqe_sq_cons, sq->hwq.max_elements);
  1983. return -EINVAL;
  1984. }
  1985. if (qp->sq.flushed) {
  1986. dev_dbg(&cq->hwq.pdev->dev,
  1987. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  1988. goto done;
  1989. }
  1990. /* Require to walk the sq's swq to fabricate CQEs for all previously
  1991. * signaled SWQEs due to CQE aggregation from the current sq cons
  1992. * to the cqe_sq_cons
  1993. */
  1994. cqe = *pcqe;
  1995. while (*budget) {
  1996. sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1997. if (sw_sq_cons == cqe_sq_cons)
  1998. /* Done */
  1999. break;
  2000. swq = &sq->swq[sw_sq_cons];
  2001. memset(cqe, 0, sizeof(*cqe));
  2002. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  2003. cqe->qp_handle = (u64)(unsigned long)qp;
  2004. cqe->src_qp = qp->id;
  2005. cqe->wr_id = swq->wr_id;
  2006. if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
  2007. goto skip;
  2008. cqe->type = swq->type;
  2009. /* For the last CQE, check for status. For errors, regardless
  2010. * of the request being signaled or not, it must complete with
  2011. * the hwcqe error status
  2012. */
  2013. if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons &&
  2014. hwcqe->status != CQ_REQ_STATUS_OK) {
  2015. cqe->status = hwcqe->status;
  2016. dev_err(&cq->hwq.pdev->dev,
  2017. "QPLIB: FP: CQ Processed Req ");
  2018. dev_err(&cq->hwq.pdev->dev,
  2019. "QPLIB: wr_id[%d] = 0x%llx with status 0x%x",
  2020. sw_sq_cons, cqe->wr_id, cqe->status);
  2021. cqe++;
  2022. (*budget)--;
  2023. bnxt_qplib_mark_qp_error(qp);
  2024. /* Add qp to flush list of the CQ */
  2025. bnxt_qplib_add_flush_qp(qp);
  2026. } else {
  2027. /* Before we complete, do WA 9060 */
  2028. if (do_wa9060(qp, cq, cq_cons, sw_sq_cons,
  2029. cqe_sq_cons)) {
  2030. *lib_qp = qp;
  2031. goto out;
  2032. }
  2033. if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2034. cqe->status = CQ_REQ_STATUS_OK;
  2035. cqe++;
  2036. (*budget)--;
  2037. }
  2038. }
  2039. skip:
  2040. sq->hwq.cons++;
  2041. if (sq->single)
  2042. break;
  2043. }
  2044. out:
  2045. *pcqe = cqe;
  2046. if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) {
  2047. /* Out of budget */
  2048. rc = -EAGAIN;
  2049. goto done;
  2050. }
  2051. /*
  2052. * Back to normal completion mode only after it has completed all of
  2053. * the WC for this CQE
  2054. */
  2055. sq->single = false;
  2056. done:
  2057. return rc;
  2058. }
  2059. static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
  2060. {
  2061. spin_lock(&srq->hwq.lock);
  2062. srq->swq[srq->last_idx].next_idx = (int)tag;
  2063. srq->last_idx = (int)tag;
  2064. srq->swq[srq->last_idx].next_idx = -1;
  2065. srq->hwq.cons++; /* Support for SRQE counter */
  2066. spin_unlock(&srq->hwq.lock);
  2067. }
  2068. static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
  2069. struct cq_res_rc *hwcqe,
  2070. struct bnxt_qplib_cqe **pcqe,
  2071. int *budget)
  2072. {
  2073. struct bnxt_qplib_qp *qp;
  2074. struct bnxt_qplib_q *rq;
  2075. struct bnxt_qplib_srq *srq;
  2076. struct bnxt_qplib_cqe *cqe;
  2077. u32 wr_id_idx;
  2078. int rc = 0;
  2079. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2080. le64_to_cpu(hwcqe->qp_handle));
  2081. if (!qp) {
  2082. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL");
  2083. return -EINVAL;
  2084. }
  2085. if (qp->rq.flushed) {
  2086. dev_dbg(&cq->hwq.pdev->dev,
  2087. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2088. goto done;
  2089. }
  2090. cqe = *pcqe;
  2091. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2092. cqe->length = le32_to_cpu(hwcqe->length);
  2093. cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
  2094. cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
  2095. cqe->flags = le16_to_cpu(hwcqe->flags);
  2096. cqe->status = hwcqe->status;
  2097. cqe->qp_handle = (u64)(unsigned long)qp;
  2098. wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
  2099. CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
  2100. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2101. srq = qp->srq;
  2102. if (!srq)
  2103. return -EINVAL;
  2104. if (wr_id_idx >= srq->hwq.max_elements) {
  2105. dev_err(&cq->hwq.pdev->dev,
  2106. "QPLIB: FP: CQ Process RC ");
  2107. dev_err(&cq->hwq.pdev->dev,
  2108. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2109. wr_id_idx, srq->hwq.max_elements);
  2110. return -EINVAL;
  2111. }
  2112. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2113. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2114. cqe++;
  2115. (*budget)--;
  2116. *pcqe = cqe;
  2117. } else {
  2118. rq = &qp->rq;
  2119. if (wr_id_idx >= rq->hwq.max_elements) {
  2120. dev_err(&cq->hwq.pdev->dev,
  2121. "QPLIB: FP: CQ Process RC ");
  2122. dev_err(&cq->hwq.pdev->dev,
  2123. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2124. wr_id_idx, rq->hwq.max_elements);
  2125. return -EINVAL;
  2126. }
  2127. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2128. cqe++;
  2129. (*budget)--;
  2130. rq->hwq.cons++;
  2131. *pcqe = cqe;
  2132. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2133. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2134. /* Add qp to flush list of the CQ */
  2135. bnxt_qplib_add_flush_qp(qp);
  2136. }
  2137. }
  2138. done:
  2139. return rc;
  2140. }
  2141. static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
  2142. struct cq_res_ud *hwcqe,
  2143. struct bnxt_qplib_cqe **pcqe,
  2144. int *budget)
  2145. {
  2146. struct bnxt_qplib_qp *qp;
  2147. struct bnxt_qplib_q *rq;
  2148. struct bnxt_qplib_srq *srq;
  2149. struct bnxt_qplib_cqe *cqe;
  2150. u32 wr_id_idx;
  2151. int rc = 0;
  2152. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2153. le64_to_cpu(hwcqe->qp_handle));
  2154. if (!qp) {
  2155. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL");
  2156. return -EINVAL;
  2157. }
  2158. if (qp->rq.flushed) {
  2159. dev_dbg(&cq->hwq.pdev->dev,
  2160. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2161. goto done;
  2162. }
  2163. cqe = *pcqe;
  2164. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2165. cqe->length = le32_to_cpu(hwcqe->length);
  2166. cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
  2167. cqe->flags = le16_to_cpu(hwcqe->flags);
  2168. cqe->status = hwcqe->status;
  2169. cqe->qp_handle = (u64)(unsigned long)qp;
  2170. memcpy(cqe->smac, hwcqe->src_mac, 6);
  2171. wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
  2172. & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
  2173. cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
  2174. ((le32_to_cpu(
  2175. hwcqe->src_qp_high_srq_or_rq_wr_id) &
  2176. CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
  2177. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2178. srq = qp->srq;
  2179. if (!srq)
  2180. return -EINVAL;
  2181. if (wr_id_idx >= srq->hwq.max_elements) {
  2182. dev_err(&cq->hwq.pdev->dev,
  2183. "QPLIB: FP: CQ Process UD ");
  2184. dev_err(&cq->hwq.pdev->dev,
  2185. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2186. wr_id_idx, srq->hwq.max_elements);
  2187. return -EINVAL;
  2188. }
  2189. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2190. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2191. cqe++;
  2192. (*budget)--;
  2193. *pcqe = cqe;
  2194. } else {
  2195. rq = &qp->rq;
  2196. if (wr_id_idx >= rq->hwq.max_elements) {
  2197. dev_err(&cq->hwq.pdev->dev,
  2198. "QPLIB: FP: CQ Process UD ");
  2199. dev_err(&cq->hwq.pdev->dev,
  2200. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2201. wr_id_idx, rq->hwq.max_elements);
  2202. return -EINVAL;
  2203. }
  2204. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2205. cqe++;
  2206. (*budget)--;
  2207. rq->hwq.cons++;
  2208. *pcqe = cqe;
  2209. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2210. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2211. /* Add qp to flush list of the CQ */
  2212. bnxt_qplib_add_flush_qp(qp);
  2213. }
  2214. }
  2215. done:
  2216. return rc;
  2217. }
  2218. bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
  2219. {
  2220. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2221. u32 sw_cons, raw_cons;
  2222. bool rc = true;
  2223. raw_cons = cq->hwq.cons;
  2224. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2225. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2226. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2227. /* Check for Valid bit. If the CQE is valid, return false */
  2228. rc = !CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements);
  2229. return rc;
  2230. }
  2231. static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
  2232. struct cq_res_raweth_qp1 *hwcqe,
  2233. struct bnxt_qplib_cqe **pcqe,
  2234. int *budget)
  2235. {
  2236. struct bnxt_qplib_qp *qp;
  2237. struct bnxt_qplib_q *rq;
  2238. struct bnxt_qplib_srq *srq;
  2239. struct bnxt_qplib_cqe *cqe;
  2240. u32 wr_id_idx;
  2241. int rc = 0;
  2242. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2243. le64_to_cpu(hwcqe->qp_handle));
  2244. if (!qp) {
  2245. dev_err(&cq->hwq.pdev->dev,
  2246. "QPLIB: process_cq Raw/QP1 qp is NULL");
  2247. return -EINVAL;
  2248. }
  2249. if (qp->rq.flushed) {
  2250. dev_dbg(&cq->hwq.pdev->dev,
  2251. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2252. goto done;
  2253. }
  2254. cqe = *pcqe;
  2255. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2256. cqe->flags = le16_to_cpu(hwcqe->flags);
  2257. cqe->qp_handle = (u64)(unsigned long)qp;
  2258. wr_id_idx =
  2259. le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
  2260. & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
  2261. cqe->src_qp = qp->id;
  2262. if (qp->id == 1 && !cqe->length) {
  2263. /* Add workaround for the length misdetection */
  2264. cqe->length = 296;
  2265. } else {
  2266. cqe->length = le16_to_cpu(hwcqe->length);
  2267. }
  2268. cqe->pkey_index = qp->pkey_index;
  2269. memcpy(cqe->smac, qp->smac, 6);
  2270. cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
  2271. cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
  2272. cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
  2273. if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
  2274. srq = qp->srq;
  2275. if (!srq) {
  2276. dev_err(&cq->hwq.pdev->dev,
  2277. "QPLIB: FP: SRQ used but not defined??");
  2278. return -EINVAL;
  2279. }
  2280. if (wr_id_idx >= srq->hwq.max_elements) {
  2281. dev_err(&cq->hwq.pdev->dev,
  2282. "QPLIB: FP: CQ Process Raw/QP1 ");
  2283. dev_err(&cq->hwq.pdev->dev,
  2284. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2285. wr_id_idx, srq->hwq.max_elements);
  2286. return -EINVAL;
  2287. }
  2288. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2289. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2290. cqe++;
  2291. (*budget)--;
  2292. *pcqe = cqe;
  2293. } else {
  2294. rq = &qp->rq;
  2295. if (wr_id_idx >= rq->hwq.max_elements) {
  2296. dev_err(&cq->hwq.pdev->dev,
  2297. "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id ");
  2298. dev_err(&cq->hwq.pdev->dev,
  2299. "QPLIB: ix 0x%x exceeded RQ max 0x%x",
  2300. wr_id_idx, rq->hwq.max_elements);
  2301. return -EINVAL;
  2302. }
  2303. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2304. cqe++;
  2305. (*budget)--;
  2306. rq->hwq.cons++;
  2307. *pcqe = cqe;
  2308. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2309. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2310. /* Add qp to flush list of the CQ */
  2311. bnxt_qplib_add_flush_qp(qp);
  2312. }
  2313. }
  2314. done:
  2315. return rc;
  2316. }
  2317. static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
  2318. struct cq_terminal *hwcqe,
  2319. struct bnxt_qplib_cqe **pcqe,
  2320. int *budget)
  2321. {
  2322. struct bnxt_qplib_qp *qp;
  2323. struct bnxt_qplib_q *sq, *rq;
  2324. struct bnxt_qplib_cqe *cqe;
  2325. u32 sw_cons = 0, cqe_cons;
  2326. int rc = 0;
  2327. /* Check the Status */
  2328. if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
  2329. dev_warn(&cq->hwq.pdev->dev,
  2330. "QPLIB: FP: CQ Process Terminal Error status = 0x%x",
  2331. hwcqe->status);
  2332. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2333. le64_to_cpu(hwcqe->qp_handle));
  2334. if (!qp) {
  2335. dev_err(&cq->hwq.pdev->dev,
  2336. "QPLIB: FP: CQ Process terminal qp is NULL");
  2337. return -EINVAL;
  2338. }
  2339. /* Must block new posting of SQ and RQ */
  2340. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2341. sq = &qp->sq;
  2342. rq = &qp->rq;
  2343. cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
  2344. if (cqe_cons == 0xFFFF)
  2345. goto do_rq;
  2346. if (cqe_cons > sq->hwq.max_elements) {
  2347. dev_err(&cq->hwq.pdev->dev,
  2348. "QPLIB: FP: CQ Process terminal reported ");
  2349. dev_err(&cq->hwq.pdev->dev,
  2350. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  2351. cqe_cons, sq->hwq.max_elements);
  2352. goto do_rq;
  2353. }
  2354. if (qp->sq.flushed) {
  2355. dev_dbg(&cq->hwq.pdev->dev,
  2356. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2357. goto sq_done;
  2358. }
  2359. /* Terminal CQE can also include aggregated successful CQEs prior.
  2360. * So we must complete all CQEs from the current sq's cons to the
  2361. * cq_cons with status OK
  2362. */
  2363. cqe = *pcqe;
  2364. while (*budget) {
  2365. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  2366. if (sw_cons == cqe_cons)
  2367. break;
  2368. if (sq->swq[sw_cons].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2369. memset(cqe, 0, sizeof(*cqe));
  2370. cqe->status = CQ_REQ_STATUS_OK;
  2371. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  2372. cqe->qp_handle = (u64)(unsigned long)qp;
  2373. cqe->src_qp = qp->id;
  2374. cqe->wr_id = sq->swq[sw_cons].wr_id;
  2375. cqe->type = sq->swq[sw_cons].type;
  2376. cqe++;
  2377. (*budget)--;
  2378. }
  2379. sq->hwq.cons++;
  2380. }
  2381. *pcqe = cqe;
  2382. if (!(*budget) && sw_cons != cqe_cons) {
  2383. /* Out of budget */
  2384. rc = -EAGAIN;
  2385. goto sq_done;
  2386. }
  2387. sq_done:
  2388. if (rc)
  2389. return rc;
  2390. do_rq:
  2391. cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
  2392. if (cqe_cons == 0xFFFF) {
  2393. goto done;
  2394. } else if (cqe_cons > rq->hwq.max_elements) {
  2395. dev_err(&cq->hwq.pdev->dev,
  2396. "QPLIB: FP: CQ Processed terminal ");
  2397. dev_err(&cq->hwq.pdev->dev,
  2398. "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x",
  2399. cqe_cons, rq->hwq.max_elements);
  2400. goto done;
  2401. }
  2402. if (qp->rq.flushed) {
  2403. dev_dbg(&cq->hwq.pdev->dev,
  2404. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2405. rc = 0;
  2406. goto done;
  2407. }
  2408. /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
  2409. * from the current rq->cons to the rq->prod regardless what the
  2410. * rq->cons the terminal CQE indicates
  2411. */
  2412. /* Add qp to flush list of the CQ */
  2413. bnxt_qplib_add_flush_qp(qp);
  2414. done:
  2415. return rc;
  2416. }
  2417. static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
  2418. struct cq_cutoff *hwcqe)
  2419. {
  2420. /* Check the Status */
  2421. if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
  2422. dev_err(&cq->hwq.pdev->dev,
  2423. "QPLIB: FP: CQ Process Cutoff Error status = 0x%x",
  2424. hwcqe->status);
  2425. return -EINVAL;
  2426. }
  2427. clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
  2428. wake_up_interruptible(&cq->waitq);
  2429. return 0;
  2430. }
  2431. int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
  2432. struct bnxt_qplib_cqe *cqe,
  2433. int num_cqes)
  2434. {
  2435. struct bnxt_qplib_qp *qp = NULL;
  2436. u32 budget = num_cqes;
  2437. unsigned long flags;
  2438. spin_lock_irqsave(&cq->flush_lock, flags);
  2439. list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
  2440. dev_dbg(&cq->hwq.pdev->dev,
  2441. "QPLIB: FP: Flushing SQ QP= %p",
  2442. qp);
  2443. __flush_sq(&qp->sq, qp, &cqe, &budget);
  2444. }
  2445. list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
  2446. dev_dbg(&cq->hwq.pdev->dev,
  2447. "QPLIB: FP: Flushing RQ QP= %p",
  2448. qp);
  2449. __flush_rq(&qp->rq, qp, &cqe, &budget);
  2450. }
  2451. spin_unlock_irqrestore(&cq->flush_lock, flags);
  2452. return num_cqes - budget;
  2453. }
  2454. int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
  2455. int num_cqes, struct bnxt_qplib_qp **lib_qp)
  2456. {
  2457. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2458. u32 sw_cons, raw_cons;
  2459. int budget, rc = 0;
  2460. raw_cons = cq->hwq.cons;
  2461. budget = num_cqes;
  2462. while (budget) {
  2463. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2464. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2465. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2466. /* Check for Valid bit */
  2467. if (!CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements))
  2468. break;
  2469. /*
  2470. * The valid test of the entry must be done first before
  2471. * reading any further.
  2472. */
  2473. dma_rmb();
  2474. /* From the device's respective CQE format to qplib_wc*/
  2475. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  2476. case CQ_BASE_CQE_TYPE_REQ:
  2477. rc = bnxt_qplib_cq_process_req(cq,
  2478. (struct cq_req *)hw_cqe,
  2479. &cqe, &budget,
  2480. sw_cons, lib_qp);
  2481. break;
  2482. case CQ_BASE_CQE_TYPE_RES_RC:
  2483. rc = bnxt_qplib_cq_process_res_rc(cq,
  2484. (struct cq_res_rc *)
  2485. hw_cqe, &cqe,
  2486. &budget);
  2487. break;
  2488. case CQ_BASE_CQE_TYPE_RES_UD:
  2489. rc = bnxt_qplib_cq_process_res_ud
  2490. (cq, (struct cq_res_ud *)hw_cqe, &cqe,
  2491. &budget);
  2492. break;
  2493. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  2494. rc = bnxt_qplib_cq_process_res_raweth_qp1
  2495. (cq, (struct cq_res_raweth_qp1 *)
  2496. hw_cqe, &cqe, &budget);
  2497. break;
  2498. case CQ_BASE_CQE_TYPE_TERMINAL:
  2499. rc = bnxt_qplib_cq_process_terminal
  2500. (cq, (struct cq_terminal *)hw_cqe,
  2501. &cqe, &budget);
  2502. break;
  2503. case CQ_BASE_CQE_TYPE_CUT_OFF:
  2504. bnxt_qplib_cq_process_cutoff
  2505. (cq, (struct cq_cutoff *)hw_cqe);
  2506. /* Done processing this CQ */
  2507. goto exit;
  2508. default:
  2509. dev_err(&cq->hwq.pdev->dev,
  2510. "QPLIB: process_cq unknown type 0x%lx",
  2511. hw_cqe->cqe_type_toggle &
  2512. CQ_BASE_CQE_TYPE_MASK);
  2513. rc = -EINVAL;
  2514. break;
  2515. }
  2516. if (rc < 0) {
  2517. if (rc == -EAGAIN)
  2518. break;
  2519. /* Error while processing the CQE, just skip to the
  2520. * next one
  2521. */
  2522. dev_err(&cq->hwq.pdev->dev,
  2523. "QPLIB: process_cqe error rc = 0x%x", rc);
  2524. }
  2525. raw_cons++;
  2526. }
  2527. if (cq->hwq.cons != raw_cons) {
  2528. cq->hwq.cons = raw_cons;
  2529. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ);
  2530. }
  2531. exit:
  2532. return num_cqes - budget;
  2533. }
  2534. void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  2535. {
  2536. if (arm_type)
  2537. bnxt_qplib_arm_cq(cq, arm_type);
  2538. /* Using cq->arm_state variable to track whether to issue cq handler */
  2539. atomic_set(&cq->arm_state, 1);
  2540. }
  2541. void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
  2542. {
  2543. flush_workqueue(qp->scq->nq->cqn_wq);
  2544. if (qp->scq != qp->rcq)
  2545. flush_workqueue(qp->rcq->nq->cqn_wq);
  2546. }