rx.c 18 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc.
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000-2010 Adaptec, Inc.
  9. * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
  10. * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Module Name:
  27. * rx.c
  28. *
  29. * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  30. *
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/init.h>
  34. #include <linux/types.h>
  35. #include <linux/pci.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/delay.h>
  39. #include <linux/completion.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <scsi/scsi_host.h>
  43. #include "aacraid.h"
  44. static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id)
  45. {
  46. struct aac_dev *dev = dev_id;
  47. unsigned long bellbits;
  48. u8 intstat = rx_readb(dev, MUnit.OISR);
  49. /*
  50. * Read mask and invert because drawbridge is reversed.
  51. * This allows us to only service interrupts that have
  52. * been enabled.
  53. * Check to see if this is our interrupt. If it isn't just return
  54. */
  55. if (likely(intstat & ~(dev->OIMR))) {
  56. bellbits = rx_readl(dev, OutboundDoorbellReg);
  57. if (unlikely(bellbits & DoorBellPrintfReady)) {
  58. aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5]));
  59. rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  60. rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  61. }
  62. else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) {
  63. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  64. aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  65. }
  66. else if (likely(bellbits & DoorBellAdapterNormRespReady)) {
  67. rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  68. aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  69. }
  70. else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) {
  71. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  72. }
  73. else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) {
  74. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  75. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
  76. }
  77. return IRQ_HANDLED;
  78. }
  79. return IRQ_NONE;
  80. }
  81. static irqreturn_t aac_rx_intr_message(int irq, void *dev_id)
  82. {
  83. int isAif, isFastResponse, isSpecial;
  84. struct aac_dev *dev = dev_id;
  85. u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  86. if (unlikely(Index == 0xFFFFFFFFL))
  87. Index = rx_readl(dev, MUnit.OutboundQueue);
  88. if (likely(Index != 0xFFFFFFFFL)) {
  89. do {
  90. isAif = isFastResponse = isSpecial = 0;
  91. if (Index & 0x00000002L) {
  92. isAif = 1;
  93. if (Index == 0xFFFFFFFEL)
  94. isSpecial = 1;
  95. Index &= ~0x00000002L;
  96. } else {
  97. if (Index & 0x00000001L)
  98. isFastResponse = 1;
  99. Index >>= 2;
  100. }
  101. if (!isSpecial) {
  102. if (unlikely(aac_intr_normal(dev,
  103. Index, isAif,
  104. isFastResponse, NULL))) {
  105. rx_writel(dev,
  106. MUnit.OutboundQueue,
  107. Index);
  108. rx_writel(dev,
  109. MUnit.ODR,
  110. DoorBellAdapterNormRespReady);
  111. }
  112. }
  113. Index = rx_readl(dev, MUnit.OutboundQueue);
  114. } while (Index != 0xFFFFFFFFL);
  115. return IRQ_HANDLED;
  116. }
  117. return IRQ_NONE;
  118. }
  119. /**
  120. * aac_rx_disable_interrupt - Disable interrupts
  121. * @dev: Adapter
  122. */
  123. static void aac_rx_disable_interrupt(struct aac_dev *dev)
  124. {
  125. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  126. }
  127. /**
  128. * aac_rx_enable_interrupt_producer - Enable interrupts
  129. * @dev: Adapter
  130. */
  131. static void aac_rx_enable_interrupt_producer(struct aac_dev *dev)
  132. {
  133. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  134. }
  135. /**
  136. * aac_rx_enable_interrupt_message - Enable interrupts
  137. * @dev: Adapter
  138. */
  139. static void aac_rx_enable_interrupt_message(struct aac_dev *dev)
  140. {
  141. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  142. }
  143. /**
  144. * rx_sync_cmd - send a command and wait
  145. * @dev: Adapter
  146. * @command: Command to execute
  147. * @p1: first parameter
  148. * @ret: adapter status
  149. *
  150. * This routine will send a synchronous command to the adapter and wait
  151. * for its completion.
  152. */
  153. static int rx_sync_cmd(struct aac_dev *dev, u32 command,
  154. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  155. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  156. {
  157. unsigned long start;
  158. int ok;
  159. /*
  160. * Write the command into Mailbox 0
  161. */
  162. writel(command, &dev->IndexRegs->Mailbox[0]);
  163. /*
  164. * Write the parameters into Mailboxes 1 - 6
  165. */
  166. writel(p1, &dev->IndexRegs->Mailbox[1]);
  167. writel(p2, &dev->IndexRegs->Mailbox[2]);
  168. writel(p3, &dev->IndexRegs->Mailbox[3]);
  169. writel(p4, &dev->IndexRegs->Mailbox[4]);
  170. /*
  171. * Clear the synch command doorbell to start on a clean slate.
  172. */
  173. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  174. /*
  175. * Disable doorbell interrupts
  176. */
  177. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  178. /*
  179. * Force the completion of the mask register write before issuing
  180. * the interrupt.
  181. */
  182. rx_readb (dev, MUnit.OIMR);
  183. /*
  184. * Signal that there is a new synch command
  185. */
  186. rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
  187. ok = 0;
  188. start = jiffies;
  189. /*
  190. * Wait up to 30 seconds
  191. */
  192. while (time_before(jiffies, start+30*HZ))
  193. {
  194. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  195. /*
  196. * Mon960 will set doorbell0 bit when it has completed the command.
  197. */
  198. if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
  199. /*
  200. * Clear the doorbell.
  201. */
  202. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  203. ok = 1;
  204. break;
  205. }
  206. /*
  207. * Yield the processor in case we are slow
  208. */
  209. msleep(1);
  210. }
  211. if (unlikely(ok != 1)) {
  212. /*
  213. * Restore interrupt mask even though we timed out
  214. */
  215. aac_adapter_enable_int(dev);
  216. return -ETIMEDOUT;
  217. }
  218. /*
  219. * Pull the synch status from Mailbox 0.
  220. */
  221. if (status)
  222. *status = readl(&dev->IndexRegs->Mailbox[0]);
  223. if (r1)
  224. *r1 = readl(&dev->IndexRegs->Mailbox[1]);
  225. if (r2)
  226. *r2 = readl(&dev->IndexRegs->Mailbox[2]);
  227. if (r3)
  228. *r3 = readl(&dev->IndexRegs->Mailbox[3]);
  229. if (r4)
  230. *r4 = readl(&dev->IndexRegs->Mailbox[4]);
  231. /*
  232. * Clear the synch command doorbell.
  233. */
  234. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  235. /*
  236. * Restore interrupt mask
  237. */
  238. aac_adapter_enable_int(dev);
  239. return 0;
  240. }
  241. /**
  242. * aac_rx_interrupt_adapter - interrupt adapter
  243. * @dev: Adapter
  244. *
  245. * Send an interrupt to the i960 and breakpoint it.
  246. */
  247. static void aac_rx_interrupt_adapter(struct aac_dev *dev)
  248. {
  249. rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  250. }
  251. /**
  252. * aac_rx_notify_adapter - send an event to the adapter
  253. * @dev: Adapter
  254. * @event: Event to send
  255. *
  256. * Notify the i960 that something it probably cares about has
  257. * happened.
  258. */
  259. static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
  260. {
  261. switch (event) {
  262. case AdapNormCmdQue:
  263. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
  264. break;
  265. case HostNormRespNotFull:
  266. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
  267. break;
  268. case AdapNormRespQue:
  269. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
  270. break;
  271. case HostNormCmdNotFull:
  272. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
  273. break;
  274. case HostShutdown:
  275. break;
  276. case FastIo:
  277. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
  278. break;
  279. case AdapPrintfDone:
  280. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
  281. break;
  282. default:
  283. BUG();
  284. break;
  285. }
  286. }
  287. /**
  288. * aac_rx_start_adapter - activate adapter
  289. * @dev: Adapter
  290. *
  291. * Start up processing on an i960 based AAC adapter
  292. */
  293. static void aac_rx_start_adapter(struct aac_dev *dev)
  294. {
  295. union aac_init *init;
  296. init = dev->init;
  297. init->r7.host_elapsed_seconds = cpu_to_le32(ktime_get_real_seconds());
  298. // We can only use a 32 bit address here
  299. rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  300. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  301. }
  302. /**
  303. * aac_rx_check_health
  304. * @dev: device to check if healthy
  305. *
  306. * Will attempt to determine if the specified adapter is alive and
  307. * capable of handling requests, returning 0 if alive.
  308. */
  309. static int aac_rx_check_health(struct aac_dev *dev)
  310. {
  311. u32 status = rx_readl(dev, MUnit.OMRx[0]);
  312. /*
  313. * Check to see if the board failed any self tests.
  314. */
  315. if (unlikely(status & SELF_TEST_FAILED))
  316. return -1;
  317. /*
  318. * Check to see if the board panic'd.
  319. */
  320. if (unlikely(status & KERNEL_PANIC)) {
  321. char * buffer;
  322. struct POSTSTATUS {
  323. __le32 Post_Command;
  324. __le32 Post_Address;
  325. } * post;
  326. dma_addr_t paddr, baddr;
  327. int ret;
  328. if (likely((status & 0xFF000000L) == 0xBC000000L))
  329. return (status >> 16) & 0xFF;
  330. buffer = dma_alloc_coherent(&dev->pdev->dev, 512, &baddr,
  331. GFP_KERNEL);
  332. ret = -2;
  333. if (unlikely(buffer == NULL))
  334. return ret;
  335. post = dma_alloc_coherent(&dev->pdev->dev,
  336. sizeof(struct POSTSTATUS), &paddr,
  337. GFP_KERNEL);
  338. if (unlikely(post == NULL)) {
  339. dma_free_coherent(&dev->pdev->dev, 512, buffer, baddr);
  340. return ret;
  341. }
  342. memset(buffer, 0, 512);
  343. post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
  344. post->Post_Address = cpu_to_le32(baddr);
  345. rx_writel(dev, MUnit.IMRx[0], paddr);
  346. rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
  347. NULL, NULL, NULL, NULL, NULL);
  348. dma_free_coherent(&dev->pdev->dev, sizeof(struct POSTSTATUS),
  349. post, paddr);
  350. if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) {
  351. ret = (hex_to_bin(buffer[2]) << 4) +
  352. hex_to_bin(buffer[3]);
  353. }
  354. dma_free_coherent(&dev->pdev->dev, 512, buffer, baddr);
  355. return ret;
  356. }
  357. /*
  358. * Wait for the adapter to be up and running.
  359. */
  360. if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
  361. return -3;
  362. /*
  363. * Everything is OK
  364. */
  365. return 0;
  366. }
  367. /**
  368. * aac_rx_deliver_producer
  369. * @fib: fib to issue
  370. *
  371. * Will send a fib, returning 0 if successful.
  372. */
  373. int aac_rx_deliver_producer(struct fib * fib)
  374. {
  375. struct aac_dev *dev = fib->dev;
  376. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  377. u32 Index;
  378. unsigned long nointr = 0;
  379. aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr);
  380. atomic_inc(&q->numpending);
  381. *(q->headers.producer) = cpu_to_le32(Index + 1);
  382. if (!(nointr & aac_config.irq_mod))
  383. aac_adapter_notify(dev, AdapNormCmdQueue);
  384. return 0;
  385. }
  386. /**
  387. * aac_rx_deliver_message
  388. * @fib: fib to issue
  389. *
  390. * Will send a fib, returning 0 if successful.
  391. */
  392. static int aac_rx_deliver_message(struct fib * fib)
  393. {
  394. struct aac_dev *dev = fib->dev;
  395. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  396. u32 Index;
  397. u64 addr;
  398. volatile void __iomem *device;
  399. unsigned long count = 10000000L; /* 50 seconds */
  400. atomic_inc(&q->numpending);
  401. for(;;) {
  402. Index = rx_readl(dev, MUnit.InboundQueue);
  403. if (unlikely(Index == 0xFFFFFFFFL))
  404. Index = rx_readl(dev, MUnit.InboundQueue);
  405. if (likely(Index != 0xFFFFFFFFL))
  406. break;
  407. if (--count == 0) {
  408. atomic_dec(&q->numpending);
  409. return -ETIMEDOUT;
  410. }
  411. udelay(5);
  412. }
  413. device = dev->base + Index;
  414. addr = fib->hw_fib_pa;
  415. writel((u32)(addr & 0xffffffff), device);
  416. device += sizeof(u32);
  417. writel((u32)(addr >> 32), device);
  418. device += sizeof(u32);
  419. writel(le16_to_cpu(fib->hw_fib_va->header.Size), device);
  420. rx_writel(dev, MUnit.InboundQueue, Index);
  421. return 0;
  422. }
  423. /**
  424. * aac_rx_ioremap
  425. * @size: mapping resize request
  426. *
  427. */
  428. static int aac_rx_ioremap(struct aac_dev * dev, u32 size)
  429. {
  430. if (!size) {
  431. iounmap(dev->regs.rx);
  432. return 0;
  433. }
  434. dev->base = dev->regs.rx = ioremap(dev->base_start, size);
  435. if (dev->base == NULL)
  436. return -1;
  437. dev->IndexRegs = &dev->regs.rx->IndexRegs;
  438. return 0;
  439. }
  440. static int aac_rx_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type)
  441. {
  442. u32 var = 0;
  443. if (!(dev->supplement_adapter_info.supported_options2 &
  444. AAC_OPTION_MU_RESET) || (bled >= 0) || (bled == -2)) {
  445. if (bled)
  446. printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
  447. dev->name, dev->id, bled);
  448. else {
  449. bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
  450. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  451. if (!bled && (var != 0x00000001) && (var != 0x3803000F))
  452. bled = -EINVAL;
  453. }
  454. if (bled && (bled != -ETIMEDOUT))
  455. bled = aac_adapter_sync_cmd(dev, IOP_RESET,
  456. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  457. if (bled && (bled != -ETIMEDOUT))
  458. return -EINVAL;
  459. }
  460. if (bled && (var == 0x3803000F)) { /* USE_OTHER_METHOD */
  461. rx_writel(dev, MUnit.reserved2, 3);
  462. msleep(5000); /* Delay 5 seconds */
  463. var = 0x00000001;
  464. }
  465. if (bled && (var != 0x00000001))
  466. return -EINVAL;
  467. ssleep(5);
  468. if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC)
  469. return -ENODEV;
  470. if (startup_timeout < 300)
  471. startup_timeout = 300;
  472. return 0;
  473. }
  474. /**
  475. * aac_rx_select_comm - Select communications method
  476. * @dev: Adapter
  477. * @comm: communications method
  478. */
  479. int aac_rx_select_comm(struct aac_dev *dev, int comm)
  480. {
  481. switch (comm) {
  482. case AAC_COMM_PRODUCER:
  483. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer;
  484. dev->a_ops.adapter_intr = aac_rx_intr_producer;
  485. dev->a_ops.adapter_deliver = aac_rx_deliver_producer;
  486. break;
  487. case AAC_COMM_MESSAGE:
  488. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message;
  489. dev->a_ops.adapter_intr = aac_rx_intr_message;
  490. dev->a_ops.adapter_deliver = aac_rx_deliver_message;
  491. break;
  492. default:
  493. return 1;
  494. }
  495. return 0;
  496. }
  497. /**
  498. * aac_rx_init - initialize an i960 based AAC card
  499. * @dev: device to configure
  500. *
  501. * Allocate and set up resources for the i960 based AAC variants. The
  502. * device_interface in the commregion will be allocated and linked
  503. * to the comm region.
  504. */
  505. int _aac_rx_init(struct aac_dev *dev)
  506. {
  507. unsigned long start;
  508. unsigned long status;
  509. int restart = 0;
  510. int instance = dev->id;
  511. const char * name = dev->name;
  512. if (aac_adapter_ioremap(dev, dev->base_size)) {
  513. printk(KERN_WARNING "%s: unable to map adapter.\n", name);
  514. goto error_iounmap;
  515. }
  516. /* Failure to reset here is an option ... */
  517. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  518. dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt;
  519. dev->OIMR = status = rx_readb (dev, MUnit.OIMR);
  520. if (((status & 0x0c) != 0x0c) || dev->init_reset) {
  521. dev->init_reset = false;
  522. if (!aac_rx_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) {
  523. /* Make sure the Hardware FIFO is empty */
  524. while ((++restart < 512) &&
  525. (rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL));
  526. }
  527. }
  528. /*
  529. * Check to see if the board panic'd while booting.
  530. */
  531. status = rx_readl(dev, MUnit.OMRx[0]);
  532. if (status & KERNEL_PANIC) {
  533. if (aac_rx_restart_adapter(dev,
  534. aac_rx_check_health(dev), IOP_HWSOFT_RESET))
  535. goto error_iounmap;
  536. ++restart;
  537. }
  538. /*
  539. * Check to see if the board failed any self tests.
  540. */
  541. status = rx_readl(dev, MUnit.OMRx[0]);
  542. if (status & SELF_TEST_FAILED) {
  543. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  544. goto error_iounmap;
  545. }
  546. /*
  547. * Check to see if the monitor panic'd while booting.
  548. */
  549. if (status & MONITOR_PANIC) {
  550. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  551. goto error_iounmap;
  552. }
  553. start = jiffies;
  554. /*
  555. * Wait for the adapter to be up and running. Wait up to 3 minutes
  556. */
  557. while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING))
  558. {
  559. if ((restart &&
  560. (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
  561. time_after(jiffies, start+HZ*startup_timeout)) {
  562. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  563. dev->name, instance, status);
  564. goto error_iounmap;
  565. }
  566. if (!restart &&
  567. ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
  568. time_after(jiffies, start + HZ *
  569. ((startup_timeout > 60)
  570. ? (startup_timeout - 60)
  571. : (startup_timeout / 2))))) {
  572. if (likely(!aac_rx_restart_adapter(dev,
  573. aac_rx_check_health(dev), IOP_HWSOFT_RESET)))
  574. start = jiffies;
  575. ++restart;
  576. }
  577. msleep(1);
  578. }
  579. if (restart && aac_commit)
  580. aac_commit = 1;
  581. /*
  582. * Fill in the common function dispatch table.
  583. */
  584. dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
  585. dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
  586. dev->a_ops.adapter_notify = aac_rx_notify_adapter;
  587. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  588. dev->a_ops.adapter_check_health = aac_rx_check_health;
  589. dev->a_ops.adapter_restart = aac_rx_restart_adapter;
  590. dev->a_ops.adapter_start = aac_rx_start_adapter;
  591. /*
  592. * First clear out all interrupts. Then enable the one's that we
  593. * can handle.
  594. */
  595. aac_adapter_comm(dev, AAC_COMM_PRODUCER);
  596. aac_adapter_disable_int(dev);
  597. rx_writel(dev, MUnit.ODR, 0xffffffff);
  598. aac_adapter_enable_int(dev);
  599. if (aac_init_adapter(dev) == NULL)
  600. goto error_iounmap;
  601. aac_adapter_comm(dev, dev->comm_interface);
  602. dev->sync_mode = 0; /* sync. mode not supported */
  603. dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
  604. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  605. IRQF_SHARED, "aacraid", dev) < 0) {
  606. if (dev->msi)
  607. pci_disable_msi(dev->pdev);
  608. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  609. name, instance);
  610. goto error_iounmap;
  611. }
  612. dev->dbg_base = dev->base_start;
  613. dev->dbg_base_mapped = dev->base;
  614. dev->dbg_size = dev->base_size;
  615. aac_adapter_enable_int(dev);
  616. /*
  617. * Tell the adapter that all is configured, and it can
  618. * start accepting requests
  619. */
  620. aac_rx_start_adapter(dev);
  621. return 0;
  622. error_iounmap:
  623. return -1;
  624. }
  625. int aac_rx_init(struct aac_dev *dev)
  626. {
  627. /*
  628. * Fill in the function dispatch table.
  629. */
  630. dev->a_ops.adapter_ioremap = aac_rx_ioremap;
  631. dev->a_ops.adapter_comm = aac_rx_select_comm;
  632. return _aac_rx_init(dev);
  633. }