hisi_sas_main.c 65 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. */
  11. #include "hisi_sas.h"
  12. #include "../libsas/sas_internal.h"
  13. #define DRV_NAME "hisi_sas"
  14. #define DEV_IS_GONE(dev) \
  15. ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
  16. static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
  17. u8 *lun, struct hisi_sas_tmf_task *tmf);
  18. static int
  19. hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
  20. struct domain_device *device,
  21. int abort_flag, int tag);
  22. static int hisi_sas_softreset_ata_disk(struct domain_device *device);
  23. static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
  24. void *funcdata);
  25. static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
  26. struct domain_device *device);
  27. static void hisi_sas_dev_gone(struct domain_device *device);
  28. u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
  29. {
  30. switch (fis->command) {
  31. case ATA_CMD_FPDMA_WRITE:
  32. case ATA_CMD_FPDMA_READ:
  33. case ATA_CMD_FPDMA_RECV:
  34. case ATA_CMD_FPDMA_SEND:
  35. case ATA_CMD_NCQ_NON_DATA:
  36. return HISI_SAS_SATA_PROTOCOL_FPDMA;
  37. case ATA_CMD_DOWNLOAD_MICRO:
  38. case ATA_CMD_ID_ATA:
  39. case ATA_CMD_PMP_READ:
  40. case ATA_CMD_READ_LOG_EXT:
  41. case ATA_CMD_PIO_READ:
  42. case ATA_CMD_PIO_READ_EXT:
  43. case ATA_CMD_PMP_WRITE:
  44. case ATA_CMD_WRITE_LOG_EXT:
  45. case ATA_CMD_PIO_WRITE:
  46. case ATA_CMD_PIO_WRITE_EXT:
  47. return HISI_SAS_SATA_PROTOCOL_PIO;
  48. case ATA_CMD_DSM:
  49. case ATA_CMD_DOWNLOAD_MICRO_DMA:
  50. case ATA_CMD_PMP_READ_DMA:
  51. case ATA_CMD_PMP_WRITE_DMA:
  52. case ATA_CMD_READ:
  53. case ATA_CMD_READ_EXT:
  54. case ATA_CMD_READ_LOG_DMA_EXT:
  55. case ATA_CMD_READ_STREAM_DMA_EXT:
  56. case ATA_CMD_TRUSTED_RCV_DMA:
  57. case ATA_CMD_TRUSTED_SND_DMA:
  58. case ATA_CMD_WRITE:
  59. case ATA_CMD_WRITE_EXT:
  60. case ATA_CMD_WRITE_FUA_EXT:
  61. case ATA_CMD_WRITE_QUEUED:
  62. case ATA_CMD_WRITE_LOG_DMA_EXT:
  63. case ATA_CMD_WRITE_STREAM_DMA_EXT:
  64. case ATA_CMD_ZAC_MGMT_IN:
  65. return HISI_SAS_SATA_PROTOCOL_DMA;
  66. case ATA_CMD_CHK_POWER:
  67. case ATA_CMD_DEV_RESET:
  68. case ATA_CMD_EDD:
  69. case ATA_CMD_FLUSH:
  70. case ATA_CMD_FLUSH_EXT:
  71. case ATA_CMD_VERIFY:
  72. case ATA_CMD_VERIFY_EXT:
  73. case ATA_CMD_SET_FEATURES:
  74. case ATA_CMD_STANDBY:
  75. case ATA_CMD_STANDBYNOW1:
  76. case ATA_CMD_ZAC_MGMT_OUT:
  77. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  78. case ATA_CMD_SET_MAX:
  79. switch (fis->features) {
  80. case ATA_SET_MAX_PASSWD:
  81. case ATA_SET_MAX_LOCK:
  82. return HISI_SAS_SATA_PROTOCOL_PIO;
  83. case ATA_SET_MAX_PASSWD_DMA:
  84. case ATA_SET_MAX_UNLOCK_DMA:
  85. return HISI_SAS_SATA_PROTOCOL_DMA;
  86. default:
  87. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  88. }
  89. default:
  90. {
  91. if (direction == DMA_NONE)
  92. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  93. return HISI_SAS_SATA_PROTOCOL_PIO;
  94. }
  95. }
  96. }
  97. EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
  98. void hisi_sas_sata_done(struct sas_task *task,
  99. struct hisi_sas_slot *slot)
  100. {
  101. struct task_status_struct *ts = &task->task_status;
  102. struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
  103. struct hisi_sas_status_buffer *status_buf =
  104. hisi_sas_status_buf_addr_mem(slot);
  105. u8 *iu = &status_buf->iu[0];
  106. struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
  107. resp->frame_len = sizeof(struct dev_to_host_fis);
  108. memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
  109. ts->buf_valid_size = sizeof(*resp);
  110. }
  111. EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
  112. int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
  113. {
  114. struct ata_queued_cmd *qc = task->uldd_task;
  115. if (qc) {
  116. if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
  117. qc->tf.command == ATA_CMD_FPDMA_READ) {
  118. *tag = qc->tag;
  119. return 1;
  120. }
  121. }
  122. return 0;
  123. }
  124. EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
  125. /*
  126. * This function assumes linkrate mask fits in 8 bits, which it
  127. * does for all HW versions supported.
  128. */
  129. u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
  130. {
  131. u16 rate = 0;
  132. int i;
  133. max -= SAS_LINK_RATE_1_5_GBPS;
  134. for (i = 0; i <= max; i++)
  135. rate |= 1 << (i * 2);
  136. return rate;
  137. }
  138. EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
  139. static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
  140. {
  141. return device->port->ha->lldd_ha;
  142. }
  143. struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
  144. {
  145. return container_of(sas_port, struct hisi_sas_port, sas_port);
  146. }
  147. EXPORT_SYMBOL_GPL(to_hisi_sas_port);
  148. void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
  149. {
  150. int phy_no;
  151. for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
  152. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  153. }
  154. EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
  155. static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
  156. {
  157. void *bitmap = hisi_hba->slot_index_tags;
  158. clear_bit(slot_idx, bitmap);
  159. }
  160. static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
  161. {
  162. hisi_sas_slot_index_clear(hisi_hba, slot_idx);
  163. }
  164. static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
  165. {
  166. void *bitmap = hisi_hba->slot_index_tags;
  167. set_bit(slot_idx, bitmap);
  168. }
  169. static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, int *slot_idx)
  170. {
  171. unsigned int index;
  172. void *bitmap = hisi_hba->slot_index_tags;
  173. index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
  174. hisi_hba->last_slot_index + 1);
  175. if (index >= hisi_hba->slot_index_count) {
  176. index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
  177. 0);
  178. if (index >= hisi_hba->slot_index_count)
  179. return -SAS_QUEUE_FULL;
  180. }
  181. hisi_sas_slot_index_set(hisi_hba, index);
  182. *slot_idx = index;
  183. hisi_hba->last_slot_index = index;
  184. return 0;
  185. }
  186. static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
  187. {
  188. int i;
  189. for (i = 0; i < hisi_hba->slot_index_count; ++i)
  190. hisi_sas_slot_index_clear(hisi_hba, i);
  191. }
  192. void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
  193. struct hisi_sas_slot *slot)
  194. {
  195. struct hisi_sas_dq *dq = &hisi_hba->dq[slot->dlvry_queue];
  196. unsigned long flags;
  197. if (task) {
  198. struct device *dev = hisi_hba->dev;
  199. if (!task->lldd_task)
  200. return;
  201. task->lldd_task = NULL;
  202. if (!sas_protocol_ata(task->task_proto))
  203. if (slot->n_elem)
  204. dma_unmap_sg(dev, task->scatter,
  205. task->num_scatter,
  206. task->data_dir);
  207. }
  208. spin_lock_irqsave(&dq->lock, flags);
  209. list_del_init(&slot->entry);
  210. spin_unlock_irqrestore(&dq->lock, flags);
  211. memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
  212. spin_lock_irqsave(&hisi_hba->lock, flags);
  213. hisi_sas_slot_index_free(hisi_hba, slot->idx);
  214. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  215. }
  216. EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
  217. static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
  218. struct hisi_sas_slot *slot)
  219. {
  220. hisi_hba->hw->prep_smp(hisi_hba, slot);
  221. }
  222. static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
  223. struct hisi_sas_slot *slot)
  224. {
  225. hisi_hba->hw->prep_ssp(hisi_hba, slot);
  226. }
  227. static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
  228. struct hisi_sas_slot *slot)
  229. {
  230. hisi_hba->hw->prep_stp(hisi_hba, slot);
  231. }
  232. static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
  233. struct hisi_sas_slot *slot,
  234. int device_id, int abort_flag, int tag_to_abort)
  235. {
  236. hisi_hba->hw->prep_abort(hisi_hba, slot,
  237. device_id, abort_flag, tag_to_abort);
  238. }
  239. static int hisi_sas_task_prep(struct sas_task *task,
  240. struct hisi_sas_dq **dq_pointer,
  241. bool is_tmf, struct hisi_sas_tmf_task *tmf,
  242. int *pass)
  243. {
  244. struct domain_device *device = task->dev;
  245. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  246. struct hisi_sas_device *sas_dev = device->lldd_dev;
  247. struct hisi_sas_port *port;
  248. struct hisi_sas_slot *slot;
  249. struct hisi_sas_cmd_hdr *cmd_hdr_base;
  250. struct asd_sas_port *sas_port = device->port;
  251. struct device *dev = hisi_hba->dev;
  252. int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
  253. int n_elem = 0, n_elem_req = 0, n_elem_resp = 0;
  254. struct hisi_sas_dq *dq;
  255. unsigned long flags;
  256. int wr_q_index;
  257. if (!sas_port) {
  258. struct task_status_struct *ts = &task->task_status;
  259. ts->resp = SAS_TASK_UNDELIVERED;
  260. ts->stat = SAS_PHY_DOWN;
  261. /*
  262. * libsas will use dev->port, should
  263. * not call task_done for sata
  264. */
  265. if (device->dev_type != SAS_SATA_DEV)
  266. task->task_done(task);
  267. return -ECOMM;
  268. }
  269. if (DEV_IS_GONE(sas_dev)) {
  270. if (sas_dev)
  271. dev_info(dev, "task prep: device %d not ready\n",
  272. sas_dev->device_id);
  273. else
  274. dev_info(dev, "task prep: device %016llx not ready\n",
  275. SAS_ADDR(device->sas_addr));
  276. return -ECOMM;
  277. }
  278. *dq_pointer = dq = sas_dev->dq;
  279. port = to_hisi_sas_port(sas_port);
  280. if (port && !port->port_attached) {
  281. dev_info(dev, "task prep: %s port%d not attach device\n",
  282. (dev_is_sata(device)) ?
  283. "SATA/STP" : "SAS",
  284. device->port->id);
  285. return -ECOMM;
  286. }
  287. if (!sas_protocol_ata(task->task_proto)) {
  288. unsigned int req_len, resp_len;
  289. if (task->num_scatter) {
  290. n_elem = dma_map_sg(dev, task->scatter,
  291. task->num_scatter, task->data_dir);
  292. if (!n_elem) {
  293. rc = -ENOMEM;
  294. goto prep_out;
  295. }
  296. } else if (task->task_proto & SAS_PROTOCOL_SMP) {
  297. n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
  298. 1, DMA_TO_DEVICE);
  299. if (!n_elem_req) {
  300. rc = -ENOMEM;
  301. goto prep_out;
  302. }
  303. req_len = sg_dma_len(&task->smp_task.smp_req);
  304. if (req_len & 0x3) {
  305. rc = -EINVAL;
  306. goto err_out_dma_unmap;
  307. }
  308. n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp,
  309. 1, DMA_FROM_DEVICE);
  310. if (!n_elem_resp) {
  311. rc = -ENOMEM;
  312. goto err_out_dma_unmap;
  313. }
  314. resp_len = sg_dma_len(&task->smp_task.smp_resp);
  315. if (resp_len & 0x3) {
  316. rc = -EINVAL;
  317. goto err_out_dma_unmap;
  318. }
  319. }
  320. } else
  321. n_elem = task->num_scatter;
  322. if (n_elem > HISI_SAS_SGE_PAGE_CNT) {
  323. dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT",
  324. n_elem);
  325. rc = -EINVAL;
  326. goto err_out_dma_unmap;
  327. }
  328. spin_lock_irqsave(&hisi_hba->lock, flags);
  329. if (hisi_hba->hw->slot_index_alloc)
  330. rc = hisi_hba->hw->slot_index_alloc(hisi_hba, &slot_idx,
  331. device);
  332. else
  333. rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
  334. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  335. if (rc)
  336. goto err_out_dma_unmap;
  337. slot = &hisi_hba->slot_info[slot_idx];
  338. spin_lock_irqsave(&dq->lock, flags);
  339. wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
  340. if (wr_q_index < 0) {
  341. spin_unlock_irqrestore(&dq->lock, flags);
  342. rc = -EAGAIN;
  343. goto err_out_tag;
  344. }
  345. list_add_tail(&slot->delivery, &dq->list);
  346. list_add_tail(&slot->entry, &sas_dev->list);
  347. spin_unlock_irqrestore(&dq->lock, flags);
  348. dlvry_queue = dq->id;
  349. dlvry_queue_slot = wr_q_index;
  350. slot->n_elem = n_elem;
  351. slot->dlvry_queue = dlvry_queue;
  352. slot->dlvry_queue_slot = dlvry_queue_slot;
  353. cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
  354. slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
  355. slot->task = task;
  356. slot->port = port;
  357. slot->tmf = tmf;
  358. slot->is_internal = is_tmf;
  359. task->lldd_task = slot;
  360. memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
  361. memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
  362. memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
  363. switch (task->task_proto) {
  364. case SAS_PROTOCOL_SMP:
  365. hisi_sas_task_prep_smp(hisi_hba, slot);
  366. break;
  367. case SAS_PROTOCOL_SSP:
  368. hisi_sas_task_prep_ssp(hisi_hba, slot);
  369. break;
  370. case SAS_PROTOCOL_SATA:
  371. case SAS_PROTOCOL_STP:
  372. case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
  373. hisi_sas_task_prep_ata(hisi_hba, slot);
  374. break;
  375. default:
  376. dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
  377. task->task_proto);
  378. break;
  379. }
  380. spin_lock_irqsave(&task->task_state_lock, flags);
  381. task->task_state_flags |= SAS_TASK_AT_INITIATOR;
  382. spin_unlock_irqrestore(&task->task_state_lock, flags);
  383. ++(*pass);
  384. WRITE_ONCE(slot->ready, 1);
  385. return 0;
  386. err_out_tag:
  387. spin_lock_irqsave(&hisi_hba->lock, flags);
  388. hisi_sas_slot_index_free(hisi_hba, slot_idx);
  389. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  390. err_out_dma_unmap:
  391. if (!sas_protocol_ata(task->task_proto)) {
  392. if (task->num_scatter) {
  393. dma_unmap_sg(dev, task->scatter, task->num_scatter,
  394. task->data_dir);
  395. } else if (task->task_proto & SAS_PROTOCOL_SMP) {
  396. if (n_elem_req)
  397. dma_unmap_sg(dev, &task->smp_task.smp_req,
  398. 1, DMA_TO_DEVICE);
  399. if (n_elem_resp)
  400. dma_unmap_sg(dev, &task->smp_task.smp_resp,
  401. 1, DMA_FROM_DEVICE);
  402. }
  403. }
  404. prep_out:
  405. dev_err(dev, "task prep: failed[%d]!\n", rc);
  406. return rc;
  407. }
  408. static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
  409. bool is_tmf, struct hisi_sas_tmf_task *tmf)
  410. {
  411. u32 rc;
  412. u32 pass = 0;
  413. unsigned long flags;
  414. struct hisi_hba *hisi_hba = dev_to_hisi_hba(task->dev);
  415. struct device *dev = hisi_hba->dev;
  416. struct hisi_sas_dq *dq = NULL;
  417. if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
  418. /*
  419. * For IOs from upper layer, it may already disable preempt
  420. * in the IO path, if disable preempt again in down(),
  421. * function schedule() will report schedule_bug(), so check
  422. * preemptible() before goto down().
  423. */
  424. if (!preemptible())
  425. return -EINVAL;
  426. down(&hisi_hba->sem);
  427. up(&hisi_hba->sem);
  428. }
  429. /* protect task_prep and start_delivery sequence */
  430. rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
  431. if (rc)
  432. dev_err(dev, "task exec: failed[%d]!\n", rc);
  433. if (likely(pass)) {
  434. spin_lock_irqsave(&dq->lock, flags);
  435. hisi_hba->hw->start_delivery(dq);
  436. spin_unlock_irqrestore(&dq->lock, flags);
  437. }
  438. return rc;
  439. }
  440. static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
  441. {
  442. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  443. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  444. struct sas_ha_struct *sas_ha;
  445. if (!phy->phy_attached)
  446. return;
  447. sas_ha = &hisi_hba->sha;
  448. sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
  449. if (sas_phy->phy) {
  450. struct sas_phy *sphy = sas_phy->phy;
  451. sphy->negotiated_linkrate = sas_phy->linkrate;
  452. sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
  453. sphy->maximum_linkrate_hw =
  454. hisi_hba->hw->phy_get_max_linkrate();
  455. if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
  456. sphy->minimum_linkrate = phy->minimum_linkrate;
  457. if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
  458. sphy->maximum_linkrate = phy->maximum_linkrate;
  459. }
  460. if (phy->phy_type & PORT_TYPE_SAS) {
  461. struct sas_identify_frame *id;
  462. id = (struct sas_identify_frame *)phy->frame_rcvd;
  463. id->dev_type = phy->identify.device_type;
  464. id->initiator_bits = SAS_PROTOCOL_ALL;
  465. id->target_bits = phy->identify.target_port_protocols;
  466. } else if (phy->phy_type & PORT_TYPE_SATA) {
  467. /*Nothing*/
  468. }
  469. sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
  470. sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
  471. }
  472. static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
  473. {
  474. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  475. struct hisi_sas_device *sas_dev = NULL;
  476. unsigned long flags;
  477. int last = hisi_hba->last_dev_id;
  478. int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
  479. int i;
  480. spin_lock_irqsave(&hisi_hba->lock, flags);
  481. for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
  482. if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
  483. int queue = i % hisi_hba->queue_count;
  484. struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
  485. hisi_hba->devices[i].device_id = i;
  486. sas_dev = &hisi_hba->devices[i];
  487. sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
  488. sas_dev->dev_type = device->dev_type;
  489. sas_dev->hisi_hba = hisi_hba;
  490. sas_dev->sas_device = device;
  491. sas_dev->dq = dq;
  492. INIT_LIST_HEAD(&hisi_hba->devices[i].list);
  493. break;
  494. }
  495. i++;
  496. }
  497. hisi_hba->last_dev_id = i;
  498. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  499. return sas_dev;
  500. }
  501. #define HISI_SAS_SRST_ATA_DISK_CNT 3
  502. static int hisi_sas_init_device(struct domain_device *device)
  503. {
  504. int rc = TMF_RESP_FUNC_COMPLETE;
  505. struct scsi_lun lun;
  506. struct hisi_sas_tmf_task tmf_task;
  507. int retry = HISI_SAS_SRST_ATA_DISK_CNT;
  508. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  509. switch (device->dev_type) {
  510. case SAS_END_DEVICE:
  511. int_to_scsilun(0, &lun);
  512. tmf_task.tmf = TMF_CLEAR_TASK_SET;
  513. rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun,
  514. &tmf_task);
  515. if (rc == TMF_RESP_FUNC_COMPLETE)
  516. hisi_sas_release_task(hisi_hba, device);
  517. break;
  518. case SAS_SATA_DEV:
  519. case SAS_SATA_PM:
  520. case SAS_SATA_PM_PORT:
  521. case SAS_SATA_PENDING:
  522. while (retry-- > 0) {
  523. rc = hisi_sas_softreset_ata_disk(device);
  524. if (!rc)
  525. break;
  526. }
  527. break;
  528. default:
  529. break;
  530. }
  531. return rc;
  532. }
  533. static int hisi_sas_dev_found(struct domain_device *device)
  534. {
  535. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  536. struct domain_device *parent_dev = device->parent;
  537. struct hisi_sas_device *sas_dev;
  538. struct device *dev = hisi_hba->dev;
  539. int rc;
  540. if (hisi_hba->hw->alloc_dev)
  541. sas_dev = hisi_hba->hw->alloc_dev(device);
  542. else
  543. sas_dev = hisi_sas_alloc_dev(device);
  544. if (!sas_dev) {
  545. dev_err(dev, "fail alloc dev: max support %d devices\n",
  546. HISI_SAS_MAX_DEVICES);
  547. return -EINVAL;
  548. }
  549. device->lldd_dev = sas_dev;
  550. hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
  551. if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
  552. int phy_no;
  553. u8 phy_num = parent_dev->ex_dev.num_phys;
  554. struct ex_phy *phy;
  555. for (phy_no = 0; phy_no < phy_num; phy_no++) {
  556. phy = &parent_dev->ex_dev.ex_phy[phy_no];
  557. if (SAS_ADDR(phy->attached_sas_addr) ==
  558. SAS_ADDR(device->sas_addr))
  559. break;
  560. }
  561. if (phy_no == phy_num) {
  562. dev_info(dev, "dev found: no attached "
  563. "dev:%016llx at ex:%016llx\n",
  564. SAS_ADDR(device->sas_addr),
  565. SAS_ADDR(parent_dev->sas_addr));
  566. rc = -EINVAL;
  567. goto err_out;
  568. }
  569. }
  570. dev_info(dev, "dev[%d:%x] found\n",
  571. sas_dev->device_id, sas_dev->dev_type);
  572. rc = hisi_sas_init_device(device);
  573. if (rc)
  574. goto err_out;
  575. return 0;
  576. err_out:
  577. hisi_sas_dev_gone(device);
  578. return rc;
  579. }
  580. int hisi_sas_slave_configure(struct scsi_device *sdev)
  581. {
  582. struct domain_device *dev = sdev_to_domain_dev(sdev);
  583. int ret = sas_slave_configure(sdev);
  584. if (ret)
  585. return ret;
  586. if (!dev_is_sata(dev))
  587. sas_change_queue_depth(sdev, 64);
  588. return 0;
  589. }
  590. EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
  591. void hisi_sas_scan_start(struct Scsi_Host *shost)
  592. {
  593. struct hisi_hba *hisi_hba = shost_priv(shost);
  594. hisi_hba->hw->phys_init(hisi_hba);
  595. }
  596. EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
  597. int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
  598. {
  599. struct hisi_hba *hisi_hba = shost_priv(shost);
  600. struct sas_ha_struct *sha = &hisi_hba->sha;
  601. /* Wait for PHY up interrupt to occur */
  602. if (time < HZ)
  603. return 0;
  604. sas_drain_work(sha);
  605. return 1;
  606. }
  607. EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
  608. static void hisi_sas_phyup_work(struct work_struct *work)
  609. {
  610. struct hisi_sas_phy *phy =
  611. container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
  612. struct hisi_hba *hisi_hba = phy->hisi_hba;
  613. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  614. int phy_no = sas_phy->id;
  615. if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
  616. hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
  617. hisi_sas_bytes_dmaed(hisi_hba, phy_no);
  618. }
  619. static void hisi_sas_linkreset_work(struct work_struct *work)
  620. {
  621. struct hisi_sas_phy *phy =
  622. container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
  623. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  624. hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
  625. }
  626. static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
  627. [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
  628. [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
  629. };
  630. bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
  631. enum hisi_sas_phy_event event)
  632. {
  633. struct hisi_hba *hisi_hba = phy->hisi_hba;
  634. if (WARN_ON(event >= HISI_PHYES_NUM))
  635. return false;
  636. return queue_work(hisi_hba->wq, &phy->works[event]);
  637. }
  638. EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
  639. static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
  640. {
  641. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  642. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  643. int i;
  644. phy->hisi_hba = hisi_hba;
  645. phy->port = NULL;
  646. phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
  647. phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
  648. sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
  649. sas_phy->class = SAS;
  650. sas_phy->iproto = SAS_PROTOCOL_ALL;
  651. sas_phy->tproto = 0;
  652. sas_phy->type = PHY_TYPE_PHYSICAL;
  653. sas_phy->role = PHY_ROLE_INITIATOR;
  654. sas_phy->oob_mode = OOB_NOT_CONNECTED;
  655. sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
  656. sas_phy->id = phy_no;
  657. sas_phy->sas_addr = &hisi_hba->sas_addr[0];
  658. sas_phy->frame_rcvd = &phy->frame_rcvd[0];
  659. sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
  660. sas_phy->lldd_phy = phy;
  661. for (i = 0; i < HISI_PHYES_NUM; i++)
  662. INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
  663. spin_lock_init(&phy->lock);
  664. }
  665. static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
  666. {
  667. struct sas_ha_struct *sas_ha = sas_phy->ha;
  668. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  669. struct hisi_sas_phy *phy = sas_phy->lldd_phy;
  670. struct asd_sas_port *sas_port = sas_phy->port;
  671. struct hisi_sas_port *port;
  672. unsigned long flags;
  673. if (!sas_port)
  674. return;
  675. port = to_hisi_sas_port(sas_port);
  676. spin_lock_irqsave(&hisi_hba->lock, flags);
  677. port->port_attached = 1;
  678. port->id = phy->port_id;
  679. phy->port = port;
  680. sas_port->lldd_port = port;
  681. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  682. }
  683. static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
  684. struct hisi_sas_slot *slot)
  685. {
  686. if (task) {
  687. unsigned long flags;
  688. struct task_status_struct *ts;
  689. ts = &task->task_status;
  690. ts->resp = SAS_TASK_COMPLETE;
  691. ts->stat = SAS_ABORTED_TASK;
  692. spin_lock_irqsave(&task->task_state_lock, flags);
  693. task->task_state_flags &=
  694. ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
  695. if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP)
  696. task->task_state_flags |= SAS_TASK_STATE_DONE;
  697. spin_unlock_irqrestore(&task->task_state_lock, flags);
  698. }
  699. hisi_sas_slot_task_free(hisi_hba, task, slot);
  700. }
  701. static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
  702. struct domain_device *device)
  703. {
  704. struct hisi_sas_slot *slot, *slot2;
  705. struct hisi_sas_device *sas_dev = device->lldd_dev;
  706. list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
  707. hisi_sas_do_release_task(hisi_hba, slot->task, slot);
  708. }
  709. void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
  710. {
  711. struct hisi_sas_device *sas_dev;
  712. struct domain_device *device;
  713. int i;
  714. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  715. sas_dev = &hisi_hba->devices[i];
  716. device = sas_dev->sas_device;
  717. if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
  718. !device)
  719. continue;
  720. hisi_sas_release_task(hisi_hba, device);
  721. }
  722. }
  723. EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
  724. static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
  725. struct domain_device *device)
  726. {
  727. if (hisi_hba->hw->dereg_device)
  728. hisi_hba->hw->dereg_device(hisi_hba, device);
  729. }
  730. static void hisi_sas_dev_gone(struct domain_device *device)
  731. {
  732. struct hisi_sas_device *sas_dev = device->lldd_dev;
  733. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  734. struct device *dev = hisi_hba->dev;
  735. dev_info(dev, "dev[%d:%x] is gone\n",
  736. sas_dev->device_id, sas_dev->dev_type);
  737. if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
  738. hisi_sas_internal_task_abort(hisi_hba, device,
  739. HISI_SAS_INT_ABT_DEV, 0);
  740. hisi_sas_dereg_device(hisi_hba, device);
  741. down(&hisi_hba->sem);
  742. hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
  743. up(&hisi_hba->sem);
  744. device->lldd_dev = NULL;
  745. }
  746. if (hisi_hba->hw->free_device)
  747. hisi_hba->hw->free_device(sas_dev);
  748. sas_dev->dev_type = SAS_PHY_UNUSED;
  749. }
  750. static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
  751. {
  752. return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
  753. }
  754. static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
  755. struct sas_phy_linkrates *r)
  756. {
  757. struct sas_phy_linkrates _r;
  758. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  759. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  760. enum sas_linkrate min, max;
  761. if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
  762. return -EINVAL;
  763. if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
  764. max = sas_phy->phy->maximum_linkrate;
  765. min = r->minimum_linkrate;
  766. } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
  767. max = r->maximum_linkrate;
  768. min = sas_phy->phy->minimum_linkrate;
  769. } else
  770. return -EINVAL;
  771. _r.maximum_linkrate = max;
  772. _r.minimum_linkrate = min;
  773. sas_phy->phy->maximum_linkrate = max;
  774. sas_phy->phy->minimum_linkrate = min;
  775. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  776. msleep(100);
  777. hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
  778. hisi_hba->hw->phy_start(hisi_hba, phy_no);
  779. return 0;
  780. }
  781. static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
  782. void *funcdata)
  783. {
  784. struct sas_ha_struct *sas_ha = sas_phy->ha;
  785. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  786. int phy_no = sas_phy->id;
  787. switch (func) {
  788. case PHY_FUNC_HARD_RESET:
  789. hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
  790. break;
  791. case PHY_FUNC_LINK_RESET:
  792. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  793. msleep(100);
  794. hisi_hba->hw->phy_start(hisi_hba, phy_no);
  795. break;
  796. case PHY_FUNC_DISABLE:
  797. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  798. break;
  799. case PHY_FUNC_SET_LINK_RATE:
  800. return hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
  801. case PHY_FUNC_GET_EVENTS:
  802. if (hisi_hba->hw->get_events) {
  803. hisi_hba->hw->get_events(hisi_hba, phy_no);
  804. break;
  805. }
  806. /* fallthru */
  807. case PHY_FUNC_RELEASE_SPINUP_HOLD:
  808. default:
  809. return -EOPNOTSUPP;
  810. }
  811. return 0;
  812. }
  813. static void hisi_sas_task_done(struct sas_task *task)
  814. {
  815. del_timer(&task->slow_task->timer);
  816. complete(&task->slow_task->completion);
  817. }
  818. static void hisi_sas_tmf_timedout(struct timer_list *t)
  819. {
  820. struct sas_task_slow *slow = from_timer(slow, t, timer);
  821. struct sas_task *task = slow->task;
  822. unsigned long flags;
  823. bool is_completed = true;
  824. spin_lock_irqsave(&task->task_state_lock, flags);
  825. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  826. task->task_state_flags |= SAS_TASK_STATE_ABORTED;
  827. is_completed = false;
  828. }
  829. spin_unlock_irqrestore(&task->task_state_lock, flags);
  830. if (!is_completed)
  831. complete(&task->slow_task->completion);
  832. }
  833. #define TASK_TIMEOUT 20
  834. #define TASK_RETRY 3
  835. #define INTERNAL_ABORT_TIMEOUT 6
  836. static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
  837. void *parameter, u32 para_len,
  838. struct hisi_sas_tmf_task *tmf)
  839. {
  840. struct hisi_sas_device *sas_dev = device->lldd_dev;
  841. struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
  842. struct device *dev = hisi_hba->dev;
  843. struct sas_task *task;
  844. int res, retry;
  845. for (retry = 0; retry < TASK_RETRY; retry++) {
  846. task = sas_alloc_slow_task(GFP_KERNEL);
  847. if (!task)
  848. return -ENOMEM;
  849. task->dev = device;
  850. task->task_proto = device->tproto;
  851. if (dev_is_sata(device)) {
  852. task->ata_task.device_control_reg_update = 1;
  853. memcpy(&task->ata_task.fis, parameter, para_len);
  854. } else {
  855. memcpy(&task->ssp_task, parameter, para_len);
  856. }
  857. task->task_done = hisi_sas_task_done;
  858. task->slow_task->timer.function = hisi_sas_tmf_timedout;
  859. task->slow_task->timer.expires = jiffies + TASK_TIMEOUT*HZ;
  860. add_timer(&task->slow_task->timer);
  861. res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
  862. if (res) {
  863. del_timer(&task->slow_task->timer);
  864. dev_err(dev, "abort tmf: executing internal task failed: %d\n",
  865. res);
  866. goto ex_err;
  867. }
  868. wait_for_completion(&task->slow_task->completion);
  869. res = TMF_RESP_FUNC_FAILED;
  870. /* Even TMF timed out, return direct. */
  871. if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
  872. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  873. struct hisi_sas_slot *slot = task->lldd_task;
  874. dev_err(dev, "abort tmf: TMF task timeout and not done\n");
  875. if (slot) {
  876. struct hisi_sas_cq *cq =
  877. &hisi_hba->cq[slot->dlvry_queue];
  878. /*
  879. * flush tasklet to avoid free'ing task
  880. * before using task in IO completion
  881. */
  882. tasklet_kill(&cq->tasklet);
  883. slot->task = NULL;
  884. }
  885. goto ex_err;
  886. } else
  887. dev_err(dev, "abort tmf: TMF task timeout\n");
  888. }
  889. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  890. task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
  891. res = TMF_RESP_FUNC_COMPLETE;
  892. break;
  893. }
  894. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  895. task->task_status.stat == TMF_RESP_FUNC_SUCC) {
  896. res = TMF_RESP_FUNC_SUCC;
  897. break;
  898. }
  899. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  900. task->task_status.stat == SAS_DATA_UNDERRUN) {
  901. /* no error, but return the number of bytes of
  902. * underrun
  903. */
  904. dev_warn(dev, "abort tmf: task to dev %016llx "
  905. "resp: 0x%x sts 0x%x underrun\n",
  906. SAS_ADDR(device->sas_addr),
  907. task->task_status.resp,
  908. task->task_status.stat);
  909. res = task->task_status.residual;
  910. break;
  911. }
  912. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  913. task->task_status.stat == SAS_DATA_OVERRUN) {
  914. dev_warn(dev, "abort tmf: blocked task error\n");
  915. res = -EMSGSIZE;
  916. break;
  917. }
  918. dev_warn(dev, "abort tmf: task to dev "
  919. "%016llx resp: 0x%x status 0x%x\n",
  920. SAS_ADDR(device->sas_addr), task->task_status.resp,
  921. task->task_status.stat);
  922. sas_free_task(task);
  923. task = NULL;
  924. }
  925. ex_err:
  926. if (retry == TASK_RETRY)
  927. dev_warn(dev, "abort tmf: executing internal task failed!\n");
  928. sas_free_task(task);
  929. return res;
  930. }
  931. static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
  932. bool reset, int pmp, u8 *fis)
  933. {
  934. struct ata_taskfile tf;
  935. ata_tf_init(dev, &tf);
  936. if (reset)
  937. tf.ctl |= ATA_SRST;
  938. else
  939. tf.ctl &= ~ATA_SRST;
  940. tf.command = ATA_CMD_DEV_RESET;
  941. ata_tf_to_fis(&tf, pmp, 0, fis);
  942. }
  943. static int hisi_sas_softreset_ata_disk(struct domain_device *device)
  944. {
  945. u8 fis[20] = {0};
  946. struct ata_port *ap = device->sata_dev.ap;
  947. struct ata_link *link;
  948. int rc = TMF_RESP_FUNC_FAILED;
  949. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  950. struct device *dev = hisi_hba->dev;
  951. int s = sizeof(struct host_to_dev_fis);
  952. ata_for_each_link(link, ap, EDGE) {
  953. int pmp = sata_srst_pmp(link);
  954. hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
  955. rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
  956. if (rc != TMF_RESP_FUNC_COMPLETE)
  957. break;
  958. }
  959. if (rc == TMF_RESP_FUNC_COMPLETE) {
  960. ata_for_each_link(link, ap, EDGE) {
  961. int pmp = sata_srst_pmp(link);
  962. hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
  963. rc = hisi_sas_exec_internal_tmf_task(device, fis,
  964. s, NULL);
  965. if (rc != TMF_RESP_FUNC_COMPLETE)
  966. dev_err(dev, "ata disk de-reset failed\n");
  967. }
  968. } else {
  969. dev_err(dev, "ata disk reset failed\n");
  970. }
  971. if (rc == TMF_RESP_FUNC_COMPLETE)
  972. hisi_sas_release_task(hisi_hba, device);
  973. return rc;
  974. }
  975. static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
  976. u8 *lun, struct hisi_sas_tmf_task *tmf)
  977. {
  978. struct sas_ssp_task ssp_task;
  979. if (!(device->tproto & SAS_PROTOCOL_SSP))
  980. return TMF_RESP_FUNC_ESUPP;
  981. memcpy(ssp_task.LUN, lun, 8);
  982. return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
  983. sizeof(ssp_task), tmf);
  984. }
  985. static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
  986. {
  987. u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
  988. int i;
  989. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  990. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  991. struct domain_device *device = sas_dev->sas_device;
  992. struct asd_sas_port *sas_port;
  993. struct hisi_sas_port *port;
  994. struct hisi_sas_phy *phy = NULL;
  995. struct asd_sas_phy *sas_phy;
  996. if ((sas_dev->dev_type == SAS_PHY_UNUSED)
  997. || !device || !device->port)
  998. continue;
  999. sas_port = device->port;
  1000. port = to_hisi_sas_port(sas_port);
  1001. list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
  1002. if (state & BIT(sas_phy->id)) {
  1003. phy = sas_phy->lldd_phy;
  1004. break;
  1005. }
  1006. if (phy) {
  1007. port->id = phy->port_id;
  1008. /* Update linkrate of directly attached device. */
  1009. if (!device->parent)
  1010. device->linkrate = phy->sas_phy.linkrate;
  1011. hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
  1012. } else
  1013. port->id = 0xff;
  1014. }
  1015. }
  1016. static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
  1017. u32 state)
  1018. {
  1019. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1020. struct asd_sas_port *_sas_port = NULL;
  1021. int phy_no;
  1022. for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
  1023. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  1024. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1025. struct asd_sas_port *sas_port = sas_phy->port;
  1026. bool do_port_check = !!(_sas_port != sas_port);
  1027. if (!sas_phy->phy->enabled)
  1028. continue;
  1029. /* Report PHY state change to libsas */
  1030. if (state & BIT(phy_no)) {
  1031. if (do_port_check && sas_port && sas_port->port_dev) {
  1032. struct domain_device *dev = sas_port->port_dev;
  1033. _sas_port = sas_port;
  1034. if (DEV_IS_EXPANDER(dev->dev_type))
  1035. sas_ha->notify_port_event(sas_phy,
  1036. PORTE_BROADCAST_RCVD);
  1037. }
  1038. } else if (old_state & (1 << phy_no))
  1039. /* PHY down but was up before */
  1040. hisi_sas_phy_down(hisi_hba, phy_no, 0);
  1041. }
  1042. }
  1043. static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
  1044. {
  1045. struct hisi_sas_device *sas_dev;
  1046. struct domain_device *device;
  1047. int i;
  1048. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1049. sas_dev = &hisi_hba->devices[i];
  1050. device = sas_dev->sas_device;
  1051. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
  1052. continue;
  1053. hisi_sas_init_device(device);
  1054. }
  1055. }
  1056. static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
  1057. struct asd_sas_port *sas_port,
  1058. struct domain_device *device)
  1059. {
  1060. struct hisi_sas_tmf_task tmf_task = { .force_phy = 1 };
  1061. struct ata_port *ap = device->sata_dev.ap;
  1062. struct device *dev = hisi_hba->dev;
  1063. int s = sizeof(struct host_to_dev_fis);
  1064. int rc = TMF_RESP_FUNC_FAILED;
  1065. struct asd_sas_phy *sas_phy;
  1066. struct ata_link *link;
  1067. u8 fis[20] = {0};
  1068. u32 state;
  1069. state = hisi_hba->hw->get_phys_state(hisi_hba);
  1070. list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) {
  1071. if (!(state & BIT(sas_phy->id)))
  1072. continue;
  1073. ata_for_each_link(link, ap, EDGE) {
  1074. int pmp = sata_srst_pmp(link);
  1075. tmf_task.phy_id = sas_phy->id;
  1076. hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
  1077. rc = hisi_sas_exec_internal_tmf_task(device, fis, s,
  1078. &tmf_task);
  1079. if (rc != TMF_RESP_FUNC_COMPLETE) {
  1080. dev_err(dev, "phy%d ata reset failed rc=%d\n",
  1081. sas_phy->id, rc);
  1082. break;
  1083. }
  1084. }
  1085. }
  1086. }
  1087. static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
  1088. {
  1089. struct device *dev = hisi_hba->dev;
  1090. int port_no, rc, i;
  1091. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1092. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  1093. struct domain_device *device = sas_dev->sas_device;
  1094. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
  1095. continue;
  1096. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1097. HISI_SAS_INT_ABT_DEV, 0);
  1098. if (rc < 0)
  1099. dev_err(dev, "STP reject: abort dev failed %d\n", rc);
  1100. }
  1101. for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
  1102. struct hisi_sas_port *port = &hisi_hba->port[port_no];
  1103. struct asd_sas_port *sas_port = &port->sas_port;
  1104. struct domain_device *port_dev = sas_port->port_dev;
  1105. struct domain_device *device;
  1106. if (!port_dev || !DEV_IS_EXPANDER(port_dev->dev_type))
  1107. continue;
  1108. /* Try to find a SATA device */
  1109. list_for_each_entry(device, &sas_port->dev_list,
  1110. dev_list_node) {
  1111. if (dev_is_sata(device)) {
  1112. hisi_sas_send_ata_reset_each_phy(hisi_hba,
  1113. sas_port,
  1114. device);
  1115. break;
  1116. }
  1117. }
  1118. }
  1119. }
  1120. void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
  1121. {
  1122. struct Scsi_Host *shost = hisi_hba->shost;
  1123. down(&hisi_hba->sem);
  1124. hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
  1125. scsi_block_requests(shost);
  1126. hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
  1127. if (timer_pending(&hisi_hba->timer))
  1128. del_timer_sync(&hisi_hba->timer);
  1129. set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1130. }
  1131. EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
  1132. void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
  1133. {
  1134. struct Scsi_Host *shost = hisi_hba->shost;
  1135. u32 state;
  1136. /* Init and wait for PHYs to come up and all libsas event finished. */
  1137. hisi_hba->hw->phys_init(hisi_hba);
  1138. msleep(1000);
  1139. hisi_sas_refresh_port_id(hisi_hba);
  1140. clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1141. up(&hisi_hba->sem);
  1142. if (hisi_hba->reject_stp_links_msk)
  1143. hisi_sas_terminate_stp_reject(hisi_hba);
  1144. hisi_sas_reset_init_all_devices(hisi_hba);
  1145. scsi_unblock_requests(shost);
  1146. clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
  1147. state = hisi_hba->hw->get_phys_state(hisi_hba);
  1148. hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state, state);
  1149. }
  1150. EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
  1151. static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
  1152. {
  1153. struct device *dev = hisi_hba->dev;
  1154. struct Scsi_Host *shost = hisi_hba->shost;
  1155. int rc;
  1156. if (!hisi_hba->hw->soft_reset)
  1157. return -1;
  1158. if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
  1159. return -1;
  1160. dev_info(dev, "controller resetting...\n");
  1161. hisi_sas_controller_reset_prepare(hisi_hba);
  1162. rc = hisi_hba->hw->soft_reset(hisi_hba);
  1163. if (rc) {
  1164. dev_warn(dev, "controller reset failed (%d)\n", rc);
  1165. clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1166. up(&hisi_hba->sem);
  1167. scsi_unblock_requests(shost);
  1168. clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
  1169. return rc;
  1170. }
  1171. hisi_sas_controller_reset_done(hisi_hba);
  1172. dev_info(dev, "controller reset complete\n");
  1173. return 0;
  1174. }
  1175. static int hisi_sas_abort_task(struct sas_task *task)
  1176. {
  1177. struct scsi_lun lun;
  1178. struct hisi_sas_tmf_task tmf_task;
  1179. struct domain_device *device = task->dev;
  1180. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1181. struct hisi_hba *hisi_hba;
  1182. struct device *dev;
  1183. int rc = TMF_RESP_FUNC_FAILED;
  1184. unsigned long flags;
  1185. if (!sas_dev)
  1186. return TMF_RESP_FUNC_FAILED;
  1187. hisi_hba = dev_to_hisi_hba(task->dev);
  1188. dev = hisi_hba->dev;
  1189. spin_lock_irqsave(&task->task_state_lock, flags);
  1190. if (task->task_state_flags & SAS_TASK_STATE_DONE) {
  1191. struct hisi_sas_slot *slot = task->lldd_task;
  1192. struct hisi_sas_cq *cq;
  1193. if (slot) {
  1194. /*
  1195. * flush tasklet to avoid free'ing task
  1196. * before using task in IO completion
  1197. */
  1198. cq = &hisi_hba->cq[slot->dlvry_queue];
  1199. tasklet_kill(&cq->tasklet);
  1200. }
  1201. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1202. rc = TMF_RESP_FUNC_COMPLETE;
  1203. goto out;
  1204. }
  1205. task->task_state_flags |= SAS_TASK_STATE_ABORTED;
  1206. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1207. sas_dev->dev_status = HISI_SAS_DEV_EH;
  1208. if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
  1209. struct scsi_cmnd *cmnd = task->uldd_task;
  1210. struct hisi_sas_slot *slot = task->lldd_task;
  1211. u32 tag = slot->idx;
  1212. int rc2;
  1213. int_to_scsilun(cmnd->device->lun, &lun);
  1214. tmf_task.tmf = TMF_ABORT_TASK;
  1215. tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
  1216. rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
  1217. &tmf_task);
  1218. rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
  1219. HISI_SAS_INT_ABT_CMD, tag);
  1220. if (rc2 < 0) {
  1221. dev_err(dev, "abort task: internal abort (%d)\n", rc2);
  1222. return TMF_RESP_FUNC_FAILED;
  1223. }
  1224. /*
  1225. * If the TMF finds that the IO is not in the device and also
  1226. * the internal abort does not succeed, then it is safe to
  1227. * free the slot.
  1228. * Note: if the internal abort succeeds then the slot
  1229. * will have already been completed
  1230. */
  1231. if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
  1232. if (task->lldd_task)
  1233. hisi_sas_do_release_task(hisi_hba, task, slot);
  1234. }
  1235. } else if (task->task_proto & SAS_PROTOCOL_SATA ||
  1236. task->task_proto & SAS_PROTOCOL_STP) {
  1237. if (task->dev->dev_type == SAS_SATA_DEV) {
  1238. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1239. HISI_SAS_INT_ABT_DEV, 0);
  1240. if (rc < 0) {
  1241. dev_err(dev, "abort task: internal abort failed\n");
  1242. goto out;
  1243. }
  1244. hisi_sas_dereg_device(hisi_hba, device);
  1245. rc = hisi_sas_softreset_ata_disk(device);
  1246. }
  1247. } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
  1248. /* SMP */
  1249. struct hisi_sas_slot *slot = task->lldd_task;
  1250. u32 tag = slot->idx;
  1251. struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
  1252. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1253. HISI_SAS_INT_ABT_CMD, tag);
  1254. if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
  1255. task->lldd_task) {
  1256. /*
  1257. * flush tasklet to avoid free'ing task
  1258. * before using task in IO completion
  1259. */
  1260. tasklet_kill(&cq->tasklet);
  1261. slot->task = NULL;
  1262. }
  1263. }
  1264. out:
  1265. if (rc != TMF_RESP_FUNC_COMPLETE)
  1266. dev_notice(dev, "abort task: rc=%d\n", rc);
  1267. return rc;
  1268. }
  1269. static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
  1270. {
  1271. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1272. struct device *dev = hisi_hba->dev;
  1273. struct hisi_sas_tmf_task tmf_task;
  1274. int rc = TMF_RESP_FUNC_FAILED;
  1275. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1276. HISI_SAS_INT_ABT_DEV, 0);
  1277. if (rc < 0) {
  1278. dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
  1279. return TMF_RESP_FUNC_FAILED;
  1280. }
  1281. hisi_sas_dereg_device(hisi_hba, device);
  1282. tmf_task.tmf = TMF_ABORT_TASK_SET;
  1283. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1284. if (rc == TMF_RESP_FUNC_COMPLETE)
  1285. hisi_sas_release_task(hisi_hba, device);
  1286. return rc;
  1287. }
  1288. static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
  1289. {
  1290. int rc = TMF_RESP_FUNC_FAILED;
  1291. struct hisi_sas_tmf_task tmf_task;
  1292. tmf_task.tmf = TMF_CLEAR_ACA;
  1293. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1294. return rc;
  1295. }
  1296. static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
  1297. {
  1298. struct sas_phy *local_phy = sas_get_local_phy(device);
  1299. int rc, reset_type = (device->dev_type == SAS_SATA_DEV ||
  1300. (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
  1301. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1302. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1303. struct asd_sas_phy *sas_phy = sas_ha->sas_phy[local_phy->number];
  1304. struct hisi_sas_phy *phy = container_of(sas_phy,
  1305. struct hisi_sas_phy, sas_phy);
  1306. DECLARE_COMPLETION_ONSTACK(phyreset);
  1307. if (scsi_is_sas_phy_local(local_phy)) {
  1308. phy->in_reset = 1;
  1309. phy->reset_completion = &phyreset;
  1310. }
  1311. rc = sas_phy_reset(local_phy, reset_type);
  1312. sas_put_local_phy(local_phy);
  1313. if (scsi_is_sas_phy_local(local_phy)) {
  1314. int ret = wait_for_completion_timeout(&phyreset, 2 * HZ);
  1315. unsigned long flags;
  1316. spin_lock_irqsave(&phy->lock, flags);
  1317. phy->reset_completion = NULL;
  1318. phy->in_reset = 0;
  1319. spin_unlock_irqrestore(&phy->lock, flags);
  1320. /* report PHY down if timed out */
  1321. if (!ret)
  1322. hisi_sas_phy_down(hisi_hba, sas_phy->id, 0);
  1323. } else
  1324. msleep(2000);
  1325. return rc;
  1326. }
  1327. static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
  1328. {
  1329. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1330. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1331. struct device *dev = hisi_hba->dev;
  1332. int rc = TMF_RESP_FUNC_FAILED;
  1333. if (sas_dev->dev_status != HISI_SAS_DEV_EH)
  1334. return TMF_RESP_FUNC_FAILED;
  1335. sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
  1336. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1337. HISI_SAS_INT_ABT_DEV, 0);
  1338. if (rc < 0) {
  1339. dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
  1340. return TMF_RESP_FUNC_FAILED;
  1341. }
  1342. hisi_sas_dereg_device(hisi_hba, device);
  1343. rc = hisi_sas_debug_I_T_nexus_reset(device);
  1344. if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
  1345. hisi_sas_release_task(hisi_hba, device);
  1346. return rc;
  1347. }
  1348. static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
  1349. {
  1350. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1351. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1352. struct device *dev = hisi_hba->dev;
  1353. int rc = TMF_RESP_FUNC_FAILED;
  1354. sas_dev->dev_status = HISI_SAS_DEV_EH;
  1355. if (dev_is_sata(device)) {
  1356. struct sas_phy *phy;
  1357. /* Clear internal IO and then hardreset */
  1358. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1359. HISI_SAS_INT_ABT_DEV, 0);
  1360. if (rc < 0) {
  1361. dev_err(dev, "lu_reset: internal abort failed\n");
  1362. goto out;
  1363. }
  1364. hisi_sas_dereg_device(hisi_hba, device);
  1365. phy = sas_get_local_phy(device);
  1366. rc = sas_phy_reset(phy, 1);
  1367. if (rc == 0)
  1368. hisi_sas_release_task(hisi_hba, device);
  1369. sas_put_local_phy(phy);
  1370. } else {
  1371. struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
  1372. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1373. HISI_SAS_INT_ABT_DEV, 0);
  1374. if (rc < 0) {
  1375. dev_err(dev, "lu_reset: internal abort failed\n");
  1376. goto out;
  1377. }
  1378. hisi_sas_dereg_device(hisi_hba, device);
  1379. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1380. if (rc == TMF_RESP_FUNC_COMPLETE)
  1381. hisi_sas_release_task(hisi_hba, device);
  1382. }
  1383. out:
  1384. if (rc != TMF_RESP_FUNC_COMPLETE)
  1385. dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
  1386. sas_dev->device_id, rc);
  1387. return rc;
  1388. }
  1389. static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
  1390. {
  1391. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  1392. struct device *dev = hisi_hba->dev;
  1393. HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
  1394. int rc, i;
  1395. queue_work(hisi_hba->wq, &r.work);
  1396. wait_for_completion(r.completion);
  1397. if (!r.done)
  1398. return TMF_RESP_FUNC_FAILED;
  1399. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1400. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  1401. struct domain_device *device = sas_dev->sas_device;
  1402. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
  1403. DEV_IS_EXPANDER(device->dev_type))
  1404. continue;
  1405. rc = hisi_sas_debug_I_T_nexus_reset(device);
  1406. if (rc != TMF_RESP_FUNC_COMPLETE)
  1407. dev_info(dev, "clear nexus ha: for device[%d] rc=%d\n",
  1408. sas_dev->device_id, rc);
  1409. }
  1410. hisi_sas_release_tasks(hisi_hba);
  1411. return TMF_RESP_FUNC_COMPLETE;
  1412. }
  1413. static int hisi_sas_query_task(struct sas_task *task)
  1414. {
  1415. struct scsi_lun lun;
  1416. struct hisi_sas_tmf_task tmf_task;
  1417. int rc = TMF_RESP_FUNC_FAILED;
  1418. if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
  1419. struct scsi_cmnd *cmnd = task->uldd_task;
  1420. struct domain_device *device = task->dev;
  1421. struct hisi_sas_slot *slot = task->lldd_task;
  1422. u32 tag = slot->idx;
  1423. int_to_scsilun(cmnd->device->lun, &lun);
  1424. tmf_task.tmf = TMF_QUERY_TASK;
  1425. tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
  1426. rc = hisi_sas_debug_issue_ssp_tmf(device,
  1427. lun.scsi_lun,
  1428. &tmf_task);
  1429. switch (rc) {
  1430. /* The task is still in Lun, release it then */
  1431. case TMF_RESP_FUNC_SUCC:
  1432. /* The task is not in Lun or failed, reset the phy */
  1433. case TMF_RESP_FUNC_FAILED:
  1434. case TMF_RESP_FUNC_COMPLETE:
  1435. break;
  1436. default:
  1437. rc = TMF_RESP_FUNC_FAILED;
  1438. break;
  1439. }
  1440. }
  1441. return rc;
  1442. }
  1443. static int
  1444. hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
  1445. struct sas_task *task, int abort_flag,
  1446. int task_tag)
  1447. {
  1448. struct domain_device *device = task->dev;
  1449. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1450. struct device *dev = hisi_hba->dev;
  1451. struct hisi_sas_port *port;
  1452. struct hisi_sas_slot *slot;
  1453. struct asd_sas_port *sas_port = device->port;
  1454. struct hisi_sas_cmd_hdr *cmd_hdr_base;
  1455. struct hisi_sas_dq *dq = sas_dev->dq;
  1456. int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
  1457. unsigned long flags, flags_dq = 0;
  1458. int wr_q_index;
  1459. if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
  1460. return -EINVAL;
  1461. if (!device->port)
  1462. return -1;
  1463. port = to_hisi_sas_port(sas_port);
  1464. /* simply get a slot and send abort command */
  1465. spin_lock_irqsave(&hisi_hba->lock, flags);
  1466. rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
  1467. if (rc) {
  1468. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  1469. goto err_out;
  1470. }
  1471. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  1472. slot = &hisi_hba->slot_info[slot_idx];
  1473. spin_lock_irqsave(&dq->lock, flags_dq);
  1474. wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
  1475. if (wr_q_index < 0) {
  1476. spin_unlock_irqrestore(&dq->lock, flags_dq);
  1477. rc = -EAGAIN;
  1478. goto err_out_tag;
  1479. }
  1480. list_add_tail(&slot->delivery, &dq->list);
  1481. spin_unlock_irqrestore(&dq->lock, flags_dq);
  1482. dlvry_queue = dq->id;
  1483. dlvry_queue_slot = wr_q_index;
  1484. slot->n_elem = n_elem;
  1485. slot->dlvry_queue = dlvry_queue;
  1486. slot->dlvry_queue_slot = dlvry_queue_slot;
  1487. cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
  1488. slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
  1489. slot->task = task;
  1490. slot->port = port;
  1491. slot->is_internal = true;
  1492. task->lldd_task = slot;
  1493. memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
  1494. memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
  1495. memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
  1496. hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
  1497. abort_flag, task_tag);
  1498. spin_lock_irqsave(&task->task_state_lock, flags);
  1499. task->task_state_flags |= SAS_TASK_AT_INITIATOR;
  1500. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1501. WRITE_ONCE(slot->ready, 1);
  1502. /* send abort command to the chip */
  1503. spin_lock_irqsave(&dq->lock, flags);
  1504. list_add_tail(&slot->entry, &sas_dev->list);
  1505. hisi_hba->hw->start_delivery(dq);
  1506. spin_unlock_irqrestore(&dq->lock, flags);
  1507. return 0;
  1508. err_out_tag:
  1509. spin_lock_irqsave(&hisi_hba->lock, flags);
  1510. hisi_sas_slot_index_free(hisi_hba, slot_idx);
  1511. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  1512. err_out:
  1513. dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
  1514. return rc;
  1515. }
  1516. /**
  1517. * hisi_sas_internal_task_abort -- execute an internal
  1518. * abort command for single IO command or a device
  1519. * @hisi_hba: host controller struct
  1520. * @device: domain device
  1521. * @abort_flag: mode of operation, device or single IO
  1522. * @tag: tag of IO to be aborted (only relevant to single
  1523. * IO mode)
  1524. */
  1525. static int
  1526. hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
  1527. struct domain_device *device,
  1528. int abort_flag, int tag)
  1529. {
  1530. struct sas_task *task;
  1531. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1532. struct device *dev = hisi_hba->dev;
  1533. int res;
  1534. /*
  1535. * The interface is not realized means this HW don't support internal
  1536. * abort, or don't need to do internal abort. Then here, we return
  1537. * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
  1538. * the internal abort has been executed and returned CQ.
  1539. */
  1540. if (!hisi_hba->hw->prep_abort)
  1541. return TMF_RESP_FUNC_FAILED;
  1542. task = sas_alloc_slow_task(GFP_KERNEL);
  1543. if (!task)
  1544. return -ENOMEM;
  1545. task->dev = device;
  1546. task->task_proto = device->tproto;
  1547. task->task_done = hisi_sas_task_done;
  1548. task->slow_task->timer.function = hisi_sas_tmf_timedout;
  1549. task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT*HZ;
  1550. add_timer(&task->slow_task->timer);
  1551. res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
  1552. task, abort_flag, tag);
  1553. if (res) {
  1554. del_timer(&task->slow_task->timer);
  1555. dev_err(dev, "internal task abort: executing internal task failed: %d\n",
  1556. res);
  1557. goto exit;
  1558. }
  1559. wait_for_completion(&task->slow_task->completion);
  1560. res = TMF_RESP_FUNC_FAILED;
  1561. /* Internal abort timed out */
  1562. if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
  1563. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  1564. struct hisi_sas_slot *slot = task->lldd_task;
  1565. if (slot) {
  1566. struct hisi_sas_cq *cq =
  1567. &hisi_hba->cq[slot->dlvry_queue];
  1568. /*
  1569. * flush tasklet to avoid free'ing task
  1570. * before using task in IO completion
  1571. */
  1572. tasklet_kill(&cq->tasklet);
  1573. slot->task = NULL;
  1574. }
  1575. dev_err(dev, "internal task abort: timeout and not done.\n");
  1576. res = -EIO;
  1577. goto exit;
  1578. } else
  1579. dev_err(dev, "internal task abort: timeout.\n");
  1580. }
  1581. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  1582. task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
  1583. res = TMF_RESP_FUNC_COMPLETE;
  1584. goto exit;
  1585. }
  1586. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  1587. task->task_status.stat == TMF_RESP_FUNC_SUCC) {
  1588. res = TMF_RESP_FUNC_SUCC;
  1589. goto exit;
  1590. }
  1591. exit:
  1592. dev_dbg(dev, "internal task abort: task to dev %016llx task=%p "
  1593. "resp: 0x%x sts 0x%x\n",
  1594. SAS_ADDR(device->sas_addr),
  1595. task,
  1596. task->task_status.resp, /* 0 is complete, -1 is undelivered */
  1597. task->task_status.stat);
  1598. sas_free_task(task);
  1599. return res;
  1600. }
  1601. static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
  1602. {
  1603. hisi_sas_port_notify_formed(sas_phy);
  1604. }
  1605. static void hisi_sas_port_deformed(struct asd_sas_phy *sas_phy)
  1606. {
  1607. }
  1608. static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
  1609. u8 reg_index, u8 reg_count, u8 *write_data)
  1610. {
  1611. struct hisi_hba *hisi_hba = sha->lldd_ha;
  1612. if (!hisi_hba->hw->write_gpio)
  1613. return -EOPNOTSUPP;
  1614. return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
  1615. reg_index, reg_count, write_data);
  1616. }
  1617. static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
  1618. {
  1619. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1620. struct sas_phy *sphy = sas_phy->phy;
  1621. struct sas_phy_data *d = sphy->hostdata;
  1622. phy->phy_attached = 0;
  1623. phy->phy_type = 0;
  1624. phy->port = NULL;
  1625. if (d->enable)
  1626. sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
  1627. else
  1628. sphy->negotiated_linkrate = SAS_PHY_DISABLED;
  1629. }
  1630. void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
  1631. {
  1632. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  1633. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1634. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1635. struct device *dev = hisi_hba->dev;
  1636. if (rdy) {
  1637. /* Phy down but ready */
  1638. hisi_sas_bytes_dmaed(hisi_hba, phy_no);
  1639. hisi_sas_port_notify_formed(sas_phy);
  1640. } else {
  1641. struct hisi_sas_port *port = phy->port;
  1642. if (test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags) ||
  1643. phy->in_reset) {
  1644. dev_info(dev, "ignore flutter phy%d down\n", phy_no);
  1645. return;
  1646. }
  1647. /* Phy down and not ready */
  1648. sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
  1649. sas_phy_disconnected(sas_phy);
  1650. if (port) {
  1651. if (phy->phy_type & PORT_TYPE_SAS) {
  1652. int port_id = port->id;
  1653. if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
  1654. port_id))
  1655. port->port_attached = 0;
  1656. } else if (phy->phy_type & PORT_TYPE_SATA)
  1657. port->port_attached = 0;
  1658. }
  1659. hisi_sas_phy_disconnected(phy);
  1660. }
  1661. }
  1662. EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
  1663. void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba)
  1664. {
  1665. int i;
  1666. for (i = 0; i < hisi_hba->queue_count; i++) {
  1667. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1668. tasklet_kill(&cq->tasklet);
  1669. }
  1670. }
  1671. EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets);
  1672. struct scsi_transport_template *hisi_sas_stt;
  1673. EXPORT_SYMBOL_GPL(hisi_sas_stt);
  1674. struct device_attribute *host_attrs[] = {
  1675. &dev_attr_phy_event_threshold,
  1676. NULL,
  1677. };
  1678. EXPORT_SYMBOL_GPL(host_attrs);
  1679. static struct sas_domain_function_template hisi_sas_transport_ops = {
  1680. .lldd_dev_found = hisi_sas_dev_found,
  1681. .lldd_dev_gone = hisi_sas_dev_gone,
  1682. .lldd_execute_task = hisi_sas_queue_command,
  1683. .lldd_control_phy = hisi_sas_control_phy,
  1684. .lldd_abort_task = hisi_sas_abort_task,
  1685. .lldd_abort_task_set = hisi_sas_abort_task_set,
  1686. .lldd_clear_aca = hisi_sas_clear_aca,
  1687. .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
  1688. .lldd_lu_reset = hisi_sas_lu_reset,
  1689. .lldd_query_task = hisi_sas_query_task,
  1690. .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
  1691. .lldd_port_formed = hisi_sas_port_formed,
  1692. .lldd_port_deformed = hisi_sas_port_deformed,
  1693. .lldd_write_gpio = hisi_sas_write_gpio,
  1694. };
  1695. void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
  1696. {
  1697. int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
  1698. for (i = 0; i < hisi_hba->queue_count; i++) {
  1699. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1700. struct hisi_sas_dq *dq = &hisi_hba->dq[i];
  1701. s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
  1702. memset(hisi_hba->cmd_hdr[i], 0, s);
  1703. dq->wr_point = 0;
  1704. s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
  1705. memset(hisi_hba->complete_hdr[i], 0, s);
  1706. cq->rd_point = 0;
  1707. }
  1708. s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
  1709. memset(hisi_hba->initial_fis, 0, s);
  1710. s = max_command_entries * sizeof(struct hisi_sas_iost);
  1711. memset(hisi_hba->iost, 0, s);
  1712. s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
  1713. memset(hisi_hba->breakpoint, 0, s);
  1714. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
  1715. memset(hisi_hba->sata_breakpoint, 0, s);
  1716. }
  1717. EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
  1718. int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
  1719. {
  1720. struct device *dev = hisi_hba->dev;
  1721. int i, j, s, max_command_entries = hisi_hba->hw->max_command_entries;
  1722. int max_command_entries_ru, sz_slot_buf_ru;
  1723. int blk_cnt, slots_per_blk;
  1724. sema_init(&hisi_hba->sem, 1);
  1725. spin_lock_init(&hisi_hba->lock);
  1726. for (i = 0; i < hisi_hba->n_phy; i++) {
  1727. hisi_sas_phy_init(hisi_hba, i);
  1728. hisi_hba->port[i].port_attached = 0;
  1729. hisi_hba->port[i].id = -1;
  1730. }
  1731. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1732. hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
  1733. hisi_hba->devices[i].device_id = i;
  1734. hisi_hba->devices[i].dev_status = HISI_SAS_DEV_NORMAL;
  1735. }
  1736. for (i = 0; i < hisi_hba->queue_count; i++) {
  1737. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1738. struct hisi_sas_dq *dq = &hisi_hba->dq[i];
  1739. /* Completion queue structure */
  1740. cq->id = i;
  1741. cq->hisi_hba = hisi_hba;
  1742. /* Delivery queue structure */
  1743. spin_lock_init(&dq->lock);
  1744. INIT_LIST_HEAD(&dq->list);
  1745. dq->id = i;
  1746. dq->hisi_hba = hisi_hba;
  1747. /* Delivery queue */
  1748. s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
  1749. hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
  1750. &hisi_hba->cmd_hdr_dma[i],
  1751. GFP_KERNEL);
  1752. if (!hisi_hba->cmd_hdr[i])
  1753. goto err_out;
  1754. /* Completion queue */
  1755. s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
  1756. hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
  1757. &hisi_hba->complete_hdr_dma[i],
  1758. GFP_KERNEL);
  1759. if (!hisi_hba->complete_hdr[i])
  1760. goto err_out;
  1761. }
  1762. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
  1763. hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
  1764. GFP_KERNEL);
  1765. if (!hisi_hba->itct)
  1766. goto err_out;
  1767. memset(hisi_hba->itct, 0, s);
  1768. hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
  1769. sizeof(struct hisi_sas_slot),
  1770. GFP_KERNEL);
  1771. if (!hisi_hba->slot_info)
  1772. goto err_out;
  1773. /* roundup to avoid overly large block size */
  1774. max_command_entries_ru = roundup(max_command_entries, 64);
  1775. sz_slot_buf_ru = roundup(sizeof(struct hisi_sas_slot_buf_table), 64);
  1776. s = lcm(max_command_entries_ru, sz_slot_buf_ru);
  1777. blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
  1778. slots_per_blk = s / sz_slot_buf_ru;
  1779. for (i = 0; i < blk_cnt; i++) {
  1780. struct hisi_sas_slot_buf_table *buf;
  1781. dma_addr_t buf_dma;
  1782. int slot_index = i * slots_per_blk;
  1783. buf = dmam_alloc_coherent(dev, s, &buf_dma, GFP_KERNEL);
  1784. if (!buf)
  1785. goto err_out;
  1786. memset(buf, 0, s);
  1787. for (j = 0; j < slots_per_blk; j++, slot_index++) {
  1788. struct hisi_sas_slot *slot;
  1789. slot = &hisi_hba->slot_info[slot_index];
  1790. slot->buf = buf;
  1791. slot->buf_dma = buf_dma;
  1792. slot->idx = slot_index;
  1793. buf++;
  1794. buf_dma += sizeof(*buf);
  1795. }
  1796. }
  1797. s = max_command_entries * sizeof(struct hisi_sas_iost);
  1798. hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
  1799. GFP_KERNEL);
  1800. if (!hisi_hba->iost)
  1801. goto err_out;
  1802. s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
  1803. hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
  1804. &hisi_hba->breakpoint_dma,
  1805. GFP_KERNEL);
  1806. if (!hisi_hba->breakpoint)
  1807. goto err_out;
  1808. hisi_hba->slot_index_count = max_command_entries;
  1809. s = hisi_hba->slot_index_count / BITS_PER_BYTE;
  1810. hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
  1811. if (!hisi_hba->slot_index_tags)
  1812. goto err_out;
  1813. s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
  1814. hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
  1815. &hisi_hba->initial_fis_dma,
  1816. GFP_KERNEL);
  1817. if (!hisi_hba->initial_fis)
  1818. goto err_out;
  1819. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
  1820. hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
  1821. &hisi_hba->sata_breakpoint_dma,
  1822. GFP_KERNEL);
  1823. if (!hisi_hba->sata_breakpoint)
  1824. goto err_out;
  1825. hisi_sas_init_mem(hisi_hba);
  1826. hisi_sas_slot_index_init(hisi_hba);
  1827. hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
  1828. if (!hisi_hba->wq) {
  1829. dev_err(dev, "sas_alloc: failed to create workqueue\n");
  1830. goto err_out;
  1831. }
  1832. return 0;
  1833. err_out:
  1834. return -ENOMEM;
  1835. }
  1836. EXPORT_SYMBOL_GPL(hisi_sas_alloc);
  1837. void hisi_sas_free(struct hisi_hba *hisi_hba)
  1838. {
  1839. if (hisi_hba->wq)
  1840. destroy_workqueue(hisi_hba->wq);
  1841. }
  1842. EXPORT_SYMBOL_GPL(hisi_sas_free);
  1843. void hisi_sas_rst_work_handler(struct work_struct *work)
  1844. {
  1845. struct hisi_hba *hisi_hba =
  1846. container_of(work, struct hisi_hba, rst_work);
  1847. hisi_sas_controller_reset(hisi_hba);
  1848. }
  1849. EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
  1850. void hisi_sas_sync_rst_work_handler(struct work_struct *work)
  1851. {
  1852. struct hisi_sas_rst *rst =
  1853. container_of(work, struct hisi_sas_rst, work);
  1854. if (!hisi_sas_controller_reset(rst->hisi_hba))
  1855. rst->done = true;
  1856. complete(rst->completion);
  1857. }
  1858. EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
  1859. int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
  1860. {
  1861. struct device *dev = hisi_hba->dev;
  1862. struct platform_device *pdev = hisi_hba->platform_dev;
  1863. struct device_node *np = pdev ? pdev->dev.of_node : NULL;
  1864. struct clk *refclk;
  1865. if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
  1866. SAS_ADDR_SIZE)) {
  1867. dev_err(dev, "could not get property sas-addr\n");
  1868. return -ENOENT;
  1869. }
  1870. if (np) {
  1871. /*
  1872. * These properties are only required for platform device-based
  1873. * controller with DT firmware.
  1874. */
  1875. hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
  1876. "hisilicon,sas-syscon");
  1877. if (IS_ERR(hisi_hba->ctrl)) {
  1878. dev_err(dev, "could not get syscon\n");
  1879. return -ENOENT;
  1880. }
  1881. if (device_property_read_u32(dev, "ctrl-reset-reg",
  1882. &hisi_hba->ctrl_reset_reg)) {
  1883. dev_err(dev,
  1884. "could not get property ctrl-reset-reg\n");
  1885. return -ENOENT;
  1886. }
  1887. if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
  1888. &hisi_hba->ctrl_reset_sts_reg)) {
  1889. dev_err(dev,
  1890. "could not get property ctrl-reset-sts-reg\n");
  1891. return -ENOENT;
  1892. }
  1893. if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
  1894. &hisi_hba->ctrl_clock_ena_reg)) {
  1895. dev_err(dev,
  1896. "could not get property ctrl-clock-ena-reg\n");
  1897. return -ENOENT;
  1898. }
  1899. }
  1900. refclk = devm_clk_get(dev, NULL);
  1901. if (IS_ERR(refclk))
  1902. dev_dbg(dev, "no ref clk property\n");
  1903. else
  1904. hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
  1905. if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
  1906. dev_err(dev, "could not get property phy-count\n");
  1907. return -ENOENT;
  1908. }
  1909. if (device_property_read_u32(dev, "queue-count",
  1910. &hisi_hba->queue_count)) {
  1911. dev_err(dev, "could not get property queue-count\n");
  1912. return -ENOENT;
  1913. }
  1914. return 0;
  1915. }
  1916. EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
  1917. static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
  1918. const struct hisi_sas_hw *hw)
  1919. {
  1920. struct resource *res;
  1921. struct Scsi_Host *shost;
  1922. struct hisi_hba *hisi_hba;
  1923. struct device *dev = &pdev->dev;
  1924. shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
  1925. if (!shost) {
  1926. dev_err(dev, "scsi host alloc failed\n");
  1927. return NULL;
  1928. }
  1929. hisi_hba = shost_priv(shost);
  1930. INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
  1931. hisi_hba->hw = hw;
  1932. hisi_hba->dev = dev;
  1933. hisi_hba->platform_dev = pdev;
  1934. hisi_hba->shost = shost;
  1935. SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
  1936. timer_setup(&hisi_hba->timer, NULL, 0);
  1937. if (hisi_sas_get_fw_info(hisi_hba) < 0)
  1938. goto err_out;
  1939. if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) &&
  1940. dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {
  1941. dev_err(dev, "No usable DMA addressing method\n");
  1942. goto err_out;
  1943. }
  1944. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1945. hisi_hba->regs = devm_ioremap_resource(dev, res);
  1946. if (IS_ERR(hisi_hba->regs))
  1947. goto err_out;
  1948. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1949. if (res) {
  1950. hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
  1951. if (IS_ERR(hisi_hba->sgpio_regs))
  1952. goto err_out;
  1953. }
  1954. if (hisi_sas_alloc(hisi_hba, shost)) {
  1955. hisi_sas_free(hisi_hba);
  1956. goto err_out;
  1957. }
  1958. return shost;
  1959. err_out:
  1960. scsi_host_put(shost);
  1961. dev_err(dev, "shost alloc failed\n");
  1962. return NULL;
  1963. }
  1964. int hisi_sas_probe(struct platform_device *pdev,
  1965. const struct hisi_sas_hw *hw)
  1966. {
  1967. struct Scsi_Host *shost;
  1968. struct hisi_hba *hisi_hba;
  1969. struct device *dev = &pdev->dev;
  1970. struct asd_sas_phy **arr_phy;
  1971. struct asd_sas_port **arr_port;
  1972. struct sas_ha_struct *sha;
  1973. int rc, phy_nr, port_nr, i;
  1974. shost = hisi_sas_shost_alloc(pdev, hw);
  1975. if (!shost)
  1976. return -ENOMEM;
  1977. sha = SHOST_TO_SAS_HA(shost);
  1978. hisi_hba = shost_priv(shost);
  1979. platform_set_drvdata(pdev, sha);
  1980. phy_nr = port_nr = hisi_hba->n_phy;
  1981. arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
  1982. arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
  1983. if (!arr_phy || !arr_port) {
  1984. rc = -ENOMEM;
  1985. goto err_out_ha;
  1986. }
  1987. sha->sas_phy = arr_phy;
  1988. sha->sas_port = arr_port;
  1989. sha->lldd_ha = hisi_hba;
  1990. shost->transportt = hisi_sas_stt;
  1991. shost->max_id = HISI_SAS_MAX_DEVICES;
  1992. shost->max_lun = ~0;
  1993. shost->max_channel = 1;
  1994. shost->max_cmd_len = 16;
  1995. shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT);
  1996. shost->can_queue = hisi_hba->hw->max_command_entries;
  1997. shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
  1998. sha->sas_ha_name = DRV_NAME;
  1999. sha->dev = hisi_hba->dev;
  2000. sha->lldd_module = THIS_MODULE;
  2001. sha->sas_addr = &hisi_hba->sas_addr[0];
  2002. sha->num_phys = hisi_hba->n_phy;
  2003. sha->core.shost = hisi_hba->shost;
  2004. for (i = 0; i < hisi_hba->n_phy; i++) {
  2005. sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
  2006. sha->sas_port[i] = &hisi_hba->port[i].sas_port;
  2007. }
  2008. rc = scsi_add_host(shost, &pdev->dev);
  2009. if (rc)
  2010. goto err_out_ha;
  2011. rc = sas_register_ha(sha);
  2012. if (rc)
  2013. goto err_out_register_ha;
  2014. rc = hisi_hba->hw->hw_init(hisi_hba);
  2015. if (rc)
  2016. goto err_out_register_ha;
  2017. scsi_scan_host(shost);
  2018. return 0;
  2019. err_out_register_ha:
  2020. scsi_remove_host(shost);
  2021. err_out_ha:
  2022. hisi_sas_free(hisi_hba);
  2023. scsi_host_put(shost);
  2024. return rc;
  2025. }
  2026. EXPORT_SYMBOL_GPL(hisi_sas_probe);
  2027. int hisi_sas_remove(struct platform_device *pdev)
  2028. {
  2029. struct sas_ha_struct *sha = platform_get_drvdata(pdev);
  2030. struct hisi_hba *hisi_hba = sha->lldd_ha;
  2031. struct Scsi_Host *shost = sha->core.shost;
  2032. if (timer_pending(&hisi_hba->timer))
  2033. del_timer(&hisi_hba->timer);
  2034. sas_unregister_ha(sha);
  2035. sas_remove_host(sha->core.shost);
  2036. hisi_sas_free(hisi_hba);
  2037. scsi_host_put(shost);
  2038. return 0;
  2039. }
  2040. EXPORT_SYMBOL_GPL(hisi_sas_remove);
  2041. static __init int hisi_sas_init(void)
  2042. {
  2043. hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
  2044. if (!hisi_sas_stt)
  2045. return -ENOMEM;
  2046. return 0;
  2047. }
  2048. static __exit void hisi_sas_exit(void)
  2049. {
  2050. sas_release_transport(hisi_sas_stt);
  2051. }
  2052. module_init(hisi_sas_init);
  2053. module_exit(hisi_sas_exit);
  2054. MODULE_LICENSE("GPL");
  2055. MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
  2056. MODULE_DESCRIPTION("HISILICON SAS controller driver");
  2057. MODULE_ALIAS("platform:" DRV_NAME);