sm712fb.c 48 KB

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  1. /*
  2. * Silicon Motion SM7XX frame buffer device
  3. *
  4. * Copyright (C) 2006 Silicon Motion Technology Corp.
  5. * Authors: Ge Wang, gewang@siliconmotion.com
  6. * Boyod boyod.yang@siliconmotion.com.cn
  7. *
  8. * Copyright (C) 2009 Lemote, Inc.
  9. * Author: Wu Zhangjin, wuzhangjin@gmail.com
  10. *
  11. * Copyright (C) 2011 Igalia, S.L.
  12. * Author: Javier M. Mellid <jmunhoz@igalia.com>
  13. *
  14. * This file is subject to the terms and conditions of the GNU General Public
  15. * License. See the file COPYING in the main directory of this archive for
  16. * more details.
  17. *
  18. * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
  19. */
  20. #include <linux/io.h>
  21. #include <linux/fb.h>
  22. #include <linux/pci.h>
  23. #include <linux/init.h>
  24. #include <linux/slab.h>
  25. #include <linux/uaccess.h>
  26. #include <linux/module.h>
  27. #include <linux/console.h>
  28. #include <linux/screen_info.h>
  29. #include <linux/pm.h>
  30. #include "sm712.h"
  31. /*
  32. * Private structure
  33. */
  34. struct smtcfb_info {
  35. struct pci_dev *pdev;
  36. struct fb_info *fb;
  37. u16 chip_id;
  38. u8 chip_rev_id;
  39. void __iomem *lfb; /* linear frame buffer */
  40. void __iomem *dp_regs; /* drawing processor control regs */
  41. void __iomem *vp_regs; /* video processor control regs */
  42. void __iomem *cp_regs; /* capture processor control regs */
  43. void __iomem *mmio; /* memory map IO port */
  44. u_int width;
  45. u_int height;
  46. u_int hz;
  47. u32 colreg[17];
  48. };
  49. void __iomem *smtc_regbaseaddress; /* Memory Map IO starting address */
  50. static const struct fb_var_screeninfo smtcfb_var = {
  51. .xres = 1024,
  52. .yres = 600,
  53. .xres_virtual = 1024,
  54. .yres_virtual = 600,
  55. .bits_per_pixel = 16,
  56. .red = {16, 8, 0},
  57. .green = {8, 8, 0},
  58. .blue = {0, 8, 0},
  59. .activate = FB_ACTIVATE_NOW,
  60. .height = -1,
  61. .width = -1,
  62. .vmode = FB_VMODE_NONINTERLACED,
  63. .nonstd = 0,
  64. .accel_flags = FB_ACCELF_TEXT,
  65. };
  66. static struct fb_fix_screeninfo smtcfb_fix = {
  67. .id = "smXXXfb",
  68. .type = FB_TYPE_PACKED_PIXELS,
  69. .visual = FB_VISUAL_TRUECOLOR,
  70. .line_length = 800 * 3,
  71. .accel = FB_ACCEL_SMI_LYNX,
  72. .type_aux = 0,
  73. .xpanstep = 0,
  74. .ypanstep = 0,
  75. .ywrapstep = 0,
  76. };
  77. struct vesa_mode {
  78. char index[6];
  79. u16 lfb_width;
  80. u16 lfb_height;
  81. u16 lfb_depth;
  82. };
  83. static const struct vesa_mode vesa_mode_table[] = {
  84. {"0x301", 640, 480, 8},
  85. {"0x303", 800, 600, 8},
  86. {"0x305", 1024, 768, 8},
  87. {"0x307", 1280, 1024, 8},
  88. {"0x311", 640, 480, 16},
  89. {"0x314", 800, 600, 16},
  90. {"0x317", 1024, 768, 16},
  91. {"0x31A", 1280, 1024, 16},
  92. {"0x312", 640, 480, 24},
  93. {"0x315", 800, 600, 24},
  94. {"0x318", 1024, 768, 24},
  95. {"0x31B", 1280, 1024, 24},
  96. };
  97. /**********************************************************************
  98. SM712 Mode table.
  99. **********************************************************************/
  100. static const struct modeinit vgamode[] = {
  101. {
  102. /* mode#0: 640 x 480 16Bpp 60Hz */
  103. 640, 480, 16, 60,
  104. /* Init_MISC */
  105. 0xE3,
  106. { /* Init_SR0_SR4 */
  107. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  108. },
  109. { /* Init_SR10_SR24 */
  110. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  111. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  112. 0xC4, 0x30, 0x02, 0x01, 0x01,
  113. },
  114. { /* Init_SR30_SR75 */
  115. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  116. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  117. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  118. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  119. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  120. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  121. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  122. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  123. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  124. },
  125. { /* Init_SR80_SR93 */
  126. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  127. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  128. 0x00, 0x00, 0x00, 0x00,
  129. },
  130. { /* Init_SRA0_SRAF */
  131. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  132. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  133. },
  134. { /* Init_GR00_GR08 */
  135. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  136. 0xFF,
  137. },
  138. { /* Init_AR00_AR14 */
  139. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  140. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  141. 0x41, 0x00, 0x0F, 0x00, 0x00,
  142. },
  143. { /* Init_CR00_CR18 */
  144. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  145. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  146. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  147. 0xFF,
  148. },
  149. { /* Init_CR30_CR4D */
  150. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  151. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  152. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  153. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  154. },
  155. { /* Init_CR90_CRA7 */
  156. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  157. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  158. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  159. },
  160. },
  161. {
  162. /* mode#1: 640 x 480 24Bpp 60Hz */
  163. 640, 480, 24, 60,
  164. /* Init_MISC */
  165. 0xE3,
  166. { /* Init_SR0_SR4 */
  167. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  168. },
  169. { /* Init_SR10_SR24 */
  170. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  171. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  172. 0xC4, 0x30, 0x02, 0x01, 0x01,
  173. },
  174. { /* Init_SR30_SR75 */
  175. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  176. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  177. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  178. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  179. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  180. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  181. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  182. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  183. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  184. },
  185. { /* Init_SR80_SR93 */
  186. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  187. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  188. 0x00, 0x00, 0x00, 0x00,
  189. },
  190. { /* Init_SRA0_SRAF */
  191. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  192. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  193. },
  194. { /* Init_GR00_GR08 */
  195. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  196. 0xFF,
  197. },
  198. { /* Init_AR00_AR14 */
  199. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  200. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  201. 0x41, 0x00, 0x0F, 0x00, 0x00,
  202. },
  203. { /* Init_CR00_CR18 */
  204. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  205. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  206. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  207. 0xFF,
  208. },
  209. { /* Init_CR30_CR4D */
  210. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  211. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  212. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  213. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  214. },
  215. { /* Init_CR90_CRA7 */
  216. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  217. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  218. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  219. },
  220. },
  221. {
  222. /* mode#0: 640 x 480 32Bpp 60Hz */
  223. 640, 480, 32, 60,
  224. /* Init_MISC */
  225. 0xE3,
  226. { /* Init_SR0_SR4 */
  227. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  228. },
  229. { /* Init_SR10_SR24 */
  230. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  231. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  232. 0xC4, 0x30, 0x02, 0x01, 0x01,
  233. },
  234. { /* Init_SR30_SR75 */
  235. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  236. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  237. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  238. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  239. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  240. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  241. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  242. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  243. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  244. },
  245. { /* Init_SR80_SR93 */
  246. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  247. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  248. 0x00, 0x00, 0x00, 0x00,
  249. },
  250. { /* Init_SRA0_SRAF */
  251. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  252. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  253. },
  254. { /* Init_GR00_GR08 */
  255. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  256. 0xFF,
  257. },
  258. { /* Init_AR00_AR14 */
  259. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  260. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  261. 0x41, 0x00, 0x0F, 0x00, 0x00,
  262. },
  263. { /* Init_CR00_CR18 */
  264. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  265. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  266. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  267. 0xFF,
  268. },
  269. { /* Init_CR30_CR4D */
  270. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  271. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  272. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  273. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  274. },
  275. { /* Init_CR90_CRA7 */
  276. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  277. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  278. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  279. },
  280. },
  281. { /* mode#2: 800 x 600 16Bpp 60Hz */
  282. 800, 600, 16, 60,
  283. /* Init_MISC */
  284. 0x2B,
  285. { /* Init_SR0_SR4 */
  286. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  287. },
  288. { /* Init_SR10_SR24 */
  289. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  290. 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  291. 0xC4, 0x30, 0x02, 0x01, 0x01,
  292. },
  293. { /* Init_SR30_SR75 */
  294. 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  295. 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  296. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  297. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  298. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  299. 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  300. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  301. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  302. 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  303. },
  304. { /* Init_SR80_SR93 */
  305. 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  306. 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  307. 0x00, 0x00, 0x00, 0x00,
  308. },
  309. { /* Init_SRA0_SRAF */
  310. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  311. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  312. },
  313. { /* Init_GR00_GR08 */
  314. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  315. 0xFF,
  316. },
  317. { /* Init_AR00_AR14 */
  318. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  319. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  320. 0x41, 0x00, 0x0F, 0x00, 0x00,
  321. },
  322. { /* Init_CR00_CR18 */
  323. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  324. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  325. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  326. 0xFF,
  327. },
  328. { /* Init_CR30_CR4D */
  329. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  330. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  331. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  332. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  333. },
  334. { /* Init_CR90_CRA7 */
  335. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  336. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  337. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  338. },
  339. },
  340. { /* mode#3: 800 x 600 24Bpp 60Hz */
  341. 800, 600, 24, 60,
  342. 0x2B,
  343. { /* Init_SR0_SR4 */
  344. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  345. },
  346. { /* Init_SR10_SR24 */
  347. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  348. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  349. 0xC4, 0x30, 0x02, 0x01, 0x01,
  350. },
  351. { /* Init_SR30_SR75 */
  352. 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
  353. 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
  354. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  355. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
  356. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  357. 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
  358. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  359. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  360. 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
  361. },
  362. { /* Init_SR80_SR93 */
  363. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
  364. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
  365. 0x00, 0x00, 0x00, 0x00,
  366. },
  367. { /* Init_SRA0_SRAF */
  368. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  369. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  370. },
  371. { /* Init_GR00_GR08 */
  372. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  373. 0xFF,
  374. },
  375. { /* Init_AR00_AR14 */
  376. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  377. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  378. 0x41, 0x00, 0x0F, 0x00, 0x00,
  379. },
  380. { /* Init_CR00_CR18 */
  381. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  382. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  383. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  384. 0xFF,
  385. },
  386. { /* Init_CR30_CR4D */
  387. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  388. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  389. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  390. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  391. },
  392. { /* Init_CR90_CRA7 */
  393. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  394. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  395. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  396. },
  397. },
  398. { /* mode#7: 800 x 600 32Bpp 60Hz */
  399. 800, 600, 32, 60,
  400. /* Init_MISC */
  401. 0x2B,
  402. { /* Init_SR0_SR4 */
  403. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  404. },
  405. { /* Init_SR10_SR24 */
  406. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  407. 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  408. 0xC4, 0x30, 0x02, 0x01, 0x01,
  409. },
  410. { /* Init_SR30_SR75 */
  411. 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  412. 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  413. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  414. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  415. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  416. 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  417. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  418. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  419. 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  420. },
  421. { /* Init_SR80_SR93 */
  422. 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  423. 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  424. 0x00, 0x00, 0x00, 0x00,
  425. },
  426. { /* Init_SRA0_SRAF */
  427. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  428. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  429. },
  430. { /* Init_GR00_GR08 */
  431. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  432. 0xFF,
  433. },
  434. { /* Init_AR00_AR14 */
  435. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  436. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  437. 0x41, 0x00, 0x0F, 0x00, 0x00,
  438. },
  439. { /* Init_CR00_CR18 */
  440. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  441. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  442. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  443. 0xFF,
  444. },
  445. { /* Init_CR30_CR4D */
  446. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  447. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  448. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  449. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  450. },
  451. { /* Init_CR90_CRA7 */
  452. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  453. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  454. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  455. },
  456. },
  457. /* We use 1024x768 table to light 1024x600 panel for lemote */
  458. { /* mode#4: 1024 x 600 16Bpp 60Hz */
  459. 1024, 600, 16, 60,
  460. /* Init_MISC */
  461. 0xEB,
  462. { /* Init_SR0_SR4 */
  463. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  464. },
  465. { /* Init_SR10_SR24 */
  466. 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
  467. 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  468. 0xC4, 0x30, 0x02, 0x00, 0x01,
  469. },
  470. { /* Init_SR30_SR75 */
  471. 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
  472. 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
  473. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  474. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
  475. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  476. 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
  477. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  478. 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
  479. 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
  480. },
  481. { /* Init_SR80_SR93 */
  482. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  483. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  484. 0x00, 0x00, 0x00, 0x00,
  485. },
  486. { /* Init_SRA0_SRAF */
  487. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  488. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  489. },
  490. { /* Init_GR00_GR08 */
  491. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  492. 0xFF,
  493. },
  494. { /* Init_AR00_AR14 */
  495. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  496. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  497. 0x41, 0x00, 0x0F, 0x00, 0x00,
  498. },
  499. { /* Init_CR00_CR18 */
  500. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  501. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  502. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  503. 0xFF,
  504. },
  505. { /* Init_CR30_CR4D */
  506. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  507. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  508. 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
  509. 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
  510. },
  511. { /* Init_CR90_CRA7 */
  512. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  513. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  514. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  515. },
  516. },
  517. { /* 1024 x 768 16Bpp 60Hz */
  518. 1024, 768, 16, 60,
  519. /* Init_MISC */
  520. 0xEB,
  521. { /* Init_SR0_SR4 */
  522. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  523. },
  524. { /* Init_SR10_SR24 */
  525. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  526. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0xC4, 0x30, 0x02, 0x01, 0x01,
  528. },
  529. { /* Init_SR30_SR75 */
  530. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  531. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  532. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  533. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  534. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  535. 0x0F, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  536. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  537. 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  538. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  539. },
  540. { /* Init_SR80_SR93 */
  541. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  542. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  543. 0x00, 0x00, 0x00, 0x00,
  544. },
  545. { /* Init_SRA0_SRAF */
  546. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  547. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  548. },
  549. { /* Init_GR00_GR08 */
  550. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  551. 0xFF,
  552. },
  553. { /* Init_AR00_AR14 */
  554. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  555. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  556. 0x41, 0x00, 0x0F, 0x00, 0x00,
  557. },
  558. { /* Init_CR00_CR18 */
  559. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  560. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  562. 0xFF,
  563. },
  564. { /* Init_CR30_CR4D */
  565. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  566. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  567. 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  568. 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  569. },
  570. { /* Init_CR90_CRA7 */
  571. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  572. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  573. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  574. },
  575. },
  576. { /* mode#5: 1024 x 768 24Bpp 60Hz */
  577. 1024, 768, 24, 60,
  578. /* Init_MISC */
  579. 0xEB,
  580. { /* Init_SR0_SR4 */
  581. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  582. },
  583. { /* Init_SR10_SR24 */
  584. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  585. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  586. 0xC4, 0x30, 0x02, 0x01, 0x01,
  587. },
  588. { /* Init_SR30_SR75 */
  589. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  590. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  591. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  592. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  593. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  594. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  595. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  596. 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  597. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  598. },
  599. { /* Init_SR80_SR93 */
  600. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  601. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  602. 0x00, 0x00, 0x00, 0x00,
  603. },
  604. { /* Init_SRA0_SRAF */
  605. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  606. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  607. },
  608. { /* Init_GR00_GR08 */
  609. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  610. 0xFF,
  611. },
  612. { /* Init_AR00_AR14 */
  613. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  614. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  615. 0x41, 0x00, 0x0F, 0x00, 0x00,
  616. },
  617. { /* Init_CR00_CR18 */
  618. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  619. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  620. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  621. 0xFF,
  622. },
  623. { /* Init_CR30_CR4D */
  624. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  625. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  626. 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  627. 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  628. },
  629. { /* Init_CR90_CRA7 */
  630. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  631. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  632. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  633. },
  634. },
  635. { /* mode#4: 1024 x 768 32Bpp 60Hz */
  636. 1024, 768, 32, 60,
  637. /* Init_MISC */
  638. 0xEB,
  639. { /* Init_SR0_SR4 */
  640. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  641. },
  642. { /* Init_SR10_SR24 */
  643. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  644. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  645. 0xC4, 0x32, 0x02, 0x01, 0x01,
  646. },
  647. { /* Init_SR30_SR75 */
  648. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  649. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  650. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  651. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  652. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  653. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  654. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  655. 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  656. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  657. },
  658. { /* Init_SR80_SR93 */
  659. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  660. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  661. 0x00, 0x00, 0x00, 0x00,
  662. },
  663. { /* Init_SRA0_SRAF */
  664. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  665. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  666. },
  667. { /* Init_GR00_GR08 */
  668. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  669. 0xFF,
  670. },
  671. { /* Init_AR00_AR14 */
  672. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  673. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  674. 0x41, 0x00, 0x0F, 0x00, 0x00,
  675. },
  676. { /* Init_CR00_CR18 */
  677. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  678. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  679. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  680. 0xFF,
  681. },
  682. { /* Init_CR30_CR4D */
  683. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  684. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  685. 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  686. 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  687. },
  688. { /* Init_CR90_CRA7 */
  689. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  690. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  691. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  692. },
  693. },
  694. { /* mode#6: 320 x 240 16Bpp 60Hz */
  695. 320, 240, 16, 60,
  696. /* Init_MISC */
  697. 0xEB,
  698. { /* Init_SR0_SR4 */
  699. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  700. },
  701. { /* Init_SR10_SR24 */
  702. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  703. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  704. 0xC4, 0x32, 0x02, 0x01, 0x01,
  705. },
  706. { /* Init_SR30_SR75 */
  707. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  708. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  709. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  710. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  711. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  712. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  713. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  714. 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  715. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  716. },
  717. { /* Init_SR80_SR93 */
  718. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  719. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  720. 0x00, 0x00, 0x00, 0x00,
  721. },
  722. { /* Init_SRA0_SRAF */
  723. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  724. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  725. },
  726. { /* Init_GR00_GR08 */
  727. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  728. 0xFF,
  729. },
  730. { /* Init_AR00_AR14 */
  731. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  732. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  733. 0x41, 0x00, 0x0F, 0x00, 0x00,
  734. },
  735. { /* Init_CR00_CR18 */
  736. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  737. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  738. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  739. 0xFF,
  740. },
  741. { /* Init_CR30_CR4D */
  742. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  743. 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  744. 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  745. 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  746. },
  747. { /* Init_CR90_CRA7 */
  748. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  749. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  750. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  751. },
  752. },
  753. { /* mode#8: 320 x 240 32Bpp 60Hz */
  754. 320, 240, 32, 60,
  755. /* Init_MISC */
  756. 0xEB,
  757. { /* Init_SR0_SR4 */
  758. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  759. },
  760. { /* Init_SR10_SR24 */
  761. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  762. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  763. 0xC4, 0x32, 0x02, 0x01, 0x01,
  764. },
  765. { /* Init_SR30_SR75 */
  766. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  767. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  768. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  769. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  770. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  771. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  772. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  773. 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  774. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  775. },
  776. { /* Init_SR80_SR93 */
  777. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  778. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  779. 0x00, 0x00, 0x00, 0x00,
  780. },
  781. { /* Init_SRA0_SRAF */
  782. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  783. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  784. },
  785. { /* Init_GR00_GR08 */
  786. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  787. 0xFF,
  788. },
  789. { /* Init_AR00_AR14 */
  790. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  791. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  792. 0x41, 0x00, 0x0F, 0x00, 0x00,
  793. },
  794. { /* Init_CR00_CR18 */
  795. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  796. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  797. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  798. 0xFF,
  799. },
  800. { /* Init_CR30_CR4D */
  801. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  802. 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  803. 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  804. 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  805. },
  806. { /* Init_CR90_CRA7 */
  807. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  808. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  809. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  810. },
  811. },
  812. };
  813. static struct screen_info smtc_scr_info;
  814. static char *mode_option;
  815. /* process command line options, get vga parameter */
  816. static void __init sm7xx_vga_setup(char *options)
  817. {
  818. int i;
  819. if (!options || !*options)
  820. return;
  821. smtc_scr_info.lfb_width = 0;
  822. smtc_scr_info.lfb_height = 0;
  823. smtc_scr_info.lfb_depth = 0;
  824. pr_debug("%s = %s\n", __func__, options);
  825. for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
  826. if (strstr(options, vesa_mode_table[i].index)) {
  827. smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
  828. smtc_scr_info.lfb_height =
  829. vesa_mode_table[i].lfb_height;
  830. smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
  831. return;
  832. }
  833. }
  834. }
  835. static void sm712_setpalette(int regno, unsigned int red, unsigned int green,
  836. unsigned int blue, struct fb_info *info)
  837. {
  838. /* set bit 5:4 = 01 (write LCD RAM only) */
  839. smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
  840. smtc_mmiowb(regno, dac_reg);
  841. smtc_mmiowb(red >> 10, dac_val);
  842. smtc_mmiowb(green >> 10, dac_val);
  843. smtc_mmiowb(blue >> 10, dac_val);
  844. }
  845. /* chan_to_field
  846. *
  847. * convert a colour value into a field position
  848. *
  849. * from pxafb.c
  850. */
  851. static inline unsigned int chan_to_field(unsigned int chan,
  852. struct fb_bitfield *bf)
  853. {
  854. chan &= 0xffff;
  855. chan >>= 16 - bf->length;
  856. return chan << bf->offset;
  857. }
  858. static int smtc_blank(int blank_mode, struct fb_info *info)
  859. {
  860. struct smtcfb_info *sfb = info->par;
  861. /* clear DPMS setting */
  862. switch (blank_mode) {
  863. case FB_BLANK_UNBLANK:
  864. /* Screen On: HSync: On, VSync : On */
  865. switch (sfb->chip_id) {
  866. case 0x710:
  867. case 0x712:
  868. smtc_seqw(0x6a, 0x16);
  869. smtc_seqw(0x6b, 0x02);
  870. break;
  871. case 0x720:
  872. smtc_seqw(0x6a, 0x0d);
  873. smtc_seqw(0x6b, 0x02);
  874. break;
  875. }
  876. smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  877. smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  878. smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
  879. smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  880. smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
  881. smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  882. break;
  883. case FB_BLANK_NORMAL:
  884. /* Screen Off: HSync: On, VSync : On Soft blank */
  885. smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  886. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  887. smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  888. smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  889. smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  890. smtc_seqw(0x6a, 0x16);
  891. smtc_seqw(0x6b, 0x02);
  892. break;
  893. case FB_BLANK_VSYNC_SUSPEND:
  894. /* Screen On: HSync: On, VSync : Off */
  895. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  896. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  897. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
  898. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  899. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  900. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  901. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
  902. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  903. smtc_seqw(0x6a, 0x0c);
  904. smtc_seqw(0x6b, 0x02);
  905. break;
  906. case FB_BLANK_HSYNC_SUSPEND:
  907. /* Screen On: HSync: Off, VSync : On */
  908. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  909. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  910. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  911. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  912. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  913. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  914. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
  915. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  916. smtc_seqw(0x6a, 0x0c);
  917. smtc_seqw(0x6b, 0x02);
  918. break;
  919. case FB_BLANK_POWERDOWN:
  920. /* Screen On: HSync: Off, VSync : Off */
  921. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  922. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  923. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  924. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  925. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  926. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  927. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
  928. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  929. smtc_seqw(0x6a, 0x0c);
  930. smtc_seqw(0x6b, 0x02);
  931. break;
  932. default:
  933. return -EINVAL;
  934. }
  935. return 0;
  936. }
  937. static int smtc_setcolreg(unsigned int regno, unsigned int red,
  938. unsigned int green, unsigned int blue,
  939. unsigned int trans, struct fb_info *info)
  940. {
  941. struct smtcfb_info *sfb;
  942. u32 val;
  943. sfb = info->par;
  944. if (regno > 255)
  945. return 1;
  946. switch (sfb->fb->fix.visual) {
  947. case FB_VISUAL_DIRECTCOLOR:
  948. case FB_VISUAL_TRUECOLOR:
  949. /*
  950. * 16/32 bit true-colour, use pseudo-palette for 16 base color
  951. */
  952. if (regno >= 16)
  953. break;
  954. if (sfb->fb->var.bits_per_pixel == 16) {
  955. u32 *pal = sfb->fb->pseudo_palette;
  956. val = chan_to_field(red, &sfb->fb->var.red);
  957. val |= chan_to_field(green, &sfb->fb->var.green);
  958. val |= chan_to_field(blue, &sfb->fb->var.blue);
  959. pal[regno] = pal_rgb(red, green, blue, val);
  960. } else {
  961. u32 *pal = sfb->fb->pseudo_palette;
  962. val = chan_to_field(red, &sfb->fb->var.red);
  963. val |= chan_to_field(green, &sfb->fb->var.green);
  964. val |= chan_to_field(blue, &sfb->fb->var.blue);
  965. pal[regno] = big_swap(val);
  966. }
  967. break;
  968. case FB_VISUAL_PSEUDOCOLOR:
  969. /* color depth 8 bit */
  970. sm712_setpalette(regno, red, green, blue, info);
  971. break;
  972. default:
  973. return 1; /* unknown type */
  974. }
  975. return 0;
  976. }
  977. static ssize_t smtcfb_read(struct fb_info *info, char __user *buf,
  978. size_t count, loff_t *ppos)
  979. {
  980. unsigned long p = *ppos;
  981. u32 *buffer, *dst;
  982. u32 __iomem *src;
  983. int c, i, cnt = 0, err = 0;
  984. unsigned long total_size;
  985. if (!info || !info->screen_base)
  986. return -ENODEV;
  987. if (info->state != FBINFO_STATE_RUNNING)
  988. return -EPERM;
  989. total_size = info->screen_size;
  990. if (total_size == 0)
  991. total_size = info->fix.smem_len;
  992. if (p >= total_size)
  993. return 0;
  994. if (count >= total_size)
  995. count = total_size;
  996. if (count + p > total_size)
  997. count = total_size - p;
  998. buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  999. if (!buffer)
  1000. return -ENOMEM;
  1001. src = (u32 __iomem *)(info->screen_base + p);
  1002. if (info->fbops->fb_sync)
  1003. info->fbops->fb_sync(info);
  1004. while (count) {
  1005. c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  1006. dst = buffer;
  1007. for (i = c >> 2; i--;) {
  1008. *dst = fb_readl(src++);
  1009. *dst = big_swap(*dst);
  1010. dst++;
  1011. }
  1012. if (c & 3) {
  1013. u8 *dst8 = (u8 *)dst;
  1014. u8 __iomem *src8 = (u8 __iomem *)src;
  1015. for (i = c & 3; i--;) {
  1016. if (i & 1) {
  1017. *dst8++ = fb_readb(++src8);
  1018. } else {
  1019. *dst8++ = fb_readb(--src8);
  1020. src8 += 2;
  1021. }
  1022. }
  1023. src = (u32 __iomem *)src8;
  1024. }
  1025. if (copy_to_user(buf, buffer, c)) {
  1026. err = -EFAULT;
  1027. break;
  1028. }
  1029. *ppos += c;
  1030. buf += c;
  1031. cnt += c;
  1032. count -= c;
  1033. }
  1034. kfree(buffer);
  1035. return (err) ? err : cnt;
  1036. }
  1037. static ssize_t smtcfb_write(struct fb_info *info, const char __user *buf,
  1038. size_t count, loff_t *ppos)
  1039. {
  1040. unsigned long p = *ppos;
  1041. u32 *buffer, *src;
  1042. u32 __iomem *dst;
  1043. int c, i, cnt = 0, err = 0;
  1044. unsigned long total_size;
  1045. if (!info || !info->screen_base)
  1046. return -ENODEV;
  1047. if (info->state != FBINFO_STATE_RUNNING)
  1048. return -EPERM;
  1049. total_size = info->screen_size;
  1050. if (total_size == 0)
  1051. total_size = info->fix.smem_len;
  1052. if (p > total_size)
  1053. return -EFBIG;
  1054. if (count > total_size) {
  1055. err = -EFBIG;
  1056. count = total_size;
  1057. }
  1058. if (count + p > total_size) {
  1059. if (!err)
  1060. err = -ENOSPC;
  1061. count = total_size - p;
  1062. }
  1063. buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  1064. if (!buffer)
  1065. return -ENOMEM;
  1066. dst = (u32 __iomem *)(info->screen_base + p);
  1067. if (info->fbops->fb_sync)
  1068. info->fbops->fb_sync(info);
  1069. while (count) {
  1070. c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  1071. src = buffer;
  1072. if (copy_from_user(src, buf, c)) {
  1073. err = -EFAULT;
  1074. break;
  1075. }
  1076. for (i = c >> 2; i--;) {
  1077. fb_writel(big_swap(*src), dst++);
  1078. src++;
  1079. }
  1080. if (c & 3) {
  1081. u8 *src8 = (u8 *)src;
  1082. u8 __iomem *dst8 = (u8 __iomem *)dst;
  1083. for (i = c & 3; i--;) {
  1084. if (i & 1) {
  1085. fb_writeb(*src8++, ++dst8);
  1086. } else {
  1087. fb_writeb(*src8++, --dst8);
  1088. dst8 += 2;
  1089. }
  1090. }
  1091. dst = (u32 __iomem *)dst8;
  1092. }
  1093. *ppos += c;
  1094. buf += c;
  1095. cnt += c;
  1096. count -= c;
  1097. }
  1098. kfree(buffer);
  1099. return (cnt) ? cnt : err;
  1100. }
  1101. static void sm7xx_set_timing(struct smtcfb_info *sfb)
  1102. {
  1103. int i = 0, j = 0;
  1104. u32 m_nscreenstride;
  1105. dev_dbg(&sfb->pdev->dev,
  1106. "sfb->width=%d sfb->height=%d sfb->fb->var.bits_per_pixel=%d sfb->hz=%d\n",
  1107. sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz);
  1108. for (j = 0; j < ARRAY_SIZE(vgamode); j++) {
  1109. if (vgamode[j].mmsizex != sfb->width ||
  1110. vgamode[j].mmsizey != sfb->height ||
  1111. vgamode[j].bpp != sfb->fb->var.bits_per_pixel ||
  1112. vgamode[j].hz != sfb->hz)
  1113. continue;
  1114. dev_dbg(&sfb->pdev->dev,
  1115. "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
  1116. vgamode[j].mmsizex, vgamode[j].mmsizey,
  1117. vgamode[j].bpp, vgamode[j].hz);
  1118. dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j);
  1119. smtc_mmiowb(0x0, 0x3c6);
  1120. smtc_seqw(0, 0x1);
  1121. smtc_mmiowb(vgamode[j].init_misc, 0x3c2);
  1122. /* init SEQ register SR00 - SR04 */
  1123. for (i = 0; i < SIZE_SR00_SR04; i++)
  1124. smtc_seqw(i, vgamode[j].init_sr00_sr04[i]);
  1125. /* init SEQ register SR10 - SR24 */
  1126. for (i = 0; i < SIZE_SR10_SR24; i++)
  1127. smtc_seqw(i + 0x10, vgamode[j].init_sr10_sr24[i]);
  1128. /* init SEQ register SR30 - SR75 */
  1129. for (i = 0; i < SIZE_SR30_SR75; i++)
  1130. if ((i + 0x30) != 0x30 && (i + 0x30) != 0x62 &&
  1131. (i + 0x30) != 0x6a && (i + 0x30) != 0x6b &&
  1132. (i + 0x30) != 0x70 && (i + 0x30) != 0x71 &&
  1133. (i + 0x30) != 0x74 && (i + 0x30) != 0x75)
  1134. smtc_seqw(i + 0x30,
  1135. vgamode[j].init_sr30_sr75[i]);
  1136. /* init SEQ register SR80 - SR93 */
  1137. for (i = 0; i < SIZE_SR80_SR93; i++)
  1138. smtc_seqw(i + 0x80, vgamode[j].init_sr80_sr93[i]);
  1139. /* init SEQ register SRA0 - SRAF */
  1140. for (i = 0; i < SIZE_SRA0_SRAF; i++)
  1141. smtc_seqw(i + 0xa0, vgamode[j].init_sra0_sraf[i]);
  1142. /* init Graphic register GR00 - GR08 */
  1143. for (i = 0; i < SIZE_GR00_GR08; i++)
  1144. smtc_grphw(i, vgamode[j].init_gr00_gr08[i]);
  1145. /* init Attribute register AR00 - AR14 */
  1146. for (i = 0; i < SIZE_AR00_AR14; i++)
  1147. smtc_attrw(i, vgamode[j].init_ar00_ar14[i]);
  1148. /* init CRTC register CR00 - CR18 */
  1149. for (i = 0; i < SIZE_CR00_CR18; i++)
  1150. smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]);
  1151. /* init CRTC register CR30 - CR4D */
  1152. for (i = 0; i < SIZE_CR30_CR4D; i++) {
  1153. if ((i + 0x30) >= 0x3B && (i + 0x30) <= 0x3F)
  1154. /* side-effect, don't write to CR3B-CR3F */
  1155. continue;
  1156. smtc_crtcw(i + 0x30, vgamode[j].init_cr30_cr4d[i]);
  1157. }
  1158. /* init CRTC register CR90 - CRA7 */
  1159. for (i = 0; i < SIZE_CR90_CRA7; i++)
  1160. smtc_crtcw(i + 0x90, vgamode[j].init_cr90_cra7[i]);
  1161. }
  1162. smtc_mmiowb(0x67, 0x3c2);
  1163. /* set VPR registers */
  1164. writel(0x0, sfb->vp_regs + 0x0C);
  1165. writel(0x0, sfb->vp_regs + 0x40);
  1166. /* set data width */
  1167. m_nscreenstride = (sfb->width * sfb->fb->var.bits_per_pixel) / 64;
  1168. switch (sfb->fb->var.bits_per_pixel) {
  1169. case 8:
  1170. writel(0x0, sfb->vp_regs + 0x0);
  1171. break;
  1172. case 16:
  1173. writel(0x00020000, sfb->vp_regs + 0x0);
  1174. break;
  1175. case 24:
  1176. writel(0x00040000, sfb->vp_regs + 0x0);
  1177. break;
  1178. case 32:
  1179. writel(0x00030000, sfb->vp_regs + 0x0);
  1180. break;
  1181. }
  1182. writel((u32)(((m_nscreenstride + 2) << 16) | m_nscreenstride),
  1183. sfb->vp_regs + 0x10);
  1184. }
  1185. static void smtc_set_timing(struct smtcfb_info *sfb)
  1186. {
  1187. switch (sfb->chip_id) {
  1188. case 0x710:
  1189. case 0x712:
  1190. case 0x720:
  1191. sm7xx_set_timing(sfb);
  1192. break;
  1193. }
  1194. }
  1195. static void smtcfb_setmode(struct smtcfb_info *sfb)
  1196. {
  1197. switch (sfb->fb->var.bits_per_pixel) {
  1198. case 32:
  1199. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1200. sfb->fb->fix.line_length = sfb->fb->var.xres * 4;
  1201. sfb->fb->var.red.length = 8;
  1202. sfb->fb->var.green.length = 8;
  1203. sfb->fb->var.blue.length = 8;
  1204. sfb->fb->var.red.offset = 16;
  1205. sfb->fb->var.green.offset = 8;
  1206. sfb->fb->var.blue.offset = 0;
  1207. break;
  1208. case 24:
  1209. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1210. sfb->fb->fix.line_length = sfb->fb->var.xres * 3;
  1211. sfb->fb->var.red.length = 8;
  1212. sfb->fb->var.green.length = 8;
  1213. sfb->fb->var.blue.length = 8;
  1214. sfb->fb->var.red.offset = 16;
  1215. sfb->fb->var.green.offset = 8;
  1216. sfb->fb->var.blue.offset = 0;
  1217. break;
  1218. case 8:
  1219. sfb->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  1220. sfb->fb->fix.line_length = sfb->fb->var.xres;
  1221. sfb->fb->var.red.length = 3;
  1222. sfb->fb->var.green.length = 3;
  1223. sfb->fb->var.blue.length = 2;
  1224. sfb->fb->var.red.offset = 5;
  1225. sfb->fb->var.green.offset = 2;
  1226. sfb->fb->var.blue.offset = 0;
  1227. break;
  1228. case 16:
  1229. default:
  1230. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1231. sfb->fb->fix.line_length = sfb->fb->var.xres * 2;
  1232. sfb->fb->var.red.length = 5;
  1233. sfb->fb->var.green.length = 6;
  1234. sfb->fb->var.blue.length = 5;
  1235. sfb->fb->var.red.offset = 11;
  1236. sfb->fb->var.green.offset = 5;
  1237. sfb->fb->var.blue.offset = 0;
  1238. break;
  1239. }
  1240. sfb->width = sfb->fb->var.xres;
  1241. sfb->height = sfb->fb->var.yres;
  1242. sfb->hz = 60;
  1243. smtc_set_timing(sfb);
  1244. }
  1245. static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  1246. {
  1247. /* sanity checks */
  1248. if (var->xres_virtual < var->xres)
  1249. var->xres_virtual = var->xres;
  1250. if (var->yres_virtual < var->yres)
  1251. var->yres_virtual = var->yres;
  1252. /* set valid default bpp */
  1253. if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
  1254. (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
  1255. var->bits_per_pixel = 16;
  1256. return 0;
  1257. }
  1258. static int smtc_set_par(struct fb_info *info)
  1259. {
  1260. smtcfb_setmode(info->par);
  1261. return 0;
  1262. }
  1263. static struct fb_ops smtcfb_ops = {
  1264. .owner = THIS_MODULE,
  1265. .fb_check_var = smtc_check_var,
  1266. .fb_set_par = smtc_set_par,
  1267. .fb_setcolreg = smtc_setcolreg,
  1268. .fb_blank = smtc_blank,
  1269. .fb_fillrect = cfb_fillrect,
  1270. .fb_imageblit = cfb_imageblit,
  1271. .fb_copyarea = cfb_copyarea,
  1272. .fb_read = smtcfb_read,
  1273. .fb_write = smtcfb_write,
  1274. };
  1275. /*
  1276. * Unmap in the memory mapped IO registers
  1277. */
  1278. static void smtc_unmap_mmio(struct smtcfb_info *sfb)
  1279. {
  1280. if (sfb && smtc_regbaseaddress)
  1281. smtc_regbaseaddress = NULL;
  1282. }
  1283. /*
  1284. * Map in the screen memory
  1285. */
  1286. static int smtc_map_smem(struct smtcfb_info *sfb,
  1287. struct pci_dev *pdev, u_long smem_len)
  1288. {
  1289. sfb->fb->fix.smem_start = pci_resource_start(pdev, 0);
  1290. if (sfb->chip_id == 0x720)
  1291. /* on SM720, the framebuffer starts at the 1 MB offset */
  1292. sfb->fb->fix.smem_start += 0x00200000;
  1293. /* XXX: is it safe for SM720 on Big-Endian? */
  1294. if (sfb->fb->var.bits_per_pixel == 32)
  1295. sfb->fb->fix.smem_start += big_addr;
  1296. sfb->fb->fix.smem_len = smem_len;
  1297. sfb->fb->screen_base = sfb->lfb;
  1298. if (!sfb->fb->screen_base) {
  1299. dev_err(&pdev->dev,
  1300. "%s: unable to map screen memory\n", sfb->fb->fix.id);
  1301. return -ENOMEM;
  1302. }
  1303. return 0;
  1304. }
  1305. /*
  1306. * Unmap in the screen memory
  1307. *
  1308. */
  1309. static void smtc_unmap_smem(struct smtcfb_info *sfb)
  1310. {
  1311. if (sfb && sfb->fb->screen_base) {
  1312. if (sfb->chip_id == 0x720)
  1313. sfb->fb->screen_base -= 0x00200000;
  1314. iounmap(sfb->fb->screen_base);
  1315. sfb->fb->screen_base = NULL;
  1316. }
  1317. }
  1318. /*
  1319. * We need to wake up the device and make sure its in linear memory mode.
  1320. */
  1321. static inline void sm7xx_init_hw(void)
  1322. {
  1323. outb_p(0x18, 0x3c4);
  1324. outb_p(0x11, 0x3c5);
  1325. }
  1326. static u_long sm7xx_vram_probe(struct smtcfb_info *sfb)
  1327. {
  1328. u8 vram;
  1329. switch (sfb->chip_id) {
  1330. case 0x710:
  1331. case 0x712:
  1332. /*
  1333. * Assume SM712 graphics chip has 4MB VRAM.
  1334. *
  1335. * FIXME: SM712 can have 2MB VRAM, which is used on earlier
  1336. * laptops, such as IBM Thinkpad 240X. This driver would
  1337. * probably crash on those machines. If anyone gets one of
  1338. * those and is willing to help, run "git blame" and send me
  1339. * an E-mail.
  1340. */
  1341. return 0x00400000;
  1342. case 0x720:
  1343. outb_p(0x76, 0x3c4);
  1344. vram = inb_p(0x3c5) >> 6;
  1345. if (vram == 0x00)
  1346. return 0x00800000; /* 8 MB */
  1347. else if (vram == 0x01)
  1348. return 0x01000000; /* 16 MB */
  1349. else if (vram == 0x02)
  1350. return 0x00400000; /* illegal, fallback to 4 MB */
  1351. else if (vram == 0x03)
  1352. return 0x00400000; /* 4 MB */
  1353. }
  1354. return 0; /* unknown hardware */
  1355. }
  1356. static void sm7xx_resolution_probe(struct smtcfb_info *sfb)
  1357. {
  1358. /* get mode parameter from smtc_scr_info */
  1359. if (smtc_scr_info.lfb_width != 0) {
  1360. sfb->fb->var.xres = smtc_scr_info.lfb_width;
  1361. sfb->fb->var.yres = smtc_scr_info.lfb_height;
  1362. sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth;
  1363. goto final;
  1364. }
  1365. /*
  1366. * No parameter, default resolution is 1024x768-16.
  1367. *
  1368. * FIXME: earlier laptops, such as IBM Thinkpad 240X, has a 800x600
  1369. * panel, also see the comments about Thinkpad 240X above.
  1370. */
  1371. sfb->fb->var.xres = SCREEN_X_RES;
  1372. sfb->fb->var.yres = SCREEN_Y_RES_PC;
  1373. sfb->fb->var.bits_per_pixel = SCREEN_BPP;
  1374. #ifdef CONFIG_MIPS
  1375. /*
  1376. * Loongson MIPS netbooks use 1024x600 LCD panels, which is the original
  1377. * target platform of this driver, but nearly all old x86 laptops have
  1378. * 1024x768. Lighting 768 panels using 600's timings would partially
  1379. * garble the display, so we don't want that. But it's not possible to
  1380. * distinguish them reliably.
  1381. *
  1382. * So we change the default to 768, but keep 600 as-is on MIPS.
  1383. */
  1384. sfb->fb->var.yres = SCREEN_Y_RES_NETBOOK;
  1385. #endif
  1386. final:
  1387. big_pixel_depth(sfb->fb->var.bits_per_pixel, smtc_scr_info.lfb_depth);
  1388. }
  1389. static int smtcfb_pci_probe(struct pci_dev *pdev,
  1390. const struct pci_device_id *ent)
  1391. {
  1392. struct smtcfb_info *sfb;
  1393. struct fb_info *info;
  1394. u_long smem_size;
  1395. int err;
  1396. unsigned long mmio_base;
  1397. dev_info(&pdev->dev, "Silicon Motion display driver.\n");
  1398. err = pci_enable_device(pdev); /* enable SMTC chip */
  1399. if (err)
  1400. return err;
  1401. err = pci_request_region(pdev, 0, "sm7xxfb");
  1402. if (err < 0) {
  1403. dev_err(&pdev->dev, "cannot reserve framebuffer region\n");
  1404. goto failed_regions;
  1405. }
  1406. sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
  1407. info = framebuffer_alloc(sizeof(*sfb), &pdev->dev);
  1408. if (!info) {
  1409. dev_err(&pdev->dev, "framebuffer_alloc failed\n");
  1410. err = -ENOMEM;
  1411. goto failed_free;
  1412. }
  1413. sfb = info->par;
  1414. sfb->fb = info;
  1415. sfb->chip_id = ent->device;
  1416. sfb->pdev = pdev;
  1417. info->flags = FBINFO_FLAG_DEFAULT;
  1418. info->fbops = &smtcfb_ops;
  1419. info->fix = smtcfb_fix;
  1420. info->var = smtcfb_var;
  1421. info->pseudo_palette = sfb->colreg;
  1422. info->par = sfb;
  1423. pci_set_drvdata(pdev, sfb);
  1424. sm7xx_init_hw();
  1425. /* Map address and memory detection */
  1426. mmio_base = pci_resource_start(pdev, 0);
  1427. pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
  1428. smem_size = sm7xx_vram_probe(sfb);
  1429. dev_info(&pdev->dev, "%lu MiB of VRAM detected.\n",
  1430. smem_size / 1048576);
  1431. switch (sfb->chip_id) {
  1432. case 0x710:
  1433. case 0x712:
  1434. sfb->fb->fix.mmio_start = mmio_base + 0x00400000;
  1435. sfb->fb->fix.mmio_len = 0x00400000;
  1436. sfb->lfb = ioremap(mmio_base, mmio_addr);
  1437. if (!sfb->lfb) {
  1438. dev_err(&pdev->dev,
  1439. "%s: unable to map memory mapped IO!\n",
  1440. sfb->fb->fix.id);
  1441. err = -ENOMEM;
  1442. goto failed_fb;
  1443. }
  1444. sfb->mmio = (smtc_regbaseaddress =
  1445. sfb->lfb + 0x00700000);
  1446. sfb->dp_regs = sfb->lfb + 0x00408000;
  1447. sfb->vp_regs = sfb->lfb + 0x0040c000;
  1448. if (sfb->fb->var.bits_per_pixel == 32) {
  1449. sfb->lfb += big_addr;
  1450. dev_info(&pdev->dev, "sfb->lfb=%p\n", sfb->lfb);
  1451. }
  1452. /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1453. smtc_seqw(0x6a, 0x16);
  1454. smtc_seqw(0x6b, 0x02);
  1455. smtc_seqw(0x62, 0x3e);
  1456. /* enable PCI burst */
  1457. smtc_seqw(0x17, 0x20);
  1458. /* enable word swap */
  1459. if (sfb->fb->var.bits_per_pixel == 32)
  1460. seqw17();
  1461. break;
  1462. case 0x720:
  1463. sfb->fb->fix.mmio_start = mmio_base;
  1464. sfb->fb->fix.mmio_len = 0x00200000;
  1465. sfb->dp_regs = ioremap(mmio_base, 0x00200000 + smem_size);
  1466. sfb->lfb = sfb->dp_regs + 0x00200000;
  1467. sfb->mmio = (smtc_regbaseaddress =
  1468. sfb->dp_regs + 0x000c0000);
  1469. sfb->vp_regs = sfb->dp_regs + 0x800;
  1470. smtc_seqw(0x62, 0xff);
  1471. smtc_seqw(0x6a, 0x0d);
  1472. smtc_seqw(0x6b, 0x02);
  1473. break;
  1474. default:
  1475. dev_err(&pdev->dev,
  1476. "No valid Silicon Motion display chip was detected!\n");
  1477. goto failed_fb;
  1478. }
  1479. /* probe and decide resolution */
  1480. sm7xx_resolution_probe(sfb);
  1481. /* can support 32 bpp */
  1482. if (sfb->fb->var.bits_per_pixel == 15)
  1483. sfb->fb->var.bits_per_pixel = 16;
  1484. sfb->fb->var.xres_virtual = sfb->fb->var.xres;
  1485. sfb->fb->var.yres_virtual = sfb->fb->var.yres;
  1486. err = smtc_map_smem(sfb, pdev, smem_size);
  1487. if (err)
  1488. goto failed;
  1489. /*
  1490. * The screen would be temporarily garbled when sm712fb takes over
  1491. * vesafb or VGA text mode. Zero the framebuffer.
  1492. */
  1493. memset_io(sfb->lfb, 0, sfb->fb->fix.smem_len);
  1494. err = register_framebuffer(info);
  1495. if (err < 0)
  1496. goto failed;
  1497. dev_info(&pdev->dev,
  1498. "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.\n",
  1499. sfb->chip_id, sfb->chip_rev_id, sfb->fb->var.xres,
  1500. sfb->fb->var.yres, sfb->fb->var.bits_per_pixel);
  1501. return 0;
  1502. failed:
  1503. dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.\n");
  1504. smtc_unmap_smem(sfb);
  1505. smtc_unmap_mmio(sfb);
  1506. failed_fb:
  1507. framebuffer_release(info);
  1508. failed_free:
  1509. pci_release_region(pdev, 0);
  1510. failed_regions:
  1511. pci_disable_device(pdev);
  1512. return err;
  1513. }
  1514. /*
  1515. * 0x710 (LynxEM)
  1516. * 0x712 (LynxEM+)
  1517. * 0x720 (Lynx3DM, Lynx3DM+)
  1518. */
  1519. static const struct pci_device_id smtcfb_pci_table[] = {
  1520. { PCI_DEVICE(0x126f, 0x710), },
  1521. { PCI_DEVICE(0x126f, 0x712), },
  1522. { PCI_DEVICE(0x126f, 0x720), },
  1523. {0,}
  1524. };
  1525. MODULE_DEVICE_TABLE(pci, smtcfb_pci_table);
  1526. static void smtcfb_pci_remove(struct pci_dev *pdev)
  1527. {
  1528. struct smtcfb_info *sfb;
  1529. sfb = pci_get_drvdata(pdev);
  1530. smtc_unmap_smem(sfb);
  1531. smtc_unmap_mmio(sfb);
  1532. unregister_framebuffer(sfb->fb);
  1533. framebuffer_release(sfb->fb);
  1534. pci_release_region(pdev, 0);
  1535. pci_disable_device(pdev);
  1536. }
  1537. static int __maybe_unused smtcfb_pci_suspend(struct device *device)
  1538. {
  1539. struct pci_dev *pdev = to_pci_dev(device);
  1540. struct smtcfb_info *sfb;
  1541. sfb = pci_get_drvdata(pdev);
  1542. /* set the hw in sleep mode use external clock and self memory refresh
  1543. * so that we can turn off internal PLLs later on
  1544. */
  1545. smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
  1546. smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
  1547. console_lock();
  1548. fb_set_suspend(sfb->fb, 1);
  1549. console_unlock();
  1550. /* additionally turn off all function blocks including internal PLLs */
  1551. smtc_seqw(0x21, 0xff);
  1552. return 0;
  1553. }
  1554. static int __maybe_unused smtcfb_pci_resume(struct device *device)
  1555. {
  1556. struct pci_dev *pdev = to_pci_dev(device);
  1557. struct smtcfb_info *sfb;
  1558. sfb = pci_get_drvdata(pdev);
  1559. /* reinit hardware */
  1560. sm7xx_init_hw();
  1561. switch (sfb->chip_id) {
  1562. case 0x710:
  1563. case 0x712:
  1564. /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1565. smtc_seqw(0x6a, 0x16);
  1566. smtc_seqw(0x6b, 0x02);
  1567. smtc_seqw(0x62, 0x3e);
  1568. /* enable PCI burst */
  1569. smtc_seqw(0x17, 0x20);
  1570. if (sfb->fb->var.bits_per_pixel == 32)
  1571. seqw17();
  1572. break;
  1573. case 0x720:
  1574. smtc_seqw(0x62, 0xff);
  1575. smtc_seqw(0x6a, 0x0d);
  1576. smtc_seqw(0x6b, 0x02);
  1577. break;
  1578. }
  1579. smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
  1580. smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
  1581. smtcfb_setmode(sfb);
  1582. console_lock();
  1583. fb_set_suspend(sfb->fb, 0);
  1584. console_unlock();
  1585. return 0;
  1586. }
  1587. static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
  1588. static struct pci_driver smtcfb_driver = {
  1589. .name = "smtcfb",
  1590. .id_table = smtcfb_pci_table,
  1591. .probe = smtcfb_pci_probe,
  1592. .remove = smtcfb_pci_remove,
  1593. .driver.pm = &sm7xx_pm_ops,
  1594. };
  1595. static int __init sm712fb_init(void)
  1596. {
  1597. char *option = NULL;
  1598. if (fb_get_options("sm712fb", &option))
  1599. return -ENODEV;
  1600. if (option && *option)
  1601. mode_option = option;
  1602. sm7xx_vga_setup(mode_option);
  1603. return pci_register_driver(&smtcfb_driver);
  1604. }
  1605. module_init(sm712fb_init);
  1606. static void __exit sm712fb_exit(void)
  1607. {
  1608. pci_unregister_driver(&smtcfb_driver);
  1609. }
  1610. module_exit(sm712fb_exit);
  1611. MODULE_AUTHOR("Siliconmotion ");
  1612. MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
  1613. MODULE_LICENSE("GPL");