mux.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Pinmux configuration for CompuLab CL-SOM-AM57x board
  4. *
  5. * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
  6. *
  7. * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
  8. */
  9. #include <asm/arch/sys_proto.h>
  10. #include <asm/arch/mux_dra7xx.h>
  11. /* Serial console */
  12. static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
  13. {UART3_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_RXD */
  14. {UART3_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* UART3_TXD */
  15. };
  16. /* PMIC I2C */
  17. static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
  18. {MCASP1_ACLKR, (M10 | PIN_INPUT)}, /* MCASP1_ACLKR.I2C4_SDA */
  19. {MCASP1_FSR, (M10 | PIN_INPUT)}, /* MCASP1_FSR.I2C4_SCL */
  20. };
  21. /* Green GPIO led */
  22. static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
  23. {GPMC_A15, (M14 | PIN_OUTPUT_PULLDOWN)}, /* GPMC_A15.GPIO2_5 */
  24. };
  25. /* MMC/SD Card */
  26. static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
  27. {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CLK */
  28. {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_CMD */
  29. {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT0 */
  30. {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT1 */
  31. {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT2 */
  32. {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* MMC1_DAT3 */
  33. {MMC1_SDCD, (M14 | PIN_INPUT) }, /* MMC1_SDCD */
  34. {MMC1_SDWP, (M14 | PIN_INPUT) }, /* MMC1_SDWP */
  35. };
  36. /* WiFi - must be in the safe mode on boot */
  37. static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
  38. {UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_CTSN */
  39. {UART1_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_RTSN */
  40. {UART2_RXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RXD */
  41. {UART2_TXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_TXD */
  42. {UART2_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_CTSN */
  43. {UART2_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RTSN */
  44. };
  45. /* QSPI */
  46. static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
  47. {GPMC_A13, (M1 | PIN_INPUT) }, /* GPMC_A13.QSPI1_RTCLK */
  48. {GPMC_A18, (M1 | PIN_INPUT) }, /* GPMC_A18.QSPI1_SCLK */
  49. {GPMC_A16, (M1 | PIN_INPUT) }, /* GPMC_A16.QSPI1_D0 */
  50. {GPMC_A17, (M1 | PIN_INPUT) }, /* GPMC_A17.QSPI1_D1 */
  51. {GPMC_CS2, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS2.QSPI1_CS0 */
  52. };
  53. /* GPIO Expander I2C */
  54. static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
  55. {MCASP1_AXR0, (M10 | PIN_INPUT)}, /* MCASP1_AXR0.I2C5_SDA */
  56. {MCASP1_AXR1, (M10 | PIN_INPUT)}, /* MCASP1_AXR1.I2C5_SCL */
  57. };
  58. /* eMMC internal storage */
  59. static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
  60. {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A19.MMC2_DAT4 */
  61. {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A20.MMC2_DAT5 */
  62. {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A21.MMC2_DAT6 */
  63. {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A22.MMC2_DAT7 */
  64. {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A23.MMC2_CLK */
  65. {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A24.MMC2_DAT0 */
  66. {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A25.MMC2_DAT1 */
  67. {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A26.MMC2_DAT2 */
  68. {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_A27.MMC2_DAT3 */
  69. {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* GPMC_CS1.MMC2_CMD */
  70. };
  71. /* usb1_drvvbus */
  72. static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
  73. /* USB1_DRVVBUS.USB1_DRVVBUS */
  74. {USB1_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL) },
  75. };
  76. /* Ethernet */
  77. static const struct pad_conf_entry cl_som_am57x_padconf_ethernet[] = {
  78. /* MDIO bus */
  79. {VIN2A_D10, (M3 | PIN_OUTPUT_PULLUP) }, /* VIN2A_D10.MDIO_MCLK */
  80. {VIN2A_D11, (M3 | PIN_INPUT_PULLUP) }, /* VIN2A_D11.MDIO_D */
  81. /* EMAC Slave 1 at addr 0x1 - Default interface */
  82. {VIN2A_D12, (M3 | PIN_OUTPUT) }, /* VIN2A_D12.RGMII1_TXC */
  83. {VIN2A_D13, (M3 | PIN_OUTPUT) }, /* VIN2A_D13.RGMII1_TXCTL */
  84. {VIN2A_D14, (M3 | PIN_OUTPUT) }, /* VIN2A_D14.RGMII1_TXD3 */
  85. {VIN2A_D15, (M3 | PIN_OUTPUT) }, /* VIN2A_D15.RGMII1_TXD2 */
  86. {VIN2A_D16, (M3 | PIN_OUTPUT) }, /* VIN2A_D16.RGMII1_TXD1 */
  87. {VIN2A_D17, (M3 | PIN_OUTPUT) }, /* VIN2A_D17.RGMII1_TXD0 */
  88. {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D18.RGMII1_RXC */
  89. {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D19.RGMII1_RXCTL */
  90. {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D20.RGMII1_RXD3 */
  91. {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D21.RGMII1_RXD2 */
  92. {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D22.RGMII1_RXD1 */
  93. {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN) }, /* VIN2A_D23.RGMII1_RXD0 */
  94. /* Eth PHY1 reset GPIOs*/
  95. {VIN2A_CLK0, (M14 | PIN_OUTPUT_PULLDOWN)}, /* VIN2A_CLK0.GPIO3_28 */
  96. };
  97. #define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
  98. mux_array, ARRAY_SIZE(mux_array))
  99. void set_muxconf_regs(void)
  100. {
  101. SET_MUX(cl_som_am57x_padconf_console);
  102. SET_MUX(cl_som_am57x_padconf_pmic);
  103. SET_MUX(cl_som_am57x_padconf_green_led);
  104. SET_MUX(cl_som_am57x_padconf_sd_card);
  105. SET_MUX(cl_som_am57x_padconf_wifi);
  106. SET_MUX(cl_som_am57x_padconf_qspi);
  107. SET_MUX(cl_som_am57x_padconf_i2c_gpio);
  108. SET_MUX(cl_som_am57x_padconf_emmc);
  109. SET_MUX(cl_som_am57x_padconf_usb);
  110. SET_MUX(cl_som_am57x_padconf_ethernet);
  111. }