mux.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * mux.c
  4. *
  5. * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
  6. *
  7. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  8. */
  9. #include <common.h>
  10. #include <asm/arch/sys_proto.h>
  11. #include <asm/arch/hardware.h>
  12. #include <asm/arch/mux.h>
  13. #include <asm/io.h>
  14. #include <i2c.h>
  15. #include "board.h"
  16. static struct module_pin_mux uart0_pin_mux[] = {
  17. {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
  18. {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
  19. {-1},
  20. };
  21. static struct module_pin_mux uart1_pin_mux[] = {
  22. {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
  23. {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
  24. {-1},
  25. };
  26. static struct module_pin_mux uart2_pin_mux[] = {
  27. {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
  28. {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
  29. {-1},
  30. };
  31. static struct module_pin_mux uart3_pin_mux[] = {
  32. {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
  33. {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
  34. {-1},
  35. };
  36. static struct module_pin_mux uart4_pin_mux[] = {
  37. {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
  38. {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
  39. {-1},
  40. };
  41. static struct module_pin_mux uart5_pin_mux[] = {
  42. {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
  43. {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
  44. {-1},
  45. };
  46. static struct module_pin_mux i2c0_pin_mux[] = {
  47. {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
  48. PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
  49. {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
  50. PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
  51. {-1},
  52. };
  53. void enable_uart0_pin_mux(void)
  54. {
  55. configure_module_pin_mux(uart0_pin_mux);
  56. }
  57. void enable_uart1_pin_mux(void)
  58. {
  59. configure_module_pin_mux(uart1_pin_mux);
  60. }
  61. void enable_uart2_pin_mux(void)
  62. {
  63. configure_module_pin_mux(uart2_pin_mux);
  64. }
  65. void enable_uart3_pin_mux(void)
  66. {
  67. configure_module_pin_mux(uart3_pin_mux);
  68. }
  69. void enable_uart4_pin_mux(void)
  70. {
  71. configure_module_pin_mux(uart4_pin_mux);
  72. }
  73. void enable_uart5_pin_mux(void)
  74. {
  75. configure_module_pin_mux(uart5_pin_mux);
  76. }
  77. void enable_uart_pin_mux(u32 addr)
  78. {
  79. switch (addr) {
  80. case CONFIG_SYS_NS16550_COM1:
  81. enable_uart0_pin_mux();
  82. break;
  83. case CONFIG_SYS_NS16550_COM2:
  84. enable_uart1_pin_mux();
  85. break;
  86. case CONFIG_SYS_NS16550_COM3:
  87. enable_uart2_pin_mux();
  88. break;
  89. case CONFIG_SYS_NS16550_COM4:
  90. enable_uart3_pin_mux();
  91. break;
  92. case CONFIG_SYS_NS16550_COM5:
  93. enable_uart4_pin_mux();
  94. break;
  95. case CONFIG_SYS_NS16550_COM6:
  96. enable_uart5_pin_mux();
  97. break;
  98. }
  99. }
  100. void enable_i2c0_pin_mux(void)
  101. {
  102. configure_module_pin_mux(i2c0_pin_mux);
  103. }