asix88179.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
  4. * based on the U-Boot Asix driver as well as information
  5. * from the Linux AX88179_178a driver
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <usb.h>
  10. #include <net.h>
  11. #include <linux/mii.h>
  12. #include "usb_ether.h"
  13. #include <malloc.h>
  14. #include <memalign.h>
  15. #include <errno.h>
  16. /* ASIX AX88179 based USB 3.0 Ethernet Devices */
  17. #define AX88179_PHY_ID 0x03
  18. #define AX_EEPROM_LEN 0x100
  19. #define AX88179_EEPROM_MAGIC 0x17900b95
  20. #define AX_MCAST_FLTSIZE 8
  21. #define AX_MAX_MCAST 64
  22. #define AX_INT_PPLS_LINK (1 << 16)
  23. #define AX_RXHDR_L4_TYPE_MASK 0x1c
  24. #define AX_RXHDR_L4_TYPE_UDP 4
  25. #define AX_RXHDR_L4_TYPE_TCP 16
  26. #define AX_RXHDR_L3CSUM_ERR 2
  27. #define AX_RXHDR_L4CSUM_ERR 1
  28. #define AX_RXHDR_CRC_ERR (1 << 29)
  29. #define AX_RXHDR_DROP_ERR (1 << 31)
  30. #define AX_ENDPOINT_INT 0x01
  31. #define AX_ENDPOINT_IN 0x02
  32. #define AX_ENDPOINT_OUT 0x03
  33. #define AX_ACCESS_MAC 0x01
  34. #define AX_ACCESS_PHY 0x02
  35. #define AX_ACCESS_EEPROM 0x04
  36. #define AX_ACCESS_EFUS 0x05
  37. #define AX_PAUSE_WATERLVL_HIGH 0x54
  38. #define AX_PAUSE_WATERLVL_LOW 0x55
  39. #define PHYSICAL_LINK_STATUS 0x02
  40. #define AX_USB_SS (1 << 2)
  41. #define AX_USB_HS (1 << 1)
  42. #define GENERAL_STATUS 0x03
  43. #define AX_SECLD (1 << 2)
  44. #define AX_SROM_ADDR 0x07
  45. #define AX_SROM_CMD 0x0a
  46. #define EEP_RD (1 << 2)
  47. #define EEP_BUSY (1 << 4)
  48. #define AX_SROM_DATA_LOW 0x08
  49. #define AX_SROM_DATA_HIGH 0x09
  50. #define AX_RX_CTL 0x0b
  51. #define AX_RX_CTL_DROPCRCERR (1 << 8)
  52. #define AX_RX_CTL_IPE (1 << 9)
  53. #define AX_RX_CTL_START (1 << 7)
  54. #define AX_RX_CTL_AP (1 << 5)
  55. #define AX_RX_CTL_AM (1 << 4)
  56. #define AX_RX_CTL_AB (1 << 3)
  57. #define AX_RX_CTL_AMALL (1 << 1)
  58. #define AX_RX_CTL_PRO (1 << 0)
  59. #define AX_RX_CTL_STOP 0
  60. #define AX_NODE_ID 0x10
  61. #define AX_MULFLTARY 0x16
  62. #define AX_MEDIUM_STATUS_MODE 0x22
  63. #define AX_MEDIUM_GIGAMODE (1 << 0)
  64. #define AX_MEDIUM_FULL_DUPLEX (1 << 1)
  65. #define AX_MEDIUM_EN_125MHZ (1 << 3)
  66. #define AX_MEDIUM_RXFLOW_CTRLEN (1 << 4)
  67. #define AX_MEDIUM_TXFLOW_CTRLEN (1 << 5)
  68. #define AX_MEDIUM_RECEIVE_EN (1 << 8)
  69. #define AX_MEDIUM_PS (1 << 9)
  70. #define AX_MEDIUM_JUMBO_EN 0x8040
  71. #define AX_MONITOR_MOD 0x24
  72. #define AX_MONITOR_MODE_RWLC (1 << 1)
  73. #define AX_MONITOR_MODE_RWMP (1 << 2)
  74. #define AX_MONITOR_MODE_PMEPOL (1 << 5)
  75. #define AX_MONITOR_MODE_PMETYPE (1 << 6)
  76. #define AX_GPIO_CTRL 0x25
  77. #define AX_GPIO_CTRL_GPIO3EN (1 << 7)
  78. #define AX_GPIO_CTRL_GPIO2EN (1 << 6)
  79. #define AX_GPIO_CTRL_GPIO1EN (1 << 5)
  80. #define AX_PHYPWR_RSTCTL 0x26
  81. #define AX_PHYPWR_RSTCTL_BZ (1 << 4)
  82. #define AX_PHYPWR_RSTCTL_IPRL (1 << 5)
  83. #define AX_PHYPWR_RSTCTL_AT (1 << 12)
  84. #define AX_RX_BULKIN_QCTRL 0x2e
  85. #define AX_CLK_SELECT 0x33
  86. #define AX_CLK_SELECT_BCS (1 << 0)
  87. #define AX_CLK_SELECT_ACS (1 << 1)
  88. #define AX_CLK_SELECT_ULR (1 << 3)
  89. #define AX_RXCOE_CTL 0x34
  90. #define AX_RXCOE_IP (1 << 0)
  91. #define AX_RXCOE_TCP (1 << 1)
  92. #define AX_RXCOE_UDP (1 << 2)
  93. #define AX_RXCOE_TCPV6 (1 << 5)
  94. #define AX_RXCOE_UDPV6 (1 << 6)
  95. #define AX_TXCOE_CTL 0x35
  96. #define AX_TXCOE_IP (1 << 0)
  97. #define AX_TXCOE_TCP (1 << 1)
  98. #define AX_TXCOE_UDP (1 << 2)
  99. #define AX_TXCOE_TCPV6 (1 << 5)
  100. #define AX_TXCOE_UDPV6 (1 << 6)
  101. #define AX_LEDCTRL 0x73
  102. #define GMII_PHY_PHYSR 0x11
  103. #define GMII_PHY_PHYSR_SMASK 0xc000
  104. #define GMII_PHY_PHYSR_GIGA (1 << 15)
  105. #define GMII_PHY_PHYSR_100 (1 << 14)
  106. #define GMII_PHY_PHYSR_FULL (1 << 13)
  107. #define GMII_PHY_PHYSR_LINK (1 << 10)
  108. #define GMII_LED_ACT 0x1a
  109. #define GMII_LED_ACTIVE_MASK 0xff8f
  110. #define GMII_LED0_ACTIVE (1 << 4)
  111. #define GMII_LED1_ACTIVE (1 << 5)
  112. #define GMII_LED2_ACTIVE (1 << 6)
  113. #define GMII_LED_LINK 0x1c
  114. #define GMII_LED_LINK_MASK 0xf888
  115. #define GMII_LED0_LINK_10 (1 << 0)
  116. #define GMII_LED0_LINK_100 (1 << 1)
  117. #define GMII_LED0_LINK_1000 (1 << 2)
  118. #define GMII_LED1_LINK_10 (1 << 4)
  119. #define GMII_LED1_LINK_100 (1 << 5)
  120. #define GMII_LED1_LINK_1000 (1 << 6)
  121. #define GMII_LED2_LINK_10 (1 << 8)
  122. #define GMII_LED2_LINK_100 (1 << 9)
  123. #define GMII_LED2_LINK_1000 (1 << 10)
  124. #define LED0_ACTIVE (1 << 0)
  125. #define LED0_LINK_10 (1 << 1)
  126. #define LED0_LINK_100 (1 << 2)
  127. #define LED0_LINK_1000 (1 << 3)
  128. #define LED0_FD (1 << 4)
  129. #define LED0_USB3_MASK 0x001f
  130. #define LED1_ACTIVE (1 << 5)
  131. #define LED1_LINK_10 (1 << 6)
  132. #define LED1_LINK_100 (1 << 7)
  133. #define LED1_LINK_1000 (1 << 8)
  134. #define LED1_FD (1 << 9)
  135. #define LED1_USB3_MASK 0x03e0
  136. #define LED2_ACTIVE (1 << 10)
  137. #define LED2_LINK_1000 (1 << 13)
  138. #define LED2_LINK_100 (1 << 12)
  139. #define LED2_LINK_10 (1 << 11)
  140. #define LED2_FD (1 << 14)
  141. #define LED_VALID (1 << 15)
  142. #define LED2_USB3_MASK 0x7c00
  143. #define GMII_PHYPAGE 0x1e
  144. #define GMII_PHY_PAGE_SELECT 0x1f
  145. #define GMII_PHY_PGSEL_EXT 0x0007
  146. #define GMII_PHY_PGSEL_PAGE0 0x0000
  147. /* local defines */
  148. #define ASIX_BASE_NAME "axg"
  149. #define USB_CTRL_SET_TIMEOUT 5000
  150. #define USB_CTRL_GET_TIMEOUT 5000
  151. #define USB_BULK_SEND_TIMEOUT 5000
  152. #define USB_BULK_RECV_TIMEOUT 5000
  153. #define AX_RX_URB_SIZE 1024 * 0x12
  154. #define BLK_FRAME_SIZE 0x200
  155. #define PHY_CONNECT_TIMEOUT 5000
  156. #define TIMEOUT_RESOLUTION 50 /* ms */
  157. #define FLAG_NONE 0
  158. #define FLAG_TYPE_AX88179 (1U << 0)
  159. #define FLAG_TYPE_AX88178a (1U << 1)
  160. #define FLAG_TYPE_DLINK_DUB1312 (1U << 2)
  161. #define FLAG_TYPE_SITECOM (1U << 3)
  162. #define FLAG_TYPE_SAMSUNG (1U << 4)
  163. #define FLAG_TYPE_LENOVO (1U << 5)
  164. #define FLAG_TYPE_GX3 (1U << 6)
  165. /* local vars */
  166. static const struct {
  167. unsigned char ctrl, timer_l, timer_h, size, ifg;
  168. } AX88179_BULKIN_SIZE[] = {
  169. {7, 0x4f, 0, 0x02, 0xff},
  170. {7, 0x20, 3, 0x03, 0xff},
  171. {7, 0xae, 7, 0x04, 0xff},
  172. {7, 0xcc, 0x4c, 0x04, 8},
  173. };
  174. #ifndef CONFIG_DM_ETH
  175. static int curr_eth_dev; /* index for name of next device detected */
  176. #endif
  177. /* driver private */
  178. struct asix_private {
  179. #ifdef CONFIG_DM_ETH
  180. struct ueth_data ueth;
  181. unsigned pkt_cnt;
  182. uint8_t *pkt_data;
  183. uint32_t *pkt_hdr;
  184. #endif
  185. int flags;
  186. int rx_urb_size;
  187. int maxpacketsize;
  188. };
  189. /*
  190. * Asix infrastructure commands
  191. */
  192. static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
  193. u16 size, void *data)
  194. {
  195. int len;
  196. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
  197. debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
  198. cmd, value, index, size);
  199. memcpy(buf, data, size);
  200. len = usb_control_msg(
  201. dev->pusb_dev,
  202. usb_sndctrlpipe(dev->pusb_dev, 0),
  203. cmd,
  204. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  205. value,
  206. index,
  207. buf,
  208. size,
  209. USB_CTRL_SET_TIMEOUT);
  210. return len == size ? 0 : ECOMM;
  211. }
  212. static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
  213. u16 size, void *data)
  214. {
  215. int len;
  216. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
  217. debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
  218. cmd, value, index, size);
  219. len = usb_control_msg(
  220. dev->pusb_dev,
  221. usb_rcvctrlpipe(dev->pusb_dev, 0),
  222. cmd,
  223. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  224. value,
  225. index,
  226. buf,
  227. size,
  228. USB_CTRL_GET_TIMEOUT);
  229. memcpy(data, buf, size);
  230. return len == size ? 0 : ECOMM;
  231. }
  232. static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr)
  233. {
  234. int ret;
  235. ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr);
  236. if (ret < 0)
  237. debug("Failed to read MAC address: %02x\n", ret);
  238. return ret;
  239. }
  240. static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr)
  241. {
  242. int ret;
  243. ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
  244. ETH_ALEN, enetaddr);
  245. if (ret < 0)
  246. debug("Failed to set MAC address: %02x\n", ret);
  247. return ret;
  248. }
  249. static int asix_basic_reset(struct ueth_data *dev,
  250. struct asix_private *dev_priv)
  251. {
  252. u8 buf[5];
  253. u16 *tmp16;
  254. u8 *tmp;
  255. tmp16 = (u16 *)buf;
  256. tmp = (u8 *)buf;
  257. /* Power up ethernet PHY */
  258. *tmp16 = 0;
  259. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  260. *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
  261. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
  262. mdelay(200);
  263. *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
  264. asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
  265. mdelay(200);
  266. /* RX bulk configuration */
  267. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  268. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  269. dev_priv->rx_urb_size = 128 * 20;
  270. /* Water Level configuration */
  271. *tmp = 0x34;
  272. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
  273. *tmp = 0x52;
  274. asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
  275. /* Enable checksum offload */
  276. *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
  277. AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
  278. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
  279. *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
  280. AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
  281. asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
  282. /* Configure RX control register => start operation */
  283. *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
  284. AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
  285. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
  286. *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
  287. AX_MONITOR_MODE_RWMP;
  288. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
  289. /* Configure default medium type => giga */
  290. *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  291. AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
  292. AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN;
  293. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
  294. u16 adv = 0;
  295. adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK |
  296. ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP;
  297. asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv);
  298. adv = ADVERTISE_1000FULL;
  299. asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
  300. return 0;
  301. }
  302. static int asix_wait_link(struct ueth_data *dev)
  303. {
  304. int timeout = 0;
  305. int link_detected;
  306. u8 buf[2];
  307. u16 *tmp16;
  308. tmp16 = (u16 *)buf;
  309. do {
  310. asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  311. MII_BMSR, 2, buf);
  312. link_detected = *tmp16 & BMSR_LSTATUS;
  313. if (!link_detected) {
  314. if (timeout == 0)
  315. printf("Waiting for Ethernet connection... ");
  316. mdelay(TIMEOUT_RESOLUTION);
  317. timeout += TIMEOUT_RESOLUTION;
  318. }
  319. } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
  320. if (link_detected) {
  321. if (timeout > 0)
  322. printf("done.\n");
  323. return 0;
  324. } else {
  325. printf("unable to connect.\n");
  326. return -ENETUNREACH;
  327. }
  328. }
  329. static int asix_init_common(struct ueth_data *dev,
  330. struct asix_private *dev_priv)
  331. {
  332. u8 buf[2], tmp[5], link_sts;
  333. u16 *tmp16, mode;
  334. tmp16 = (u16 *)buf;
  335. debug("** %s()\n", __func__);
  336. /* Configure RX control register => start operation */
  337. *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
  338. AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
  339. if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0)
  340. goto out_err;
  341. if (asix_wait_link(dev) != 0) {
  342. /*reset device and try again*/
  343. printf("Reset Ethernet Device\n");
  344. asix_basic_reset(dev, dev_priv);
  345. if (asix_wait_link(dev) != 0)
  346. goto out_err;
  347. }
  348. /* Configure link */
  349. mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
  350. AX_MEDIUM_RXFLOW_CTRLEN;
  351. asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
  352. 1, 1, &link_sts);
  353. asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
  354. GMII_PHY_PHYSR, 2, tmp16);
  355. if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) {
  356. return 0;
  357. } else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
  358. mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ |
  359. AX_MEDIUM_JUMBO_EN;
  360. if (link_sts & AX_USB_SS)
  361. memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
  362. else if (link_sts & AX_USB_HS)
  363. memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
  364. else
  365. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  366. } else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
  367. mode |= AX_MEDIUM_PS;
  368. if (link_sts & (AX_USB_SS | AX_USB_HS))
  369. memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
  370. else
  371. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  372. } else {
  373. memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
  374. }
  375. /* RX bulk configuration */
  376. asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
  377. dev_priv->rx_urb_size = (1024 * (tmp[3] + 2));
  378. if (*tmp16 & GMII_PHY_PHYSR_FULL)
  379. mode |= AX_MEDIUM_FULL_DUPLEX;
  380. asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
  381. 2, 2, &mode);
  382. return 0;
  383. out_err:
  384. return -1;
  385. }
  386. static int asix_send_common(struct ueth_data *dev,
  387. struct asix_private *dev_priv,
  388. void *packet, int length)
  389. {
  390. int err;
  391. u32 packet_len, tx_hdr2;
  392. int actual_len, framesize;
  393. ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
  394. PKTSIZE + (2 * sizeof(packet_len)));
  395. debug("** %s(), len %d\n", __func__, length);
  396. packet_len = length;
  397. cpu_to_le32s(&packet_len);
  398. memcpy(msg, &packet_len, sizeof(packet_len));
  399. framesize = dev_priv->maxpacketsize;
  400. tx_hdr2 = 0;
  401. if (((length + 8) % framesize) == 0)
  402. tx_hdr2 |= 0x80008000; /* Enable padding */
  403. cpu_to_le32s(&tx_hdr2);
  404. memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2));
  405. memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2),
  406. (void *)packet, length);
  407. err = usb_bulk_msg(dev->pusb_dev,
  408. usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
  409. (void *)msg,
  410. length + sizeof(packet_len) + sizeof(tx_hdr2),
  411. &actual_len,
  412. USB_BULK_SEND_TIMEOUT);
  413. debug("Tx: len = %zu, actual = %u, err = %d\n",
  414. length + sizeof(packet_len), actual_len, err);
  415. return err;
  416. }
  417. #ifndef CONFIG_DM_ETH
  418. /*
  419. * Asix callbacks
  420. */
  421. static int asix_init(struct eth_device *eth, bd_t *bd)
  422. {
  423. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  424. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  425. return asix_init_common(dev, dev_priv);
  426. }
  427. static int asix_write_hwaddr(struct eth_device *eth)
  428. {
  429. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  430. return asix_write_mac(dev, eth->enetaddr);
  431. }
  432. static int asix_send(struct eth_device *eth, void *packet, int length)
  433. {
  434. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  435. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  436. return asix_send_common(dev, dev_priv, packet, length);
  437. }
  438. static int asix_recv(struct eth_device *eth)
  439. {
  440. struct ueth_data *dev = (struct ueth_data *)eth->priv;
  441. struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
  442. u16 frame_pos;
  443. int err;
  444. int actual_len;
  445. int pkt_cnt;
  446. u32 rx_hdr;
  447. u16 hdr_off;
  448. u32 *pkt_hdr;
  449. ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size);
  450. actual_len = -1;
  451. debug("** %s()\n", __func__);
  452. err = usb_bulk_msg(dev->pusb_dev,
  453. usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
  454. (void *)recv_buf,
  455. dev_priv->rx_urb_size,
  456. &actual_len,
  457. USB_BULK_RECV_TIMEOUT);
  458. debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size,
  459. actual_len, err);
  460. if (err != 0) {
  461. debug("Rx: failed to receive\n");
  462. return -ECOMM;
  463. }
  464. if (actual_len > dev_priv->rx_urb_size) {
  465. debug("Rx: received too many bytes %d\n", actual_len);
  466. return -EMSGSIZE;
  467. }
  468. rx_hdr = *(u32 *)(recv_buf + actual_len - 4);
  469. le32_to_cpus(&rx_hdr);
  470. pkt_cnt = (u16)rx_hdr;
  471. hdr_off = (u16)(rx_hdr >> 16);
  472. pkt_hdr = (u32 *)(recv_buf + hdr_off);
  473. frame_pos = 0;
  474. while (pkt_cnt--) {
  475. u16 pkt_len;
  476. le32_to_cpus(pkt_hdr);
  477. pkt_len = (*pkt_hdr >> 16) & 0x1fff;
  478. frame_pos += 2;
  479. net_process_received_packet(recv_buf + frame_pos, pkt_len);
  480. pkt_hdr++;
  481. frame_pos += ((pkt_len + 7) & 0xFFF8)-2;
  482. if (pkt_cnt == 0)
  483. return 0;
  484. }
  485. return err;
  486. }
  487. static void asix_halt(struct eth_device *eth)
  488. {
  489. debug("** %s()\n", __func__);
  490. }
  491. /*
  492. * Asix probing functions
  493. */
  494. void ax88179_eth_before_probe(void)
  495. {
  496. curr_eth_dev = 0;
  497. }
  498. struct asix_dongle {
  499. unsigned short vendor;
  500. unsigned short product;
  501. int flags;
  502. };
  503. static const struct asix_dongle asix_dongles[] = {
  504. { 0x0b95, 0x1790, FLAG_TYPE_AX88179 },
  505. { 0x0b95, 0x178a, FLAG_TYPE_AX88178a },
  506. { 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 },
  507. { 0x0df6, 0x0072, FLAG_TYPE_SITECOM },
  508. { 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG },
  509. { 0x17ef, 0x304b, FLAG_TYPE_LENOVO },
  510. { 0x04b4, 0x3610, FLAG_TYPE_GX3 },
  511. { 0x0000, 0x0000, FLAG_NONE } /* END - Do not remove */
  512. };
  513. /* Probe to see if a new device is actually an asix device */
  514. int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,
  515. struct ueth_data *ss)
  516. {
  517. struct usb_interface *iface;
  518. struct usb_interface_descriptor *iface_desc;
  519. struct asix_private *dev_priv;
  520. int ep_in_found = 0, ep_out_found = 0;
  521. int i;
  522. /* let's examine the device now */
  523. iface = &dev->config.if_desc[ifnum];
  524. iface_desc = &dev->config.if_desc[ifnum].desc;
  525. for (i = 0; asix_dongles[i].vendor != 0; i++) {
  526. if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
  527. dev->descriptor.idProduct == asix_dongles[i].product)
  528. /* Found a supported dongle */
  529. break;
  530. }
  531. if (asix_dongles[i].vendor == 0)
  532. return 0;
  533. memset(ss, 0, sizeof(struct ueth_data));
  534. /* At this point, we know we've got a live one */
  535. debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
  536. dev->descriptor.idVendor, dev->descriptor.idProduct);
  537. /* Initialize the ueth_data structure with some useful info */
  538. ss->ifnum = ifnum;
  539. ss->pusb_dev = dev;
  540. ss->subclass = iface_desc->bInterfaceSubClass;
  541. ss->protocol = iface_desc->bInterfaceProtocol;
  542. /* alloc driver private */
  543. ss->dev_priv = calloc(1, sizeof(struct asix_private));
  544. if (!ss->dev_priv)
  545. return 0;
  546. dev_priv = ss->dev_priv;
  547. dev_priv->flags = asix_dongles[i].flags;
  548. /*
  549. * We are expecting a minimum of 3 endpoints - in, out (bulk), and
  550. * int. We will ignore any others.
  551. */
  552. for (i = 0; i < iface_desc->bNumEndpoints; i++) {
  553. /* is it an interrupt endpoint? */
  554. if ((iface->ep_desc[i].bmAttributes &
  555. USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
  556. ss->ep_int = iface->ep_desc[i].bEndpointAddress &
  557. USB_ENDPOINT_NUMBER_MASK;
  558. ss->irqinterval = iface->ep_desc[i].bInterval;
  559. continue;
  560. }
  561. /* is it an BULK endpoint? */
  562. if (!((iface->ep_desc[i].bmAttributes &
  563. USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK))
  564. continue;
  565. u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
  566. if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
  567. ss->ep_in = ep_addr &
  568. USB_ENDPOINT_NUMBER_MASK;
  569. ep_in_found = 1;
  570. }
  571. if (!(ep_addr & USB_DIR_IN) && !ep_out_found) {
  572. ss->ep_out = ep_addr &
  573. USB_ENDPOINT_NUMBER_MASK;
  574. dev_priv->maxpacketsize =
  575. dev->epmaxpacketout[AX_ENDPOINT_OUT];
  576. ep_out_found = 1;
  577. }
  578. }
  579. debug("Endpoints In %d Out %d Int %d\n",
  580. ss->ep_in, ss->ep_out, ss->ep_int);
  581. /* Do some basic sanity checks, and bail if we find a problem */
  582. if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
  583. !ss->ep_in || !ss->ep_out || !ss->ep_int) {
  584. debug("Problems with device\n");
  585. return 0;
  586. }
  587. dev->privptr = (void *)ss;
  588. return 1;
  589. }
  590. int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
  591. struct eth_device *eth)
  592. {
  593. struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv;
  594. if (!eth) {
  595. debug("%s: missing parameter.\n", __func__);
  596. return 0;
  597. }
  598. sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
  599. eth->init = asix_init;
  600. eth->send = asix_send;
  601. eth->recv = asix_recv;
  602. eth->halt = asix_halt;
  603. eth->write_hwaddr = asix_write_hwaddr;
  604. eth->priv = ss;
  605. if (asix_basic_reset(ss, dev_priv))
  606. return 0;
  607. /* Get the MAC address */
  608. if (asix_read_mac(ss, eth->enetaddr))
  609. return 0;
  610. debug("MAC %pM\n", eth->enetaddr);
  611. return 1;
  612. }
  613. #else /* !CONFIG_DM_ETH */
  614. static int ax88179_eth_start(struct udevice *dev)
  615. {
  616. struct asix_private *priv = dev_get_priv(dev);
  617. return asix_init_common(&priv->ueth, priv);
  618. }
  619. void ax88179_eth_stop(struct udevice *dev)
  620. {
  621. struct asix_private *priv = dev_get_priv(dev);
  622. struct ueth_data *ueth = &priv->ueth;
  623. debug("** %s()\n", __func__);
  624. usb_ether_advance_rxbuf(ueth, -1);
  625. priv->pkt_cnt = 0;
  626. priv->pkt_data = NULL;
  627. priv->pkt_hdr = NULL;
  628. }
  629. int ax88179_eth_send(struct udevice *dev, void *packet, int length)
  630. {
  631. struct asix_private *priv = dev_get_priv(dev);
  632. return asix_send_common(&priv->ueth, priv, packet, length);
  633. }
  634. int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp)
  635. {
  636. struct asix_private *priv = dev_get_priv(dev);
  637. struct ueth_data *ueth = &priv->ueth;
  638. int ret, len;
  639. u16 pkt_len;
  640. /* No packet left, get a new one */
  641. if (priv->pkt_cnt == 0) {
  642. uint8_t *ptr;
  643. u16 pkt_cnt;
  644. u16 hdr_off;
  645. u32 rx_hdr;
  646. len = usb_ether_get_rx_bytes(ueth, &ptr);
  647. debug("%s: first try, len=%d\n", __func__, len);
  648. if (!len) {
  649. if (!(flags & ETH_RECV_CHECK_DEVICE))
  650. return -EAGAIN;
  651. ret = usb_ether_receive(ueth, priv->rx_urb_size);
  652. if (ret < 0)
  653. return ret;
  654. len = usb_ether_get_rx_bytes(ueth, &ptr);
  655. debug("%s: second try, len=%d\n", __func__, len);
  656. }
  657. if (len < 4) {
  658. usb_ether_advance_rxbuf(ueth, -1);
  659. return -EMSGSIZE;
  660. }
  661. rx_hdr = *(u32 *)(ptr + len - 4);
  662. le32_to_cpus(&rx_hdr);
  663. pkt_cnt = (u16)rx_hdr;
  664. if (pkt_cnt == 0) {
  665. usb_ether_advance_rxbuf(ueth, -1);
  666. return 0;
  667. }
  668. hdr_off = (u16)(rx_hdr >> 16);
  669. if (hdr_off > len - 4) {
  670. usb_ether_advance_rxbuf(ueth, -1);
  671. return -EIO;
  672. }
  673. priv->pkt_cnt = pkt_cnt;
  674. priv->pkt_data = ptr;
  675. priv->pkt_hdr = (u32 *)(ptr + hdr_off);
  676. debug("%s: %d packets received, pkt header at %d\n",
  677. __func__, (int)priv->pkt_cnt, (int)hdr_off);
  678. }
  679. le32_to_cpus(priv->pkt_hdr);
  680. pkt_len = (*priv->pkt_hdr >> 16) & 0x1fff;
  681. *packetp = priv->pkt_data + 2;
  682. priv->pkt_data += (pkt_len + 7) & 0xFFF8;
  683. priv->pkt_cnt--;
  684. priv->pkt_hdr++;
  685. debug("%s: return packet of %d bytes (%d packets left)\n",
  686. __func__, (int)pkt_len, priv->pkt_cnt);
  687. return pkt_len;
  688. }
  689. static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
  690. {
  691. struct asix_private *priv = dev_get_priv(dev);
  692. struct ueth_data *ueth = &priv->ueth;
  693. if (priv->pkt_cnt == 0)
  694. usb_ether_advance_rxbuf(ueth, -1);
  695. return 0;
  696. }
  697. int ax88179_write_hwaddr(struct udevice *dev)
  698. {
  699. struct eth_pdata *pdata = dev_get_platdata(dev);
  700. struct asix_private *priv = dev_get_priv(dev);
  701. struct ueth_data *ueth = &priv->ueth;
  702. return asix_write_mac(ueth, pdata->enetaddr);
  703. }
  704. static int ax88179_eth_probe(struct udevice *dev)
  705. {
  706. struct eth_pdata *pdata = dev_get_platdata(dev);
  707. struct asix_private *priv = dev_get_priv(dev);
  708. struct usb_device *usb_dev;
  709. int ret;
  710. priv->flags = dev->driver_data;
  711. ret = usb_ether_register(dev, &priv->ueth, AX_RX_URB_SIZE);
  712. if (ret)
  713. return ret;
  714. usb_dev = priv->ueth.pusb_dev;
  715. priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT];
  716. /* Get the MAC address */
  717. ret = asix_read_mac(&priv->ueth, pdata->enetaddr);
  718. if (ret)
  719. return ret;
  720. debug("MAC %pM\n", pdata->enetaddr);
  721. return 0;
  722. }
  723. static const struct eth_ops ax88179_eth_ops = {
  724. .start = ax88179_eth_start,
  725. .send = ax88179_eth_send,
  726. .recv = ax88179_eth_recv,
  727. .free_pkt = ax88179_free_pkt,
  728. .stop = ax88179_eth_stop,
  729. .write_hwaddr = ax88179_write_hwaddr,
  730. };
  731. U_BOOT_DRIVER(ax88179_eth) = {
  732. .name = "ax88179_eth",
  733. .id = UCLASS_ETH,
  734. .probe = ax88179_eth_probe,
  735. .ops = &ax88179_eth_ops,
  736. .priv_auto_alloc_size = sizeof(struct asix_private),
  737. .platdata_auto_alloc_size = sizeof(struct eth_pdata),
  738. };
  739. static const struct usb_device_id ax88179_eth_id_table[] = {
  740. { USB_DEVICE(0x0b95, 0x1790), .driver_info = FLAG_TYPE_AX88179 },
  741. { USB_DEVICE(0x0b95, 0x178a), .driver_info = FLAG_TYPE_AX88178a },
  742. { USB_DEVICE(0x2001, 0x4a00), .driver_info = FLAG_TYPE_DLINK_DUB1312 },
  743. { USB_DEVICE(0x0df6, 0x0072), .driver_info = FLAG_TYPE_SITECOM },
  744. { USB_DEVICE(0x04e8, 0xa100), .driver_info = FLAG_TYPE_SAMSUNG },
  745. { USB_DEVICE(0x17ef, 0x304b), .driver_info = FLAG_TYPE_LENOVO },
  746. { USB_DEVICE(0x04b4, 0x3610), .driver_info = FLAG_TYPE_GX3 },
  747. { } /* Terminating entry */
  748. };
  749. U_BOOT_USB_DEVICE(ax88179_eth, ax88179_eth_id_table);
  750. #endif /* !CONFIG_DM_ETH */