dwc2_udc_otg_priv.h 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Designware DWC2 on-chip full/high speed USB device controllers
  4. * Copyright (C) 2005 for Samsung Electronics
  5. */
  6. #ifndef __DWC2_UDC_OTG_PRIV__
  7. #define __DWC2_UDC_OTG_PRIV__
  8. #include <linux/errno.h>
  9. #include <linux/sizes.h>
  10. #include <linux/usb/ch9.h>
  11. #include <linux/usb/gadget.h>
  12. #include <linux/list.h>
  13. #include <usb/lin_gadget_compat.h>
  14. #include <usb/dwc2_udc.h>
  15. /*-------------------------------------------------------------------------*/
  16. /* DMA bounce buffer size, 16K is enough even for mass storage */
  17. #define DMA_BUFFER_SIZE (16*SZ_1K)
  18. #define EP0_FIFO_SIZE 64
  19. #define EP_FIFO_SIZE 512
  20. #define EP_FIFO_SIZE2 1024
  21. /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
  22. #define DWC2_MAX_ENDPOINTS 4
  23. #define DWC2_MAX_HW_ENDPOINTS 16
  24. #define WAIT_FOR_SETUP 0
  25. #define DATA_STATE_XMIT 1
  26. #define DATA_STATE_NEED_ZLP 2
  27. #define WAIT_FOR_OUT_STATUS 3
  28. #define DATA_STATE_RECV 4
  29. #define WAIT_FOR_COMPLETE 5
  30. #define WAIT_FOR_OUT_COMPLETE 6
  31. #define WAIT_FOR_IN_COMPLETE 7
  32. #define WAIT_FOR_NULL_COMPLETE 8
  33. #define TEST_J_SEL 0x1
  34. #define TEST_K_SEL 0x2
  35. #define TEST_SE0_NAK_SEL 0x3
  36. #define TEST_PACKET_SEL 0x4
  37. #define TEST_FORCE_ENABLE_SEL 0x5
  38. /* ************************************************************************* */
  39. /* IO
  40. */
  41. enum ep_type {
  42. ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
  43. };
  44. struct dwc2_ep {
  45. struct usb_ep ep;
  46. struct dwc2_udc *dev;
  47. const struct usb_endpoint_descriptor *desc;
  48. struct list_head queue;
  49. unsigned long pio_irqs;
  50. int len;
  51. void *dma_buf;
  52. u8 stopped;
  53. u8 bEndpointAddress;
  54. u8 bmAttributes;
  55. enum ep_type ep_type;
  56. int fifo_num;
  57. };
  58. struct dwc2_request {
  59. struct usb_request req;
  60. struct list_head queue;
  61. };
  62. struct dwc2_udc {
  63. struct usb_gadget gadget;
  64. struct usb_gadget_driver *driver;
  65. struct dwc2_plat_otg_data *pdata;
  66. int ep0state;
  67. struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
  68. unsigned char usb_address;
  69. unsigned req_pending:1, req_std:1;
  70. };
  71. #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
  72. #define ep_index(EP) ((EP)->bEndpointAddress&0xF)
  73. #define ep_maxpacket(EP) ((EP)->ep.maxpacket)
  74. void otg_phy_init(struct dwc2_udc *dev);
  75. void otg_phy_off(struct dwc2_udc *dev);
  76. #endif /* __DWC2_UDC_OTG_PRIV__ */