cpuid.c 25 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. * cpuid support routines
  4. *
  5. * derived from arch/x86/kvm/x86.c
  6. *
  7. * Copyright 2011 Red Hat, Inc. and/or its affiliates.
  8. * Copyright IBM Corporation, 2008
  9. *
  10. * This work is licensed under the terms of the GNU GPL, version 2. See
  11. * the COPYING file in the top-level directory.
  12. *
  13. */
  14. #include <linux/kvm_host.h>
  15. #include <linux/export.h>
  16. #include <linux/vmalloc.h>
  17. #include <linux/uaccess.h>
  18. #include <linux/sched/stat.h>
  19. #include <asm/processor.h>
  20. #include <asm/user.h>
  21. #include <asm/fpu/xstate.h>
  22. #include "cpuid.h"
  23. #include "lapic.h"
  24. #include "mmu.h"
  25. #include "trace.h"
  26. #include "pmu.h"
  27. static u32 xstate_required_size(u64 xstate_bv, bool compacted)
  28. {
  29. int feature_bit = 0;
  30. u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
  31. xstate_bv &= XFEATURE_MASK_EXTEND;
  32. while (xstate_bv) {
  33. if (xstate_bv & 0x1) {
  34. u32 eax, ebx, ecx, edx, offset;
  35. cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
  36. offset = compacted ? ret : ebx;
  37. ret = max(ret, offset + eax);
  38. }
  39. xstate_bv >>= 1;
  40. feature_bit++;
  41. }
  42. return ret;
  43. }
  44. bool kvm_mpx_supported(void)
  45. {
  46. return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
  47. && kvm_x86_ops->mpx_supported());
  48. }
  49. EXPORT_SYMBOL_GPL(kvm_mpx_supported);
  50. u64 kvm_supported_xcr0(void)
  51. {
  52. u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
  53. if (!kvm_mpx_supported())
  54. xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
  55. return xcr0;
  56. }
  57. #define F(x) bit(X86_FEATURE_##x)
  58. /* For scattered features from cpufeatures.h; we currently expose none */
  59. #define KF(x) bit(KVM_CPUID_BIT_##x)
  60. int kvm_update_cpuid(struct kvm_vcpu *vcpu)
  61. {
  62. struct kvm_cpuid_entry2 *best;
  63. struct kvm_lapic *apic = vcpu->arch.apic;
  64. best = kvm_find_cpuid_entry(vcpu, 1, 0);
  65. if (!best)
  66. return 0;
  67. /* Update OSXSAVE bit */
  68. if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
  69. best->ecx &= ~F(OSXSAVE);
  70. if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
  71. best->ecx |= F(OSXSAVE);
  72. }
  73. best->edx &= ~F(APIC);
  74. if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
  75. best->edx |= F(APIC);
  76. if (apic) {
  77. if (best->ecx & F(TSC_DEADLINE_TIMER))
  78. apic->lapic_timer.timer_mode_mask = 3 << 17;
  79. else
  80. apic->lapic_timer.timer_mode_mask = 1 << 17;
  81. }
  82. best = kvm_find_cpuid_entry(vcpu, 7, 0);
  83. if (best) {
  84. /* Update OSPKE bit */
  85. if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
  86. best->ecx &= ~F(OSPKE);
  87. if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
  88. best->ecx |= F(OSPKE);
  89. }
  90. }
  91. best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
  92. if (!best) {
  93. vcpu->arch.guest_supported_xcr0 = 0;
  94. vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
  95. } else {
  96. vcpu->arch.guest_supported_xcr0 =
  97. (best->eax | ((u64)best->edx << 32)) &
  98. kvm_supported_xcr0();
  99. vcpu->arch.guest_xstate_size = best->ebx =
  100. xstate_required_size(vcpu->arch.xcr0, false);
  101. }
  102. best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
  103. if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
  104. best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
  105. /*
  106. * The existing code assumes virtual address is 48-bit or 57-bit in the
  107. * canonical address checks; exit if it is ever changed.
  108. */
  109. best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
  110. if (best) {
  111. int vaddr_bits = (best->eax & 0xff00) >> 8;
  112. if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
  113. return -EINVAL;
  114. }
  115. best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
  116. if (kvm_hlt_in_guest(vcpu->kvm) && best &&
  117. (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
  118. best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
  119. /* Update physical-address width */
  120. vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
  121. kvm_mmu_reset_context(vcpu);
  122. kvm_pmu_refresh(vcpu);
  123. return 0;
  124. }
  125. static int is_efer_nx(void)
  126. {
  127. unsigned long long efer = 0;
  128. rdmsrl_safe(MSR_EFER, &efer);
  129. return efer & EFER_NX;
  130. }
  131. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  132. {
  133. int i;
  134. struct kvm_cpuid_entry2 *e, *entry;
  135. entry = NULL;
  136. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  137. e = &vcpu->arch.cpuid_entries[i];
  138. if (e->function == 0x80000001) {
  139. entry = e;
  140. break;
  141. }
  142. }
  143. if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
  144. entry->edx &= ~F(NX);
  145. printk(KERN_INFO "kvm: guest NX capability removed\n");
  146. }
  147. }
  148. int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
  149. {
  150. struct kvm_cpuid_entry2 *best;
  151. best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
  152. if (!best || best->eax < 0x80000008)
  153. goto not_found;
  154. best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
  155. if (best)
  156. return best->eax & 0xff;
  157. not_found:
  158. return 36;
  159. }
  160. EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
  161. /* when an old userspace process fills a new kernel module */
  162. int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  163. struct kvm_cpuid *cpuid,
  164. struct kvm_cpuid_entry __user *entries)
  165. {
  166. int r, i;
  167. struct kvm_cpuid_entry *cpuid_entries = NULL;
  168. r = -E2BIG;
  169. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  170. goto out;
  171. r = -ENOMEM;
  172. if (cpuid->nent) {
  173. cpuid_entries =
  174. vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
  175. cpuid->nent));
  176. if (!cpuid_entries)
  177. goto out;
  178. r = -EFAULT;
  179. if (copy_from_user(cpuid_entries, entries,
  180. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  181. goto out;
  182. }
  183. for (i = 0; i < cpuid->nent; i++) {
  184. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  185. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  186. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  187. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  188. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  189. vcpu->arch.cpuid_entries[i].index = 0;
  190. vcpu->arch.cpuid_entries[i].flags = 0;
  191. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  192. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  193. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  194. }
  195. vcpu->arch.cpuid_nent = cpuid->nent;
  196. cpuid_fix_nx_cap(vcpu);
  197. kvm_apic_set_version(vcpu);
  198. kvm_x86_ops->cpuid_update(vcpu);
  199. r = kvm_update_cpuid(vcpu);
  200. out:
  201. vfree(cpuid_entries);
  202. return r;
  203. }
  204. int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  205. struct kvm_cpuid2 *cpuid,
  206. struct kvm_cpuid_entry2 __user *entries)
  207. {
  208. int r;
  209. r = -E2BIG;
  210. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  211. goto out;
  212. r = -EFAULT;
  213. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  214. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  215. goto out;
  216. vcpu->arch.cpuid_nent = cpuid->nent;
  217. kvm_apic_set_version(vcpu);
  218. kvm_x86_ops->cpuid_update(vcpu);
  219. r = kvm_update_cpuid(vcpu);
  220. out:
  221. return r;
  222. }
  223. int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  224. struct kvm_cpuid2 *cpuid,
  225. struct kvm_cpuid_entry2 __user *entries)
  226. {
  227. int r;
  228. r = -E2BIG;
  229. if (cpuid->nent < vcpu->arch.cpuid_nent)
  230. goto out;
  231. r = -EFAULT;
  232. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  233. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  234. goto out;
  235. return 0;
  236. out:
  237. cpuid->nent = vcpu->arch.cpuid_nent;
  238. return r;
  239. }
  240. static void cpuid_mask(u32 *word, int wordnum)
  241. {
  242. *word &= boot_cpu_data.x86_capability[wordnum];
  243. }
  244. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  245. u32 index)
  246. {
  247. entry->function = function;
  248. entry->index = index;
  249. cpuid_count(entry->function, entry->index,
  250. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  251. entry->flags = 0;
  252. }
  253. static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry,
  254. u32 func, u32 index, int *nent, int maxnent)
  255. {
  256. switch (func) {
  257. case 0:
  258. entry->eax = 7;
  259. ++*nent;
  260. break;
  261. case 1:
  262. entry->ecx = F(MOVBE);
  263. ++*nent;
  264. break;
  265. case 7:
  266. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  267. if (index == 0)
  268. entry->ecx = F(RDPID);
  269. ++*nent;
  270. default:
  271. break;
  272. }
  273. entry->function = func;
  274. entry->index = index;
  275. return 0;
  276. }
  277. static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  278. u32 index, int *nent, int maxnent)
  279. {
  280. int r;
  281. unsigned f_nx = is_efer_nx() ? F(NX) : 0;
  282. #ifdef CONFIG_X86_64
  283. unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
  284. ? F(GBPAGES) : 0;
  285. unsigned f_lm = F(LM);
  286. #else
  287. unsigned f_gbpages = 0;
  288. unsigned f_lm = 0;
  289. #endif
  290. unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
  291. unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
  292. unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
  293. unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
  294. unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
  295. unsigned f_la57 = 0;
  296. /* cpuid 1.edx */
  297. const u32 kvm_cpuid_1_edx_x86_features =
  298. F(FPU) | F(VME) | F(DE) | F(PSE) |
  299. F(TSC) | F(MSR) | F(PAE) | F(MCE) |
  300. F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
  301. F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
  302. F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
  303. 0 /* Reserved, DS, ACPI */ | F(MMX) |
  304. F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
  305. 0 /* HTT, TM, Reserved, PBE */;
  306. /* cpuid 0x80000001.edx */
  307. const u32 kvm_cpuid_8000_0001_edx_x86_features =
  308. F(FPU) | F(VME) | F(DE) | F(PSE) |
  309. F(TSC) | F(MSR) | F(PAE) | F(MCE) |
  310. F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
  311. F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
  312. F(PAT) | F(PSE36) | 0 /* Reserved */ |
  313. f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
  314. F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
  315. 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
  316. /* cpuid 1.ecx */
  317. const u32 kvm_cpuid_1_ecx_x86_features =
  318. /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
  319. * but *not* advertised to guests via CPUID ! */
  320. F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
  321. 0 /* DS-CPL, VMX, SMX, EST */ |
  322. 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
  323. F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
  324. F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
  325. F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
  326. 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
  327. F(F16C) | F(RDRAND);
  328. /* cpuid 0x80000001.ecx */
  329. const u32 kvm_cpuid_8000_0001_ecx_x86_features =
  330. F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
  331. F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
  332. F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
  333. 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
  334. F(TOPOEXT) | F(PERFCTR_CORE);
  335. /* cpuid 0x80000008.ebx */
  336. const u32 kvm_cpuid_8000_0008_ebx_x86_features =
  337. F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
  338. F(AMD_SSB_NO) | F(AMD_STIBP);
  339. /* cpuid 0xC0000001.edx */
  340. const u32 kvm_cpuid_C000_0001_edx_x86_features =
  341. F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
  342. F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
  343. F(PMM) | F(PMM_EN);
  344. /* cpuid 7.0.ebx */
  345. const u32 kvm_cpuid_7_0_ebx_x86_features =
  346. F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
  347. F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
  348. F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
  349. F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
  350. F(SHA_NI) | F(AVX512BW) | F(AVX512VL);
  351. /* cpuid 0xD.1.eax */
  352. const u32 kvm_cpuid_D_1_eax_x86_features =
  353. F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
  354. /* cpuid 7.0.ecx*/
  355. const u32 kvm_cpuid_7_0_ecx_x86_features =
  356. F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
  357. F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
  358. F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
  359. F(CLDEMOTE);
  360. /* cpuid 7.0.edx*/
  361. const u32 kvm_cpuid_7_0_edx_x86_features =
  362. F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
  363. F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
  364. F(MD_CLEAR);
  365. /* all calls to cpuid_count() should be made on the same cpu */
  366. get_cpu();
  367. r = -E2BIG;
  368. if (WARN_ON(*nent >= maxnent))
  369. goto out;
  370. do_cpuid_1_ent(entry, function, index);
  371. ++*nent;
  372. switch (function) {
  373. case 0:
  374. entry->eax = min(entry->eax, (u32)0xd);
  375. break;
  376. case 1:
  377. entry->edx &= kvm_cpuid_1_edx_x86_features;
  378. cpuid_mask(&entry->edx, CPUID_1_EDX);
  379. entry->ecx &= kvm_cpuid_1_ecx_x86_features;
  380. cpuid_mask(&entry->ecx, CPUID_1_ECX);
  381. /* we support x2apic emulation even if host does not support
  382. * it since we emulate x2apic in software */
  383. entry->ecx |= F(X2APIC);
  384. break;
  385. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  386. * may return different values. This forces us to get_cpu() before
  387. * issuing the first command, and also to emulate this annoying behavior
  388. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  389. case 2: {
  390. int t, times = entry->eax & 0xff;
  391. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  392. entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  393. for (t = 1; t < times; ++t) {
  394. if (*nent >= maxnent)
  395. goto out;
  396. do_cpuid_1_ent(&entry[t], function, 0);
  397. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  398. ++*nent;
  399. }
  400. break;
  401. }
  402. /* function 4 has additional index. */
  403. case 4: {
  404. int i, cache_type;
  405. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  406. /* read more entries until cache_type is zero */
  407. for (i = 1; ; ++i) {
  408. if (*nent >= maxnent)
  409. goto out;
  410. cache_type = entry[i - 1].eax & 0x1f;
  411. if (!cache_type)
  412. break;
  413. do_cpuid_1_ent(&entry[i], function, i);
  414. entry[i].flags |=
  415. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  416. ++*nent;
  417. }
  418. break;
  419. }
  420. case 6: /* Thermal management */
  421. entry->eax = 0x4; /* allow ARAT */
  422. entry->ebx = 0;
  423. entry->ecx = 0;
  424. entry->edx = 0;
  425. break;
  426. case 7: {
  427. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  428. /* Mask ebx against host capability word 9 */
  429. if (index == 0) {
  430. entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
  431. cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
  432. // TSC_ADJUST is emulated
  433. entry->ebx |= F(TSC_ADJUST);
  434. entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
  435. f_la57 = entry->ecx & F(LA57);
  436. cpuid_mask(&entry->ecx, CPUID_7_ECX);
  437. /* Set LA57 based on hardware capability. */
  438. entry->ecx |= f_la57;
  439. entry->ecx |= f_umip;
  440. /* PKU is not yet implemented for shadow paging. */
  441. if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
  442. entry->ecx &= ~F(PKU);
  443. entry->edx &= kvm_cpuid_7_0_edx_x86_features;
  444. cpuid_mask(&entry->edx, CPUID_7_EDX);
  445. if (boot_cpu_has(X86_FEATURE_IBPB) &&
  446. boot_cpu_has(X86_FEATURE_IBRS))
  447. entry->edx |= F(SPEC_CTRL);
  448. if (boot_cpu_has(X86_FEATURE_STIBP))
  449. entry->edx |= F(INTEL_STIBP);
  450. if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
  451. boot_cpu_has(X86_FEATURE_AMD_SSBD))
  452. entry->edx |= F(SPEC_CTRL_SSBD);
  453. /*
  454. * We emulate ARCH_CAPABILITIES in software even
  455. * if the host doesn't support it.
  456. */
  457. entry->edx |= F(ARCH_CAPABILITIES);
  458. } else {
  459. entry->ebx = 0;
  460. entry->ecx = 0;
  461. entry->edx = 0;
  462. }
  463. entry->eax = 0;
  464. break;
  465. }
  466. case 9:
  467. break;
  468. case 0xa: { /* Architectural Performance Monitoring */
  469. struct x86_pmu_capability cap;
  470. union cpuid10_eax eax;
  471. union cpuid10_edx edx;
  472. perf_get_x86_pmu_capability(&cap);
  473. /*
  474. * Only support guest architectural pmu on a host
  475. * with architectural pmu.
  476. */
  477. if (!cap.version)
  478. memset(&cap, 0, sizeof(cap));
  479. eax.split.version_id = min(cap.version, 2);
  480. eax.split.num_counters = cap.num_counters_gp;
  481. eax.split.bit_width = cap.bit_width_gp;
  482. eax.split.mask_length = cap.events_mask_len;
  483. edx.split.num_counters_fixed = cap.num_counters_fixed;
  484. edx.split.bit_width_fixed = cap.bit_width_fixed;
  485. edx.split.reserved = 0;
  486. entry->eax = eax.full;
  487. entry->ebx = cap.events_mask;
  488. entry->ecx = 0;
  489. entry->edx = edx.full;
  490. break;
  491. }
  492. /* function 0xb has additional index. */
  493. case 0xb: {
  494. int i, level_type;
  495. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  496. /* read more entries until level_type is zero */
  497. for (i = 1; ; ++i) {
  498. if (*nent >= maxnent)
  499. goto out;
  500. level_type = entry[i - 1].ecx & 0xff00;
  501. if (!level_type)
  502. break;
  503. do_cpuid_1_ent(&entry[i], function, i);
  504. entry[i].flags |=
  505. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  506. ++*nent;
  507. }
  508. break;
  509. }
  510. case 0xd: {
  511. int idx, i;
  512. u64 supported = kvm_supported_xcr0();
  513. entry->eax &= supported;
  514. entry->ebx = xstate_required_size(supported, false);
  515. entry->ecx = entry->ebx;
  516. entry->edx &= supported >> 32;
  517. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  518. if (!supported)
  519. break;
  520. for (idx = 1, i = 1; idx < 64; ++idx) {
  521. u64 mask = ((u64)1 << idx);
  522. if (*nent >= maxnent)
  523. goto out;
  524. do_cpuid_1_ent(&entry[i], function, idx);
  525. if (idx == 1) {
  526. entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
  527. cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
  528. entry[i].ebx = 0;
  529. if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
  530. entry[i].ebx =
  531. xstate_required_size(supported,
  532. true);
  533. } else {
  534. if (entry[i].eax == 0 || !(supported & mask))
  535. continue;
  536. if (WARN_ON_ONCE(entry[i].ecx & 1))
  537. continue;
  538. }
  539. entry[i].ecx = 0;
  540. entry[i].edx = 0;
  541. entry[i].flags |=
  542. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  543. ++*nent;
  544. ++i;
  545. }
  546. break;
  547. }
  548. case KVM_CPUID_SIGNATURE: {
  549. static const char signature[12] = "KVMKVMKVM\0\0";
  550. const u32 *sigptr = (const u32 *)signature;
  551. entry->eax = KVM_CPUID_FEATURES;
  552. entry->ebx = sigptr[0];
  553. entry->ecx = sigptr[1];
  554. entry->edx = sigptr[2];
  555. break;
  556. }
  557. case KVM_CPUID_FEATURES:
  558. entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
  559. (1 << KVM_FEATURE_NOP_IO_DELAY) |
  560. (1 << KVM_FEATURE_CLOCKSOURCE2) |
  561. (1 << KVM_FEATURE_ASYNC_PF) |
  562. (1 << KVM_FEATURE_PV_EOI) |
  563. (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
  564. (1 << KVM_FEATURE_PV_UNHALT) |
  565. (1 << KVM_FEATURE_PV_TLB_FLUSH) |
  566. (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
  567. (1 << KVM_FEATURE_PV_SEND_IPI);
  568. if (sched_info_on())
  569. entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
  570. entry->ebx = 0;
  571. entry->ecx = 0;
  572. entry->edx = 0;
  573. break;
  574. case 0x80000000:
  575. entry->eax = min(entry->eax, 0x8000001f);
  576. break;
  577. case 0x80000001:
  578. entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
  579. cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
  580. entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
  581. cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
  582. break;
  583. case 0x80000007: /* Advanced power management */
  584. /* invariant TSC is CPUID.80000007H:EDX[8] */
  585. entry->edx &= (1 << 8);
  586. /* mask against host */
  587. entry->edx &= boot_cpu_data.x86_power;
  588. entry->eax = entry->ebx = entry->ecx = 0;
  589. break;
  590. case 0x80000008: {
  591. unsigned g_phys_as = (entry->eax >> 16) & 0xff;
  592. unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
  593. unsigned phys_as = entry->eax & 0xff;
  594. if (!g_phys_as)
  595. g_phys_as = phys_as;
  596. entry->eax = g_phys_as | (virt_as << 8);
  597. entry->edx = 0;
  598. /*
  599. * IBRS, IBPB and VIRT_SSBD aren't necessarily present in
  600. * hardware cpuid
  601. */
  602. if (boot_cpu_has(X86_FEATURE_AMD_IBPB))
  603. entry->ebx |= F(AMD_IBPB);
  604. if (boot_cpu_has(X86_FEATURE_AMD_IBRS))
  605. entry->ebx |= F(AMD_IBRS);
  606. if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))
  607. entry->ebx |= F(VIRT_SSBD);
  608. entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
  609. cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
  610. /*
  611. * The preference is to use SPEC CTRL MSR instead of the
  612. * VIRT_SPEC MSR.
  613. */
  614. if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
  615. !boot_cpu_has(X86_FEATURE_AMD_SSBD))
  616. entry->ebx |= F(VIRT_SSBD);
  617. break;
  618. }
  619. case 0x80000019:
  620. entry->ecx = entry->edx = 0;
  621. break;
  622. case 0x8000001a:
  623. break;
  624. case 0x8000001d:
  625. break;
  626. /*Add support for Centaur's CPUID instruction*/
  627. case 0xC0000000:
  628. /*Just support up to 0xC0000004 now*/
  629. entry->eax = min(entry->eax, 0xC0000004);
  630. break;
  631. case 0xC0000001:
  632. entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
  633. cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
  634. break;
  635. case 3: /* Processor serial number */
  636. case 5: /* MONITOR/MWAIT */
  637. case 0xC0000002:
  638. case 0xC0000003:
  639. case 0xC0000004:
  640. default:
  641. entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
  642. break;
  643. }
  644. kvm_x86_ops->set_supported_cpuid(function, entry);
  645. r = 0;
  646. out:
  647. put_cpu();
  648. return r;
  649. }
  650. static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func,
  651. u32 idx, int *nent, int maxnent, unsigned int type)
  652. {
  653. if (*nent >= maxnent)
  654. return -E2BIG;
  655. if (type == KVM_GET_EMULATED_CPUID)
  656. return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent);
  657. return __do_cpuid_ent(entry, func, idx, nent, maxnent);
  658. }
  659. #undef F
  660. struct kvm_cpuid_param {
  661. u32 func;
  662. u32 idx;
  663. bool has_leaf_count;
  664. bool (*qualifier)(const struct kvm_cpuid_param *param);
  665. };
  666. static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
  667. {
  668. return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
  669. }
  670. static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
  671. __u32 num_entries, unsigned int ioctl_type)
  672. {
  673. int i;
  674. __u32 pad[3];
  675. if (ioctl_type != KVM_GET_EMULATED_CPUID)
  676. return false;
  677. /*
  678. * We want to make sure that ->padding is being passed clean from
  679. * userspace in case we want to use it for something in the future.
  680. *
  681. * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
  682. * have to give ourselves satisfied only with the emulated side. /me
  683. * sheds a tear.
  684. */
  685. for (i = 0; i < num_entries; i++) {
  686. if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
  687. return true;
  688. if (pad[0] || pad[1] || pad[2])
  689. return true;
  690. }
  691. return false;
  692. }
  693. int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
  694. struct kvm_cpuid_entry2 __user *entries,
  695. unsigned int type)
  696. {
  697. struct kvm_cpuid_entry2 *cpuid_entries;
  698. int limit, nent = 0, r = -E2BIG, i;
  699. u32 func;
  700. static const struct kvm_cpuid_param param[] = {
  701. { .func = 0, .has_leaf_count = true },
  702. { .func = 0x80000000, .has_leaf_count = true },
  703. { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
  704. { .func = KVM_CPUID_SIGNATURE },
  705. { .func = KVM_CPUID_FEATURES },
  706. };
  707. if (cpuid->nent < 1)
  708. goto out;
  709. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  710. cpuid->nent = KVM_MAX_CPUID_ENTRIES;
  711. if (sanity_check_entries(entries, cpuid->nent, type))
  712. return -EINVAL;
  713. r = -ENOMEM;
  714. cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
  715. cpuid->nent));
  716. if (!cpuid_entries)
  717. goto out;
  718. r = 0;
  719. for (i = 0; i < ARRAY_SIZE(param); i++) {
  720. const struct kvm_cpuid_param *ent = &param[i];
  721. if (ent->qualifier && !ent->qualifier(ent))
  722. continue;
  723. r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
  724. &nent, cpuid->nent, type);
  725. if (r)
  726. goto out_free;
  727. if (!ent->has_leaf_count)
  728. continue;
  729. limit = cpuid_entries[nent - 1].eax;
  730. for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
  731. r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
  732. &nent, cpuid->nent, type);
  733. if (r)
  734. goto out_free;
  735. }
  736. r = -EFAULT;
  737. if (copy_to_user(entries, cpuid_entries,
  738. nent * sizeof(struct kvm_cpuid_entry2)))
  739. goto out_free;
  740. cpuid->nent = nent;
  741. r = 0;
  742. out_free:
  743. vfree(cpuid_entries);
  744. out:
  745. return r;
  746. }
  747. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  748. {
  749. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  750. struct kvm_cpuid_entry2 *ej;
  751. int j = i;
  752. int nent = vcpu->arch.cpuid_nent;
  753. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  754. /* when no next entry is found, the current entry[i] is reselected */
  755. do {
  756. j = (j + 1) % nent;
  757. ej = &vcpu->arch.cpuid_entries[j];
  758. } while (ej->function != e->function);
  759. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  760. return j;
  761. }
  762. /* find an entry with matching function, matching index (if needed), and that
  763. * should be read next (if it's stateful) */
  764. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  765. u32 function, u32 index)
  766. {
  767. if (e->function != function)
  768. return 0;
  769. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  770. return 0;
  771. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  772. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  773. return 0;
  774. return 1;
  775. }
  776. struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
  777. u32 function, u32 index)
  778. {
  779. int i;
  780. struct kvm_cpuid_entry2 *best = NULL;
  781. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  782. struct kvm_cpuid_entry2 *e;
  783. e = &vcpu->arch.cpuid_entries[i];
  784. if (is_matching_cpuid_entry(e, function, index)) {
  785. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  786. move_to_next_stateful_cpuid_entry(vcpu, i);
  787. best = e;
  788. break;
  789. }
  790. }
  791. return best;
  792. }
  793. EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
  794. /*
  795. * If no match is found, check whether we exceed the vCPU's limit
  796. * and return the content of the highest valid _standard_ leaf instead.
  797. * This is to satisfy the CPUID specification.
  798. */
  799. static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
  800. u32 function, u32 index)
  801. {
  802. struct kvm_cpuid_entry2 *maxlevel;
  803. maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
  804. if (!maxlevel || maxlevel->eax >= function)
  805. return NULL;
  806. if (function & 0x80000000) {
  807. maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
  808. if (!maxlevel)
  809. return NULL;
  810. }
  811. return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
  812. }
  813. bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
  814. u32 *ecx, u32 *edx, bool check_limit)
  815. {
  816. u32 function = *eax, index = *ecx;
  817. struct kvm_cpuid_entry2 *best;
  818. bool entry_found = true;
  819. best = kvm_find_cpuid_entry(vcpu, function, index);
  820. if (!best) {
  821. entry_found = false;
  822. if (!check_limit)
  823. goto out;
  824. best = check_cpuid_limit(vcpu, function, index);
  825. }
  826. out:
  827. if (best) {
  828. *eax = best->eax;
  829. *ebx = best->ebx;
  830. *ecx = best->ecx;
  831. *edx = best->edx;
  832. } else
  833. *eax = *ebx = *ecx = *edx = 0;
  834. trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found);
  835. return entry_found;
  836. }
  837. EXPORT_SYMBOL_GPL(kvm_cpuid);
  838. int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  839. {
  840. u32 eax, ebx, ecx, edx;
  841. if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
  842. return 1;
  843. eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  844. ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  845. kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
  846. kvm_register_write(vcpu, VCPU_REGS_RAX, eax);
  847. kvm_register_write(vcpu, VCPU_REGS_RBX, ebx);
  848. kvm_register_write(vcpu, VCPU_REGS_RCX, ecx);
  849. kvm_register_write(vcpu, VCPU_REGS_RDX, edx);
  850. return kvm_skip_emulated_instruction(vcpu);
  851. }
  852. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);