ide-dma.c 13 KB

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  1. /*
  2. * IDE DMA support (including IDE PCI BM-DMA).
  3. *
  4. * Copyright (C) 1995-1998 Mark Lord
  5. * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
  6. * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
  7. *
  8. * May be copied or modified under the terms of the GNU General Public License
  9. *
  10. * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  11. */
  12. /*
  13. * Special Thanks to Mark for his Six years of work.
  14. */
  15. /*
  16. * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  17. * fixing the problem with the BIOS on some Acer motherboards.
  18. *
  19. * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  20. * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  21. *
  22. * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  23. * at generic DMA -- his patches were referred to when preparing this code.
  24. *
  25. * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  26. * for supplying a Promise UDMA board & WD UDMA drive for this work!
  27. */
  28. #include <linux/types.h>
  29. #include <linux/gfp.h>
  30. #include <linux/kernel.h>
  31. #include <linux/export.h>
  32. #include <linux/ide.h>
  33. #include <linux/scatterlist.h>
  34. #include <linux/dma-mapping.h>
  35. static const struct drive_list_entry drive_whitelist[] = {
  36. { "Micropolis 2112A" , NULL },
  37. { "CONNER CTMA 4000" , NULL },
  38. { "CONNER CTT8000-A" , NULL },
  39. { "ST34342A" , NULL },
  40. { NULL , NULL }
  41. };
  42. static const struct drive_list_entry drive_blacklist[] = {
  43. { "WDC AC11000H" , NULL },
  44. { "WDC AC22100H" , NULL },
  45. { "WDC AC32500H" , NULL },
  46. { "WDC AC33100H" , NULL },
  47. { "WDC AC31600H" , NULL },
  48. { "WDC AC32100H" , "24.09P07" },
  49. { "WDC AC23200L" , "21.10N21" },
  50. { "Compaq CRD-8241B" , NULL },
  51. { "CRD-8400B" , NULL },
  52. { "CRD-8480B", NULL },
  53. { "CRD-8482B", NULL },
  54. { "CRD-84" , NULL },
  55. { "SanDisk SDP3B" , NULL },
  56. { "SanDisk SDP3B-64" , NULL },
  57. { "SANYO CD-ROM CRD" , NULL },
  58. { "HITACHI CDR-8" , NULL },
  59. { "HITACHI CDR-8335" , NULL },
  60. { "HITACHI CDR-8435" , NULL },
  61. { "Toshiba CD-ROM XM-6202B" , NULL },
  62. { "TOSHIBA CD-ROM XM-1702BC", NULL },
  63. { "CD-532E-A" , NULL },
  64. { "E-IDE CD-ROM CR-840", NULL },
  65. { "CD-ROM Drive/F5A", NULL },
  66. { "WPI CDD-820", NULL },
  67. { "SAMSUNG CD-ROM SC-148C", NULL },
  68. { "SAMSUNG CD-ROM SC", NULL },
  69. { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
  70. { "_NEC DV5800A", NULL },
  71. { "SAMSUNG CD-ROM SN-124", "N001" },
  72. { "Seagate STT20000A", NULL },
  73. { "CD-ROM CDR_U200", "1.09" },
  74. { NULL , NULL }
  75. };
  76. /**
  77. * ide_dma_intr - IDE DMA interrupt handler
  78. * @drive: the drive the interrupt is for
  79. *
  80. * Handle an interrupt completing a read/write DMA transfer on an
  81. * IDE device
  82. */
  83. ide_startstop_t ide_dma_intr(ide_drive_t *drive)
  84. {
  85. ide_hwif_t *hwif = drive->hwif;
  86. struct ide_cmd *cmd = &hwif->cmd;
  87. u8 stat = 0, dma_stat = 0;
  88. drive->waiting_for_dma = 0;
  89. dma_stat = hwif->dma_ops->dma_end(drive);
  90. ide_dma_unmap_sg(drive, cmd);
  91. stat = hwif->tp_ops->read_status(hwif);
  92. if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
  93. if (!dma_stat) {
  94. if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
  95. ide_finish_cmd(drive, cmd, stat);
  96. else
  97. ide_complete_rq(drive, BLK_STS_OK,
  98. blk_rq_sectors(cmd->rq) << 9);
  99. return ide_stopped;
  100. }
  101. printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
  102. drive->name, __func__, dma_stat);
  103. }
  104. return ide_error(drive, "dma_intr", stat);
  105. }
  106. int ide_dma_good_drive(ide_drive_t *drive)
  107. {
  108. return ide_in_drive_list(drive->id, drive_whitelist);
  109. }
  110. /**
  111. * ide_dma_map_sg - map IDE scatter gather for DMA I/O
  112. * @drive: the drive to map the DMA table for
  113. * @cmd: command
  114. *
  115. * Perform the DMA mapping magic necessary to access the source or
  116. * target buffers of a request via DMA. The lower layers of the
  117. * kernel provide the necessary cache management so that we can
  118. * operate in a portable fashion.
  119. */
  120. static int ide_dma_map_sg(ide_drive_t *drive, struct ide_cmd *cmd)
  121. {
  122. ide_hwif_t *hwif = drive->hwif;
  123. struct scatterlist *sg = hwif->sg_table;
  124. int i;
  125. if (cmd->tf_flags & IDE_TFLAG_WRITE)
  126. cmd->sg_dma_direction = DMA_TO_DEVICE;
  127. else
  128. cmd->sg_dma_direction = DMA_FROM_DEVICE;
  129. i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
  130. if (i) {
  131. cmd->orig_sg_nents = cmd->sg_nents;
  132. cmd->sg_nents = i;
  133. }
  134. return i;
  135. }
  136. /**
  137. * ide_dma_unmap_sg - clean up DMA mapping
  138. * @drive: The drive to unmap
  139. *
  140. * Teardown mappings after DMA has completed. This must be called
  141. * after the completion of each use of ide_build_dmatable and before
  142. * the next use of ide_build_dmatable. Failure to do so will cause
  143. * an oops as only one mapping can be live for each target at a given
  144. * time.
  145. */
  146. void ide_dma_unmap_sg(ide_drive_t *drive, struct ide_cmd *cmd)
  147. {
  148. ide_hwif_t *hwif = drive->hwif;
  149. dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
  150. cmd->sg_dma_direction);
  151. }
  152. EXPORT_SYMBOL_GPL(ide_dma_unmap_sg);
  153. /**
  154. * ide_dma_off_quietly - Generic DMA kill
  155. * @drive: drive to control
  156. *
  157. * Turn off the current DMA on this IDE controller.
  158. */
  159. void ide_dma_off_quietly(ide_drive_t *drive)
  160. {
  161. drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
  162. drive->hwif->dma_ops->dma_host_set(drive, 0);
  163. }
  164. EXPORT_SYMBOL(ide_dma_off_quietly);
  165. /**
  166. * ide_dma_off - disable DMA on a device
  167. * @drive: drive to disable DMA on
  168. *
  169. * Disable IDE DMA for a device on this IDE controller.
  170. * Inform the user that DMA has been disabled.
  171. */
  172. void ide_dma_off(ide_drive_t *drive)
  173. {
  174. printk(KERN_INFO "%s: DMA disabled\n", drive->name);
  175. ide_dma_off_quietly(drive);
  176. }
  177. EXPORT_SYMBOL(ide_dma_off);
  178. /**
  179. * ide_dma_on - Enable DMA on a device
  180. * @drive: drive to enable DMA on
  181. *
  182. * Enable IDE DMA for a device on this IDE controller.
  183. */
  184. void ide_dma_on(ide_drive_t *drive)
  185. {
  186. drive->dev_flags |= IDE_DFLAG_USING_DMA;
  187. drive->hwif->dma_ops->dma_host_set(drive, 1);
  188. }
  189. int __ide_dma_bad_drive(ide_drive_t *drive)
  190. {
  191. u16 *id = drive->id;
  192. int blacklist = ide_in_drive_list(id, drive_blacklist);
  193. if (blacklist) {
  194. printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
  195. drive->name, (char *)&id[ATA_ID_PROD]);
  196. return blacklist;
  197. }
  198. return 0;
  199. }
  200. EXPORT_SYMBOL(__ide_dma_bad_drive);
  201. static const u8 xfer_mode_bases[] = {
  202. XFER_UDMA_0,
  203. XFER_MW_DMA_0,
  204. XFER_SW_DMA_0,
  205. };
  206. static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
  207. {
  208. u16 *id = drive->id;
  209. ide_hwif_t *hwif = drive->hwif;
  210. const struct ide_port_ops *port_ops = hwif->port_ops;
  211. unsigned int mask = 0;
  212. switch (base) {
  213. case XFER_UDMA_0:
  214. if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
  215. break;
  216. mask = id[ATA_ID_UDMA_MODES];
  217. if (port_ops && port_ops->udma_filter)
  218. mask &= port_ops->udma_filter(drive);
  219. else
  220. mask &= hwif->ultra_mask;
  221. /*
  222. * avoid false cable warning from eighty_ninty_three()
  223. */
  224. if (req_mode > XFER_UDMA_2) {
  225. if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
  226. mask &= 0x07;
  227. }
  228. break;
  229. case XFER_MW_DMA_0:
  230. mask = id[ATA_ID_MWDMA_MODES];
  231. /* Also look for the CF specific MWDMA modes... */
  232. if (ata_id_is_cfa(id) && (id[ATA_ID_CFA_MODES] & 0x38)) {
  233. u8 mode = ((id[ATA_ID_CFA_MODES] & 0x38) >> 3) - 1;
  234. mask |= ((2 << mode) - 1) << 3;
  235. }
  236. if (port_ops && port_ops->mdma_filter)
  237. mask &= port_ops->mdma_filter(drive);
  238. else
  239. mask &= hwif->mwdma_mask;
  240. break;
  241. case XFER_SW_DMA_0:
  242. mask = id[ATA_ID_SWDMA_MODES];
  243. if (!(mask & ATA_SWDMA2) && (id[ATA_ID_OLD_DMA_MODES] >> 8)) {
  244. u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
  245. /*
  246. * if the mode is valid convert it to the mask
  247. * (the maximum allowed mode is XFER_SW_DMA_2)
  248. */
  249. if (mode <= 2)
  250. mask = (2 << mode) - 1;
  251. }
  252. mask &= hwif->swdma_mask;
  253. break;
  254. default:
  255. BUG();
  256. break;
  257. }
  258. return mask;
  259. }
  260. /**
  261. * ide_find_dma_mode - compute DMA speed
  262. * @drive: IDE device
  263. * @req_mode: requested mode
  264. *
  265. * Checks the drive/host capabilities and finds the speed to use for
  266. * the DMA transfer. The speed is then limited by the requested mode.
  267. *
  268. * Returns 0 if the drive/host combination is incapable of DMA transfers
  269. * or if the requested mode is not a DMA mode.
  270. */
  271. u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
  272. {
  273. ide_hwif_t *hwif = drive->hwif;
  274. unsigned int mask;
  275. int x, i;
  276. u8 mode = 0;
  277. if (drive->media != ide_disk) {
  278. if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
  279. return 0;
  280. }
  281. for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
  282. if (req_mode < xfer_mode_bases[i])
  283. continue;
  284. mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
  285. x = fls(mask) - 1;
  286. if (x >= 0) {
  287. mode = xfer_mode_bases[i] + x;
  288. break;
  289. }
  290. }
  291. if (hwif->chipset == ide_acorn && mode == 0) {
  292. /*
  293. * is this correct?
  294. */
  295. if (ide_dma_good_drive(drive) &&
  296. drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
  297. mode = XFER_MW_DMA_1;
  298. }
  299. mode = min(mode, req_mode);
  300. printk(KERN_INFO "%s: %s mode selected\n", drive->name,
  301. mode ? ide_xfer_verbose(mode) : "no DMA");
  302. return mode;
  303. }
  304. static int ide_tune_dma(ide_drive_t *drive)
  305. {
  306. ide_hwif_t *hwif = drive->hwif;
  307. u8 speed;
  308. if (ata_id_has_dma(drive->id) == 0 ||
  309. (drive->dev_flags & IDE_DFLAG_NODMA))
  310. return 0;
  311. /* consult the list of known "bad" drives */
  312. if (__ide_dma_bad_drive(drive))
  313. return 0;
  314. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  315. return config_drive_for_dma(drive);
  316. speed = ide_max_dma_mode(drive);
  317. if (!speed)
  318. return 0;
  319. if (ide_set_dma_mode(drive, speed))
  320. return 0;
  321. return 1;
  322. }
  323. static int ide_dma_check(ide_drive_t *drive)
  324. {
  325. ide_hwif_t *hwif = drive->hwif;
  326. if (ide_tune_dma(drive))
  327. return 0;
  328. /* TODO: always do PIO fallback */
  329. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  330. return -1;
  331. ide_set_max_pio(drive);
  332. return -1;
  333. }
  334. int ide_set_dma(ide_drive_t *drive)
  335. {
  336. int rc;
  337. /*
  338. * Force DMAing for the beginning of the check.
  339. * Some chipsets appear to do interesting
  340. * things, if not checked and cleared.
  341. * PARANOIA!!!
  342. */
  343. ide_dma_off_quietly(drive);
  344. rc = ide_dma_check(drive);
  345. if (rc)
  346. return rc;
  347. ide_dma_on(drive);
  348. return 0;
  349. }
  350. void ide_check_dma_crc(ide_drive_t *drive)
  351. {
  352. u8 mode;
  353. ide_dma_off_quietly(drive);
  354. drive->crc_count = 0;
  355. mode = drive->current_speed;
  356. /*
  357. * Don't try non Ultra-DMA modes without iCRC's. Force the
  358. * device to PIO and make the user enable SWDMA/MWDMA modes.
  359. */
  360. if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
  361. mode--;
  362. else
  363. mode = XFER_PIO_4;
  364. ide_set_xfer_rate(drive, mode);
  365. if (drive->current_speed >= XFER_SW_DMA_0)
  366. ide_dma_on(drive);
  367. }
  368. void ide_dma_lost_irq(ide_drive_t *drive)
  369. {
  370. printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
  371. }
  372. EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
  373. /*
  374. * un-busy the port etc, and clear any pending DMA status. we want to
  375. * retry the current request in pio mode instead of risking tossing it
  376. * all away
  377. */
  378. ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
  379. {
  380. ide_hwif_t *hwif = drive->hwif;
  381. const struct ide_dma_ops *dma_ops = hwif->dma_ops;
  382. struct ide_cmd *cmd = &hwif->cmd;
  383. ide_startstop_t ret = ide_stopped;
  384. /*
  385. * end current dma transaction
  386. */
  387. if (error < 0) {
  388. printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
  389. drive->waiting_for_dma = 0;
  390. (void)dma_ops->dma_end(drive);
  391. ide_dma_unmap_sg(drive, cmd);
  392. ret = ide_error(drive, "dma timeout error",
  393. hwif->tp_ops->read_status(hwif));
  394. } else {
  395. printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
  396. if (dma_ops->dma_clear)
  397. dma_ops->dma_clear(drive);
  398. printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
  399. if (dma_ops->dma_test_irq(drive) == 0) {
  400. ide_dump_status(drive, "DMA timeout",
  401. hwif->tp_ops->read_status(hwif));
  402. drive->waiting_for_dma = 0;
  403. (void)dma_ops->dma_end(drive);
  404. ide_dma_unmap_sg(drive, cmd);
  405. }
  406. }
  407. /*
  408. * disable dma for now, but remember that we did so because of
  409. * a timeout -- we'll reenable after we finish this next request
  410. * (or rather the first chunk of it) in pio.
  411. */
  412. drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
  413. drive->retry_pio++;
  414. ide_dma_off_quietly(drive);
  415. /*
  416. * make sure request is sane
  417. */
  418. if (hwif->rq)
  419. scsi_req(hwif->rq)->result = 0;
  420. return ret;
  421. }
  422. void ide_release_dma_engine(ide_hwif_t *hwif)
  423. {
  424. if (hwif->dmatable_cpu) {
  425. int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  426. dma_free_coherent(hwif->dev, prd_size,
  427. hwif->dmatable_cpu, hwif->dmatable_dma);
  428. hwif->dmatable_cpu = NULL;
  429. }
  430. }
  431. EXPORT_SYMBOL_GPL(ide_release_dma_engine);
  432. int ide_allocate_dma_engine(ide_hwif_t *hwif)
  433. {
  434. int prd_size;
  435. if (hwif->prd_max_nents == 0)
  436. hwif->prd_max_nents = PRD_ENTRIES;
  437. if (hwif->prd_ent_size == 0)
  438. hwif->prd_ent_size = PRD_BYTES;
  439. prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  440. hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
  441. &hwif->dmatable_dma,
  442. GFP_ATOMIC);
  443. if (hwif->dmatable_cpu == NULL) {
  444. printk(KERN_ERR "%s: unable to allocate PRD table\n",
  445. hwif->name);
  446. return -ENOMEM;
  447. }
  448. return 0;
  449. }
  450. EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
  451. int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
  452. {
  453. const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops;
  454. if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 ||
  455. (dma_ops->dma_check && dma_ops->dma_check(drive, cmd)))
  456. goto out;
  457. ide_map_sg(drive, cmd);
  458. if (ide_dma_map_sg(drive, cmd) == 0)
  459. goto out_map;
  460. if (dma_ops->dma_setup(drive, cmd))
  461. goto out_dma_unmap;
  462. drive->waiting_for_dma = 1;
  463. return 0;
  464. out_dma_unmap:
  465. ide_dma_unmap_sg(drive, cmd);
  466. out_map:
  467. ide_map_sg(drive, cmd);
  468. out:
  469. return 1;
  470. }