i40iw_utils.c 42 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. u32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for ipv4 addr events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. u32 local_ipaddr;
  146. u32 action = I40IW_ARP_ADD;
  147. hdl = i40iw_find_netdev(event_netdev);
  148. if (!hdl)
  149. return NOTIFY_DONE;
  150. iwdev = &hdl->device;
  151. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  152. return NOTIFY_DONE;
  153. netdev = iwdev->ldev->netdev;
  154. upper_dev = netdev_master_upper_dev_get(netdev);
  155. if (netdev != event_netdev)
  156. return NOTIFY_DONE;
  157. if (upper_dev) {
  158. struct in_device *in;
  159. rcu_read_lock();
  160. in = __in_dev_get_rcu(upper_dev);
  161. if (!in->ifa_list)
  162. local_ipaddr = 0;
  163. else
  164. local_ipaddr = ntohl(in->ifa_list->ifa_address);
  165. rcu_read_unlock();
  166. } else {
  167. local_ipaddr = ntohl(ifa->ifa_address);
  168. }
  169. switch (event) {
  170. case NETDEV_DOWN:
  171. action = I40IW_ARP_DELETE;
  172. /* Fall through */
  173. case NETDEV_UP:
  174. /* Fall through */
  175. case NETDEV_CHANGEADDR:
  176. /* Just skip if no need to handle ARP cache */
  177. if (!local_ipaddr)
  178. break;
  179. i40iw_manage_arp_cache(iwdev,
  180. netdev->dev_addr,
  181. &local_ipaddr,
  182. true,
  183. action);
  184. i40iw_if_notify(iwdev, netdev, &local_ipaddr, true,
  185. (action == I40IW_ARP_ADD) ? true : false);
  186. break;
  187. default:
  188. break;
  189. }
  190. return NOTIFY_DONE;
  191. }
  192. /**
  193. * i40iw_inet6addr_event - system notifier for ipv6 addr events
  194. * @notfier: not used
  195. * @event: event for notifier
  196. * @ptr: if address
  197. */
  198. int i40iw_inet6addr_event(struct notifier_block *notifier,
  199. unsigned long event,
  200. void *ptr)
  201. {
  202. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  203. struct net_device *event_netdev = ifa->idev->dev;
  204. struct net_device *netdev;
  205. struct i40iw_device *iwdev;
  206. struct i40iw_handler *hdl;
  207. u32 local_ipaddr6[4];
  208. u32 action = I40IW_ARP_ADD;
  209. hdl = i40iw_find_netdev(event_netdev);
  210. if (!hdl)
  211. return NOTIFY_DONE;
  212. iwdev = &hdl->device;
  213. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  214. return NOTIFY_DONE;
  215. netdev = iwdev->ldev->netdev;
  216. if (netdev != event_netdev)
  217. return NOTIFY_DONE;
  218. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  219. switch (event) {
  220. case NETDEV_DOWN:
  221. action = I40IW_ARP_DELETE;
  222. /* Fall through */
  223. case NETDEV_UP:
  224. /* Fall through */
  225. case NETDEV_CHANGEADDR:
  226. i40iw_manage_arp_cache(iwdev,
  227. netdev->dev_addr,
  228. local_ipaddr6,
  229. false,
  230. action);
  231. i40iw_if_notify(iwdev, netdev, local_ipaddr6, false,
  232. (action == I40IW_ARP_ADD) ? true : false);
  233. break;
  234. default:
  235. break;
  236. }
  237. return NOTIFY_DONE;
  238. }
  239. /**
  240. * i40iw_net_event - system notifier for netevents
  241. * @notfier: not used
  242. * @event: event for notifier
  243. * @ptr: neighbor
  244. */
  245. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  246. {
  247. struct neighbour *neigh = ptr;
  248. struct i40iw_device *iwdev;
  249. struct i40iw_handler *iwhdl;
  250. __be32 *p;
  251. u32 local_ipaddr[4];
  252. switch (event) {
  253. case NETEVENT_NEIGH_UPDATE:
  254. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  255. if (!iwhdl)
  256. return NOTIFY_DONE;
  257. iwdev = &iwhdl->device;
  258. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  259. return NOTIFY_DONE;
  260. p = (__be32 *)neigh->primary_key;
  261. i40iw_copy_ip_ntohl(local_ipaddr, p);
  262. if (neigh->nud_state & NUD_VALID) {
  263. i40iw_manage_arp_cache(iwdev,
  264. neigh->ha,
  265. local_ipaddr,
  266. false,
  267. I40IW_ARP_ADD);
  268. } else {
  269. i40iw_manage_arp_cache(iwdev,
  270. neigh->ha,
  271. local_ipaddr,
  272. false,
  273. I40IW_ARP_DELETE);
  274. }
  275. break;
  276. default:
  277. break;
  278. }
  279. return NOTIFY_DONE;
  280. }
  281. /**
  282. * i40iw_netdevice_event - system notifier for netdev events
  283. * @notfier: not used
  284. * @event: event for notifier
  285. * @ptr: netdev
  286. */
  287. int i40iw_netdevice_event(struct notifier_block *notifier,
  288. unsigned long event,
  289. void *ptr)
  290. {
  291. struct net_device *event_netdev;
  292. struct net_device *netdev;
  293. struct i40iw_device *iwdev;
  294. struct i40iw_handler *hdl;
  295. event_netdev = netdev_notifier_info_to_dev(ptr);
  296. hdl = i40iw_find_netdev(event_netdev);
  297. if (!hdl)
  298. return NOTIFY_DONE;
  299. iwdev = &hdl->device;
  300. if (iwdev->init_state < RDMA_DEV_REGISTERED || iwdev->closing)
  301. return NOTIFY_DONE;
  302. netdev = iwdev->ldev->netdev;
  303. if (netdev != event_netdev)
  304. return NOTIFY_DONE;
  305. iwdev->iw_status = 1;
  306. switch (event) {
  307. case NETDEV_DOWN:
  308. iwdev->iw_status = 0;
  309. /* Fall through */
  310. case NETDEV_UP:
  311. i40iw_port_ibevent(iwdev);
  312. break;
  313. default:
  314. break;
  315. }
  316. return NOTIFY_DONE;
  317. }
  318. /**
  319. * i40iw_get_cqp_request - get cqp struct
  320. * @cqp: device cqp ptr
  321. * @wait: cqp to be used in wait mode
  322. */
  323. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  324. {
  325. struct i40iw_cqp_request *cqp_request = NULL;
  326. unsigned long flags;
  327. spin_lock_irqsave(&cqp->req_lock, flags);
  328. if (!list_empty(&cqp->cqp_avail_reqs)) {
  329. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  330. struct i40iw_cqp_request, list);
  331. list_del_init(&cqp_request->list);
  332. }
  333. spin_unlock_irqrestore(&cqp->req_lock, flags);
  334. if (!cqp_request) {
  335. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  336. if (cqp_request) {
  337. cqp_request->dynamic = true;
  338. INIT_LIST_HEAD(&cqp_request->list);
  339. init_waitqueue_head(&cqp_request->waitq);
  340. }
  341. }
  342. if (!cqp_request) {
  343. i40iw_pr_err("CQP Request Fail: No Memory");
  344. return NULL;
  345. }
  346. if (wait) {
  347. atomic_set(&cqp_request->refcount, 2);
  348. cqp_request->waiting = true;
  349. } else {
  350. atomic_set(&cqp_request->refcount, 1);
  351. }
  352. return cqp_request;
  353. }
  354. /**
  355. * i40iw_free_cqp_request - free cqp request
  356. * @cqp: cqp ptr
  357. * @cqp_request: to be put back in cqp list
  358. */
  359. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  360. {
  361. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  362. unsigned long flags;
  363. if (cqp_request->dynamic) {
  364. kfree(cqp_request);
  365. } else {
  366. cqp_request->request_done = false;
  367. cqp_request->callback_fcn = NULL;
  368. cqp_request->waiting = false;
  369. spin_lock_irqsave(&cqp->req_lock, flags);
  370. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  371. spin_unlock_irqrestore(&cqp->req_lock, flags);
  372. }
  373. wake_up(&iwdev->close_wq);
  374. }
  375. /**
  376. * i40iw_put_cqp_request - dec ref count and free if 0
  377. * @cqp: cqp ptr
  378. * @cqp_request: to be put back in cqp list
  379. */
  380. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  381. struct i40iw_cqp_request *cqp_request)
  382. {
  383. if (atomic_dec_and_test(&cqp_request->refcount))
  384. i40iw_free_cqp_request(cqp, cqp_request);
  385. }
  386. /**
  387. * i40iw_free_pending_cqp_request -free pending cqp request objs
  388. * @cqp: cqp ptr
  389. * @cqp_request: to be put back in cqp list
  390. */
  391. static void i40iw_free_pending_cqp_request(struct i40iw_cqp *cqp,
  392. struct i40iw_cqp_request *cqp_request)
  393. {
  394. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  395. if (cqp_request->waiting) {
  396. cqp_request->compl_info.error = true;
  397. cqp_request->request_done = true;
  398. wake_up(&cqp_request->waitq);
  399. }
  400. i40iw_put_cqp_request(cqp, cqp_request);
  401. wait_event_timeout(iwdev->close_wq,
  402. !atomic_read(&cqp_request->refcount),
  403. 1000);
  404. }
  405. /**
  406. * i40iw_cleanup_pending_cqp_op - clean-up cqp with no completions
  407. * @iwdev: iwarp device
  408. */
  409. void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev)
  410. {
  411. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  412. struct i40iw_cqp *cqp = &iwdev->cqp;
  413. struct i40iw_cqp_request *cqp_request = NULL;
  414. struct cqp_commands_info *pcmdinfo = NULL;
  415. u32 i, pending_work, wqe_idx;
  416. pending_work = I40IW_RING_WORK_AVAILABLE(cqp->sc_cqp.sq_ring);
  417. wqe_idx = I40IW_RING_GETCURRENT_TAIL(cqp->sc_cqp.sq_ring);
  418. for (i = 0; i < pending_work; i++) {
  419. cqp_request = (struct i40iw_cqp_request *)(unsigned long)cqp->scratch_array[wqe_idx];
  420. if (cqp_request)
  421. i40iw_free_pending_cqp_request(cqp, cqp_request);
  422. wqe_idx = (wqe_idx + 1) % I40IW_RING_GETSIZE(cqp->sc_cqp.sq_ring);
  423. }
  424. while (!list_empty(&dev->cqp_cmd_head)) {
  425. pcmdinfo = (struct cqp_commands_info *)i40iw_remove_head(&dev->cqp_cmd_head);
  426. cqp_request = container_of(pcmdinfo, struct i40iw_cqp_request, info);
  427. if (cqp_request)
  428. i40iw_free_pending_cqp_request(cqp, cqp_request);
  429. }
  430. }
  431. /**
  432. * i40iw_free_qp - callback after destroy cqp completes
  433. * @cqp_request: cqp request for destroy qp
  434. * @num: not used
  435. */
  436. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  437. {
  438. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  439. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  440. struct i40iw_device *iwdev;
  441. u32 qp_num = iwqp->ibqp.qp_num;
  442. iwdev = iwqp->iwdev;
  443. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  444. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  445. i40iw_rem_devusecount(iwdev);
  446. }
  447. /**
  448. * i40iw_wait_event - wait for completion
  449. * @iwdev: iwarp device
  450. * @cqp_request: cqp request to wait
  451. */
  452. static int i40iw_wait_event(struct i40iw_device *iwdev,
  453. struct i40iw_cqp_request *cqp_request)
  454. {
  455. struct cqp_commands_info *info = &cqp_request->info;
  456. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  457. struct i40iw_cqp_timeout cqp_timeout;
  458. bool cqp_error = false;
  459. int err_code = 0;
  460. memset(&cqp_timeout, 0, sizeof(cqp_timeout));
  461. cqp_timeout.compl_cqp_cmds = iwdev->sc_dev.cqp_cmd_stats[OP_COMPLETED_COMMANDS];
  462. do {
  463. if (wait_event_timeout(cqp_request->waitq,
  464. cqp_request->request_done, CQP_COMPL_WAIT_TIME))
  465. break;
  466. i40iw_check_cqp_progress(&cqp_timeout, &iwdev->sc_dev);
  467. if (cqp_timeout.count < CQP_TIMEOUT_THRESHOLD)
  468. continue;
  469. i40iw_pr_err("error cqp command 0x%x timed out", info->cqp_cmd);
  470. err_code = -ETIME;
  471. if (!iwdev->reset) {
  472. iwdev->reset = true;
  473. i40iw_request_reset(iwdev);
  474. }
  475. goto done;
  476. } while (1);
  477. cqp_error = cqp_request->compl_info.error;
  478. if (cqp_error) {
  479. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  480. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  481. cqp_request->compl_info.min_err_code);
  482. err_code = -EPROTO;
  483. goto done;
  484. }
  485. done:
  486. i40iw_put_cqp_request(iwcqp, cqp_request);
  487. return err_code;
  488. }
  489. /**
  490. * i40iw_handle_cqp_op - process cqp command
  491. * @iwdev: iwarp device
  492. * @cqp_request: cqp request to process
  493. */
  494. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  495. struct i40iw_cqp_request
  496. *cqp_request)
  497. {
  498. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  499. enum i40iw_status_code status;
  500. struct cqp_commands_info *info = &cqp_request->info;
  501. int err_code = 0;
  502. if (iwdev->reset) {
  503. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  504. return I40IW_ERR_CQP_COMPL_ERROR;
  505. }
  506. status = i40iw_process_cqp_cmd(dev, info);
  507. if (status) {
  508. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  509. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  510. return status;
  511. }
  512. if (cqp_request->waiting)
  513. err_code = i40iw_wait_event(iwdev, cqp_request);
  514. if (err_code)
  515. status = I40IW_ERR_CQP_COMPL_ERROR;
  516. return status;
  517. }
  518. /**
  519. * i40iw_add_devusecount - add dev refcount
  520. * @iwdev: dev for refcount
  521. */
  522. void i40iw_add_devusecount(struct i40iw_device *iwdev)
  523. {
  524. atomic64_inc(&iwdev->use_count);
  525. }
  526. /**
  527. * i40iw_rem_devusecount - decrement refcount for dev
  528. * @iwdev: device
  529. */
  530. void i40iw_rem_devusecount(struct i40iw_device *iwdev)
  531. {
  532. if (!atomic64_dec_and_test(&iwdev->use_count))
  533. return;
  534. wake_up(&iwdev->close_wq);
  535. }
  536. /**
  537. * i40iw_add_pdusecount - add pd refcount
  538. * @iwpd: pd for refcount
  539. */
  540. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  541. {
  542. atomic_inc(&iwpd->usecount);
  543. }
  544. /**
  545. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  546. * @iwpd: pd for refcount
  547. * @iwdev: iwarp device
  548. */
  549. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  550. {
  551. if (!atomic_dec_and_test(&iwpd->usecount))
  552. return;
  553. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  554. kfree(iwpd);
  555. }
  556. /**
  557. * i40iw_add_ref - add refcount for qp
  558. * @ibqp: iqarp qp
  559. */
  560. void i40iw_add_ref(struct ib_qp *ibqp)
  561. {
  562. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  563. atomic_inc(&iwqp->refcount);
  564. }
  565. /**
  566. * i40iw_rem_ref - rem refcount for qp and free if 0
  567. * @ibqp: iqarp qp
  568. */
  569. void i40iw_rem_ref(struct ib_qp *ibqp)
  570. {
  571. struct i40iw_qp *iwqp;
  572. enum i40iw_status_code status;
  573. struct i40iw_cqp_request *cqp_request;
  574. struct cqp_commands_info *cqp_info;
  575. struct i40iw_device *iwdev;
  576. u32 qp_num;
  577. unsigned long flags;
  578. iwqp = to_iwqp(ibqp);
  579. iwdev = iwqp->iwdev;
  580. spin_lock_irqsave(&iwdev->qptable_lock, flags);
  581. if (!atomic_dec_and_test(&iwqp->refcount)) {
  582. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  583. return;
  584. }
  585. qp_num = iwqp->ibqp.qp_num;
  586. iwdev->qp_table[qp_num] = NULL;
  587. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  588. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  589. if (!cqp_request)
  590. return;
  591. cqp_request->callback_fcn = i40iw_free_qp;
  592. cqp_request->param = (void *)&iwqp->sc_qp;
  593. cqp_info = &cqp_request->info;
  594. cqp_info->cqp_cmd = OP_QP_DESTROY;
  595. cqp_info->post_sq = 1;
  596. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  597. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  598. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  599. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  600. if (!status)
  601. return;
  602. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  603. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  604. i40iw_rem_devusecount(iwdev);
  605. }
  606. /**
  607. * i40iw_get_qp - get qp address
  608. * @device: iwarp device
  609. * @qpn: qp number
  610. */
  611. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  612. {
  613. struct i40iw_device *iwdev = to_iwdev(device);
  614. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  615. return NULL;
  616. return &iwdev->qp_table[qpn]->ibqp;
  617. }
  618. /**
  619. * i40iw_debug_buf - print debug msg and buffer is mask set
  620. * @dev: hardware control device structure
  621. * @mask: mask to compare if to print debug buffer
  622. * @buf: points buffer addr
  623. * @size: saize of buffer to print
  624. */
  625. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  626. enum i40iw_debug_flag mask,
  627. char *desc,
  628. u64 *buf,
  629. u32 size)
  630. {
  631. u32 i;
  632. if (!(dev->debug_mask & mask))
  633. return;
  634. i40iw_debug(dev, mask, "%s\n", desc);
  635. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  636. (unsigned long long)virt_to_phys(buf));
  637. for (i = 0; i < size; i += 8)
  638. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  639. }
  640. /**
  641. * i40iw_get_hw_addr - return hw addr
  642. * @par: points to shared dev
  643. */
  644. u8 __iomem *i40iw_get_hw_addr(void *par)
  645. {
  646. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  647. return dev->hw->hw_addr;
  648. }
  649. /**
  650. * i40iw_remove_head - return head entry and remove from list
  651. * @list: list for entry
  652. */
  653. void *i40iw_remove_head(struct list_head *list)
  654. {
  655. struct list_head *entry;
  656. if (list_empty(list))
  657. return NULL;
  658. entry = (void *)list->next;
  659. list_del(entry);
  660. return (void *)entry;
  661. }
  662. /**
  663. * i40iw_allocate_dma_mem - Memory alloc helper fn
  664. * @hw: pointer to the HW structure
  665. * @mem: ptr to mem struct to fill out
  666. * @size: size of memory requested
  667. * @alignment: what to align the allocation to
  668. */
  669. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  670. struct i40iw_dma_mem *mem,
  671. u64 size,
  672. u32 alignment)
  673. {
  674. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  675. if (!mem)
  676. return I40IW_ERR_PARAM;
  677. mem->size = ALIGN(size, alignment);
  678. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  679. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  680. if (!mem->va)
  681. return I40IW_ERR_NO_MEMORY;
  682. return 0;
  683. }
  684. /**
  685. * i40iw_free_dma_mem - Memory free helper fn
  686. * @hw: pointer to the HW structure
  687. * @mem: ptr to mem struct to free
  688. */
  689. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  690. {
  691. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  692. if (!mem || !mem->va)
  693. return;
  694. dma_free_coherent(&pcidev->dev, mem->size,
  695. mem->va, (dma_addr_t)mem->pa);
  696. mem->va = NULL;
  697. }
  698. /**
  699. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  700. * @hw: pointer to the HW structure
  701. * @mem: ptr to mem struct to fill out
  702. * @size: size of memory requested
  703. */
  704. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  705. struct i40iw_virt_mem *mem,
  706. u32 size)
  707. {
  708. if (!mem)
  709. return I40IW_ERR_PARAM;
  710. mem->size = size;
  711. mem->va = kzalloc(size, GFP_KERNEL);
  712. if (mem->va)
  713. return 0;
  714. else
  715. return I40IW_ERR_NO_MEMORY;
  716. }
  717. /**
  718. * i40iw_free_virt_mem - virtual memory free helper fn
  719. * @hw: pointer to the HW structure
  720. * @mem: ptr to mem struct to free
  721. */
  722. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  723. struct i40iw_virt_mem *mem)
  724. {
  725. if (!mem)
  726. return I40IW_ERR_PARAM;
  727. /*
  728. * mem->va points to the parent of mem, so both mem and mem->va
  729. * can not be touched once mem->va is freed
  730. */
  731. kfree(mem->va);
  732. return 0;
  733. }
  734. /**
  735. * i40iw_cqp_sds_cmd - create cqp command for sd
  736. * @dev: hardware control device structure
  737. * @sd_info: information for sd cqp
  738. *
  739. */
  740. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  741. struct i40iw_update_sds_info *sdinfo)
  742. {
  743. enum i40iw_status_code status;
  744. struct i40iw_cqp_request *cqp_request;
  745. struct cqp_commands_info *cqp_info;
  746. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  747. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  748. if (!cqp_request)
  749. return I40IW_ERR_NO_MEMORY;
  750. cqp_info = &cqp_request->info;
  751. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  752. sizeof(cqp_info->in.u.update_pe_sds.info));
  753. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  754. cqp_info->post_sq = 1;
  755. cqp_info->in.u.update_pe_sds.dev = dev;
  756. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  757. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  758. if (status)
  759. i40iw_pr_err("CQP-OP Update SD's fail");
  760. return status;
  761. }
  762. /**
  763. * i40iw_qp_suspend_resume - cqp command for suspend/resume
  764. * @dev: hardware control device structure
  765. * @qp: hardware control qp
  766. * @suspend: flag if suspend or resume
  767. */
  768. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend)
  769. {
  770. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  771. struct i40iw_cqp_request *cqp_request;
  772. struct i40iw_sc_cqp *cqp = dev->cqp;
  773. struct cqp_commands_info *cqp_info;
  774. enum i40iw_status_code status;
  775. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  776. if (!cqp_request)
  777. return;
  778. cqp_info = &cqp_request->info;
  779. cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME;
  780. cqp_info->in.u.suspend_resume.cqp = cqp;
  781. cqp_info->in.u.suspend_resume.qp = qp;
  782. cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
  783. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  784. if (status)
  785. i40iw_pr_err("CQP-OP QP Suspend/Resume fail");
  786. }
  787. /**
  788. * i40iw_term_modify_qp - modify qp for term message
  789. * @qp: hardware control qp
  790. * @next_state: qp's next state
  791. * @term: terminate code
  792. * @term_len: length
  793. */
  794. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  795. {
  796. struct i40iw_qp *iwqp;
  797. iwqp = (struct i40iw_qp *)qp->back_qp;
  798. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  799. };
  800. /**
  801. * i40iw_terminate_done - after terminate is completed
  802. * @qp: hardware control qp
  803. * @timeout_occurred: indicates if terminate timer expired
  804. */
  805. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  806. {
  807. struct i40iw_qp *iwqp;
  808. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  809. u8 hte = 0;
  810. bool first_time;
  811. unsigned long flags;
  812. iwqp = (struct i40iw_qp *)qp->back_qp;
  813. spin_lock_irqsave(&iwqp->lock, flags);
  814. if (iwqp->hte_added) {
  815. iwqp->hte_added = 0;
  816. hte = 1;
  817. }
  818. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  819. qp->term_flags |= I40IW_TERM_DONE;
  820. spin_unlock_irqrestore(&iwqp->lock, flags);
  821. if (first_time) {
  822. if (!timeout_occurred)
  823. i40iw_terminate_del_timer(qp);
  824. else
  825. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  826. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  827. i40iw_cm_disconn(iwqp);
  828. }
  829. }
  830. /**
  831. * i40iw_terminate_imeout - timeout happened
  832. * @context: points to iwarp qp
  833. */
  834. static void i40iw_terminate_timeout(struct timer_list *t)
  835. {
  836. struct i40iw_qp *iwqp = from_timer(iwqp, t, terminate_timer);
  837. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  838. i40iw_terminate_done(qp, 1);
  839. i40iw_rem_ref(&iwqp->ibqp);
  840. }
  841. /**
  842. * i40iw_terminate_start_timer - start terminate timeout
  843. * @qp: hardware control qp
  844. */
  845. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  846. {
  847. struct i40iw_qp *iwqp;
  848. iwqp = (struct i40iw_qp *)qp->back_qp;
  849. i40iw_add_ref(&iwqp->ibqp);
  850. timer_setup(&iwqp->terminate_timer, i40iw_terminate_timeout, 0);
  851. iwqp->terminate_timer.expires = jiffies + HZ;
  852. add_timer(&iwqp->terminate_timer);
  853. }
  854. /**
  855. * i40iw_terminate_del_timer - delete terminate timeout
  856. * @qp: hardware control qp
  857. */
  858. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  859. {
  860. struct i40iw_qp *iwqp;
  861. iwqp = (struct i40iw_qp *)qp->back_qp;
  862. if (del_timer(&iwqp->terminate_timer))
  863. i40iw_rem_ref(&iwqp->ibqp);
  864. }
  865. /**
  866. * i40iw_cqp_generic_worker - generic worker for cqp
  867. * @work: work pointer
  868. */
  869. static void i40iw_cqp_generic_worker(struct work_struct *work)
  870. {
  871. struct i40iw_virtchnl_work_info *work_info =
  872. &((struct virtchnl_work *)work)->work_info;
  873. if (work_info->worker_vf_dev)
  874. work_info->callback_fcn(work_info->worker_vf_dev);
  875. }
  876. /**
  877. * i40iw_cqp_spawn_worker - spawn worket thread
  878. * @iwdev: device struct pointer
  879. * @work_info: work request info
  880. * @iw_vf_idx: virtual function index
  881. */
  882. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  883. struct i40iw_virtchnl_work_info *work_info,
  884. u32 iw_vf_idx)
  885. {
  886. struct virtchnl_work *work;
  887. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  888. work = &iwdev->virtchnl_w[iw_vf_idx];
  889. memcpy(&work->work_info, work_info, sizeof(*work_info));
  890. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  891. queue_work(iwdev->virtchnl_wq, &work->work);
  892. }
  893. /**
  894. * i40iw_cqp_manage_hmc_fcn_worker -
  895. * @work: work pointer for hmc info
  896. */
  897. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  898. {
  899. struct i40iw_cqp_request *cqp_request =
  900. ((struct virtchnl_work *)work)->cqp_request;
  901. struct i40iw_ccq_cqe_info ccq_cqe_info;
  902. struct i40iw_hmc_fcn_info *hmcfcninfo =
  903. &cqp_request->info.in.u.manage_hmc_pm.info;
  904. struct i40iw_device *iwdev =
  905. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  906. ccq_cqe_info.cqp = NULL;
  907. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  908. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  909. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  910. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  911. ccq_cqe_info.scratch = 0;
  912. ccq_cqe_info.error = cqp_request->compl_info.error;
  913. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  914. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  915. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  916. }
  917. /**
  918. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  919. * @cqp_request: cqp request info struct for hmc fun
  920. * @unused: unused param of callback
  921. */
  922. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  923. u32 unused)
  924. {
  925. struct virtchnl_work *work;
  926. struct i40iw_hmc_fcn_info *hmcfcninfo =
  927. &cqp_request->info.in.u.manage_hmc_pm.info;
  928. struct i40iw_device *iwdev =
  929. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  930. back_dev;
  931. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  932. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  933. atomic_inc(&cqp_request->refcount);
  934. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  935. work->cqp_request = cqp_request;
  936. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  937. queue_work(iwdev->virtchnl_wq, &work->work);
  938. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  939. } else {
  940. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  941. }
  942. }
  943. /**
  944. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  945. * @dev: hardware control device structure
  946. * @hmcfcninfo: info for hmc
  947. */
  948. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  949. struct i40iw_hmc_fcn_info *hmcfcninfo)
  950. {
  951. enum i40iw_status_code status;
  952. struct i40iw_cqp_request *cqp_request;
  953. struct cqp_commands_info *cqp_info;
  954. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  955. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  956. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  957. if (!cqp_request)
  958. return I40IW_ERR_NO_MEMORY;
  959. cqp_info = &cqp_request->info;
  960. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  961. cqp_request->param = hmcfcninfo;
  962. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  963. sizeof(*hmcfcninfo));
  964. cqp_info->in.u.manage_hmc_pm.dev = dev;
  965. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  966. cqp_info->post_sq = 1;
  967. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  968. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  969. if (status)
  970. i40iw_pr_err("CQP-OP Manage HMC fail");
  971. return status;
  972. }
  973. /**
  974. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  975. * @iwdev: function device struct
  976. * @values_mem: buffer for fpm
  977. * @hmc_fn_id: function id for fpm
  978. */
  979. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  980. struct i40iw_dma_mem *values_mem,
  981. u8 hmc_fn_id)
  982. {
  983. enum i40iw_status_code status;
  984. struct i40iw_cqp_request *cqp_request;
  985. struct cqp_commands_info *cqp_info;
  986. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  987. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  988. if (!cqp_request)
  989. return I40IW_ERR_NO_MEMORY;
  990. cqp_info = &cqp_request->info;
  991. cqp_request->param = NULL;
  992. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  993. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  994. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  995. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  996. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  997. cqp_info->post_sq = 1;
  998. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  999. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1000. if (status)
  1001. i40iw_pr_err("CQP-OP Query FPM fail");
  1002. return status;
  1003. }
  1004. /**
  1005. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  1006. * @dev: hardware control device structure
  1007. * @values_mem: buffer with fpm values
  1008. * @hmc_fn_id: function id for fpm
  1009. */
  1010. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  1011. struct i40iw_dma_mem *values_mem,
  1012. u8 hmc_fn_id)
  1013. {
  1014. enum i40iw_status_code status;
  1015. struct i40iw_cqp_request *cqp_request;
  1016. struct cqp_commands_info *cqp_info;
  1017. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1018. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  1019. if (!cqp_request)
  1020. return I40IW_ERR_NO_MEMORY;
  1021. cqp_info = &cqp_request->info;
  1022. cqp_request->param = NULL;
  1023. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  1024. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  1025. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  1026. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  1027. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  1028. cqp_info->post_sq = 1;
  1029. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  1030. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1031. if (status)
  1032. i40iw_pr_err("CQP-OP Commit FPM fail");
  1033. return status;
  1034. }
  1035. /**
  1036. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  1037. * @iwdev: function's device struct
  1038. */
  1039. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  1040. {
  1041. struct i40iw_device *iwdev = dev->back_dev;
  1042. int timeout_ret;
  1043. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  1044. __func__, __LINE__, dev, iwdev);
  1045. atomic_set(&iwdev->vchnl_msgs, 2);
  1046. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  1047. (atomic_read(&iwdev->vchnl_msgs) == 1),
  1048. I40IW_VCHNL_EVENT_TIMEOUT);
  1049. atomic_dec(&iwdev->vchnl_msgs);
  1050. if (!timeout_ret) {
  1051. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  1052. atomic_set(&iwdev->vchnl_msgs, 0);
  1053. dev->vchnl_up = false;
  1054. return I40IW_ERR_TIMEOUT;
  1055. }
  1056. wake_up(&dev->vf_reqs);
  1057. return 0;
  1058. }
  1059. /**
  1060. * i40iw_cqp_cq_create_cmd - create a cq for the cqp
  1061. * @dev: device pointer
  1062. * @cq: pointer to created cq
  1063. */
  1064. enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev,
  1065. struct i40iw_sc_cq *cq)
  1066. {
  1067. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1068. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1069. struct i40iw_cqp_request *cqp_request;
  1070. struct cqp_commands_info *cqp_info;
  1071. enum i40iw_status_code status;
  1072. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1073. if (!cqp_request)
  1074. return I40IW_ERR_NO_MEMORY;
  1075. cqp_info = &cqp_request->info;
  1076. cqp_info->cqp_cmd = OP_CQ_CREATE;
  1077. cqp_info->post_sq = 1;
  1078. cqp_info->in.u.cq_create.cq = cq;
  1079. cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
  1080. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1081. if (status)
  1082. i40iw_pr_err("CQP-OP Create QP fail");
  1083. return status;
  1084. }
  1085. /**
  1086. * i40iw_cqp_qp_create_cmd - create a qp for the cqp
  1087. * @dev: device pointer
  1088. * @qp: pointer to created qp
  1089. */
  1090. enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev,
  1091. struct i40iw_sc_qp *qp)
  1092. {
  1093. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1094. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1095. struct i40iw_cqp_request *cqp_request;
  1096. struct cqp_commands_info *cqp_info;
  1097. struct i40iw_create_qp_info *qp_info;
  1098. enum i40iw_status_code status;
  1099. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1100. if (!cqp_request)
  1101. return I40IW_ERR_NO_MEMORY;
  1102. cqp_info = &cqp_request->info;
  1103. qp_info = &cqp_request->info.in.u.qp_create.info;
  1104. memset(qp_info, 0, sizeof(*qp_info));
  1105. qp_info->cq_num_valid = true;
  1106. qp_info->next_iwarp_state = I40IW_QP_STATE_RTS;
  1107. cqp_info->cqp_cmd = OP_QP_CREATE;
  1108. cqp_info->post_sq = 1;
  1109. cqp_info->in.u.qp_create.qp = qp;
  1110. cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
  1111. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1112. if (status)
  1113. i40iw_pr_err("CQP-OP QP create fail");
  1114. return status;
  1115. }
  1116. /**
  1117. * i40iw_cqp_cq_destroy_cmd - destroy the cqp cq
  1118. * @dev: device pointer
  1119. * @cq: pointer to cq
  1120. */
  1121. void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq)
  1122. {
  1123. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1124. i40iw_cq_wq_destroy(iwdev, cq);
  1125. }
  1126. /**
  1127. * i40iw_cqp_qp_destroy_cmd - destroy the cqp
  1128. * @dev: device pointer
  1129. * @qp: pointer to qp
  1130. */
  1131. void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1132. {
  1133. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1134. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1135. struct i40iw_cqp_request *cqp_request;
  1136. struct cqp_commands_info *cqp_info;
  1137. enum i40iw_status_code status;
  1138. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1139. if (!cqp_request)
  1140. return;
  1141. cqp_info = &cqp_request->info;
  1142. memset(cqp_info, 0, sizeof(*cqp_info));
  1143. cqp_info->cqp_cmd = OP_QP_DESTROY;
  1144. cqp_info->post_sq = 1;
  1145. cqp_info->in.u.qp_destroy.qp = qp;
  1146. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  1147. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  1148. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1149. if (status)
  1150. i40iw_pr_err("CQP QP_DESTROY fail");
  1151. }
  1152. /**
  1153. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  1154. * @dev: hardware control device structure
  1155. * @qp: hardware control qp
  1156. */
  1157. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1158. {
  1159. struct i40iw_gen_ae_info info;
  1160. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1161. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  1162. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  1163. info.ae_source = I40IW_AE_SOURCE_RQ;
  1164. i40iw_gen_ae(iwdev, qp, &info, false);
  1165. }
  1166. /**
  1167. * i40iw_init_hash_desc - initialize hash for crc calculation
  1168. * @desc: cryption type
  1169. */
  1170. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  1171. {
  1172. struct crypto_shash *tfm;
  1173. struct shash_desc *tdesc;
  1174. tfm = crypto_alloc_shash("crc32c", 0, 0);
  1175. if (IS_ERR(tfm))
  1176. return I40IW_ERR_MPA_CRC;
  1177. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  1178. GFP_KERNEL);
  1179. if (!tdesc) {
  1180. crypto_free_shash(tfm);
  1181. return I40IW_ERR_MPA_CRC;
  1182. }
  1183. tdesc->tfm = tfm;
  1184. *desc = tdesc;
  1185. return 0;
  1186. }
  1187. /**
  1188. * i40iw_free_hash_desc - free hash desc
  1189. * @desc: to be freed
  1190. */
  1191. void i40iw_free_hash_desc(struct shash_desc *desc)
  1192. {
  1193. if (desc) {
  1194. crypto_free_shash(desc->tfm);
  1195. kfree(desc);
  1196. }
  1197. }
  1198. /**
  1199. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  1200. * @dev: hardware control device structure
  1201. * @mem: buffer ptr for fpm to be allocated
  1202. * @return: memory allocation status
  1203. */
  1204. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  1205. struct i40iw_dma_mem *mem)
  1206. {
  1207. enum i40iw_status_code status;
  1208. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1209. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  1210. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1211. return status;
  1212. }
  1213. /**
  1214. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  1215. * @desc: desc for hash
  1216. * @addr: address of buffer for crc
  1217. * @length: length of buffer
  1218. * @value: value to be compared
  1219. */
  1220. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  1221. void *addr,
  1222. u32 length,
  1223. u32 value)
  1224. {
  1225. u32 crc = 0;
  1226. int ret;
  1227. enum i40iw_status_code ret_code = 0;
  1228. crypto_shash_init(desc);
  1229. ret = crypto_shash_update(desc, addr, length);
  1230. if (!ret)
  1231. crypto_shash_final(desc, (u8 *)&crc);
  1232. if (crc != value) {
  1233. i40iw_pr_err("mpa crc check fail\n");
  1234. ret_code = I40IW_ERR_MPA_CRC;
  1235. }
  1236. return ret_code;
  1237. }
  1238. /**
  1239. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1240. * @dev: hardware control device structure
  1241. * @buf: receive puda buffer on exception q
  1242. */
  1243. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1244. struct i40iw_puda_buf *buf)
  1245. {
  1246. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1247. struct i40iw_qp *iwqp;
  1248. struct i40iw_cm_node *cm_node;
  1249. u32 loc_addr[4], rem_addr[4];
  1250. u16 loc_port, rem_port;
  1251. struct ipv6hdr *ip6h;
  1252. struct iphdr *iph = (struct iphdr *)buf->iph;
  1253. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1254. if (iph->version == 4) {
  1255. memset(loc_addr, 0, sizeof(loc_addr));
  1256. loc_addr[0] = ntohl(iph->daddr);
  1257. memset(rem_addr, 0, sizeof(rem_addr));
  1258. rem_addr[0] = ntohl(iph->saddr);
  1259. } else {
  1260. ip6h = (struct ipv6hdr *)buf->iph;
  1261. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1262. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1263. }
  1264. loc_port = ntohs(tcph->dest);
  1265. rem_port = ntohs(tcph->source);
  1266. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1267. loc_addr, false, true);
  1268. if (!cm_node)
  1269. return NULL;
  1270. iwqp = cm_node->iwqp;
  1271. return &iwqp->sc_qp;
  1272. }
  1273. /**
  1274. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1275. * @buf: puda to update
  1276. * @length: length of buffer
  1277. * @seqnum: seq number for tcp
  1278. */
  1279. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1280. {
  1281. struct tcphdr *tcph;
  1282. struct iphdr *iph;
  1283. u16 iphlen;
  1284. u16 packetsize;
  1285. u8 *addr = (u8 *)buf->mem.va;
  1286. iphlen = (buf->ipv4) ? 20 : 40;
  1287. iph = (struct iphdr *)(addr + buf->maclen);
  1288. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1289. packetsize = length + buf->tcphlen + iphlen;
  1290. iph->tot_len = htons(packetsize);
  1291. tcph->seq = htonl(seqnum);
  1292. }
  1293. /**
  1294. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1295. * @info: to get information
  1296. * @buf: puda buffer
  1297. */
  1298. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1299. struct i40iw_puda_buf *buf)
  1300. {
  1301. struct iphdr *iph;
  1302. struct ipv6hdr *ip6h;
  1303. struct tcphdr *tcph;
  1304. u16 iphlen;
  1305. u16 pkt_len;
  1306. u8 *mem = (u8 *)buf->mem.va;
  1307. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1308. if (ethh->h_proto == htons(0x8100)) {
  1309. info->vlan_valid = true;
  1310. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1311. }
  1312. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1313. iphlen = (info->l3proto) ? 40 : 20;
  1314. buf->ipv4 = (info->l3proto) ? false : true;
  1315. buf->iph = mem + buf->maclen;
  1316. iph = (struct iphdr *)buf->iph;
  1317. buf->tcph = buf->iph + iphlen;
  1318. tcph = (struct tcphdr *)buf->tcph;
  1319. if (buf->ipv4) {
  1320. pkt_len = ntohs(iph->tot_len);
  1321. } else {
  1322. ip6h = (struct ipv6hdr *)buf->iph;
  1323. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1324. }
  1325. buf->totallen = pkt_len + buf->maclen;
  1326. if (info->payload_len < buf->totallen) {
  1327. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1328. info->payload_len, buf->totallen);
  1329. return I40IW_ERR_INVALID_SIZE;
  1330. }
  1331. buf->tcphlen = (tcph->doff) << 2;
  1332. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1333. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1334. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1335. buf->seqnum = ntohl(tcph->seq);
  1336. return 0;
  1337. }
  1338. /**
  1339. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1340. * @vsi: pointer to the vsi structure
  1341. */
  1342. static void i40iw_hw_stats_timeout(struct timer_list *t)
  1343. {
  1344. struct i40iw_vsi_pestat *pf_devstat = from_timer(pf_devstat, t,
  1345. stats_timer);
  1346. struct i40iw_sc_vsi *sc_vsi = pf_devstat->vsi;
  1347. struct i40iw_sc_dev *pf_dev = sc_vsi->dev;
  1348. struct i40iw_vsi_pestat *vf_devstat = NULL;
  1349. u16 iw_vf_idx;
  1350. unsigned long flags;
  1351. /*PF*/
  1352. i40iw_hw_stats_read_all(pf_devstat, &pf_devstat->hw_stats);
  1353. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1354. spin_lock_irqsave(&pf_devstat->lock, flags);
  1355. if (pf_dev->vf_dev[iw_vf_idx]) {
  1356. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1357. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->pestat;
  1358. i40iw_hw_stats_read_all(vf_devstat, &vf_devstat->hw_stats);
  1359. }
  1360. }
  1361. spin_unlock_irqrestore(&pf_devstat->lock, flags);
  1362. }
  1363. mod_timer(&pf_devstat->stats_timer,
  1364. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1365. }
  1366. /**
  1367. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1368. * @vsi: pointer to the vsi structure
  1369. */
  1370. void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi)
  1371. {
  1372. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1373. timer_setup(&devstat->stats_timer, i40iw_hw_stats_timeout, 0);
  1374. mod_timer(&devstat->stats_timer,
  1375. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1376. }
  1377. /**
  1378. * i40iw_hw_stats_stop_timer - Delete periodic stats timer
  1379. * @vsi: pointer to the vsi structure
  1380. */
  1381. void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi)
  1382. {
  1383. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1384. del_timer_sync(&devstat->stats_timer);
  1385. }