trace_cq.h 5.5 KB

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  1. /*
  2. * Copyright(c) 2016 - 2018 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #if !defined(__RVT_TRACE_CQ_H) || defined(TRACE_HEADER_MULTI_READ)
  48. #define __RVT_TRACE_CQ_H
  49. #include <linux/tracepoint.h>
  50. #include <linux/trace_seq.h>
  51. #include <rdma/ib_verbs.h>
  52. #include <rdma/rdmavt_cq.h>
  53. #undef TRACE_SYSTEM
  54. #define TRACE_SYSTEM rvt_cq
  55. #define wc_opcode_name(opcode) { IB_WC_##opcode, #opcode }
  56. #define show_wc_opcode(opcode) \
  57. __print_symbolic(opcode, \
  58. wc_opcode_name(SEND), \
  59. wc_opcode_name(RDMA_WRITE), \
  60. wc_opcode_name(RDMA_READ), \
  61. wc_opcode_name(COMP_SWAP), \
  62. wc_opcode_name(FETCH_ADD), \
  63. wc_opcode_name(LSO), \
  64. wc_opcode_name(LOCAL_INV), \
  65. wc_opcode_name(REG_MR), \
  66. wc_opcode_name(MASKED_COMP_SWAP), \
  67. wc_opcode_name(RECV), \
  68. wc_opcode_name(RECV_RDMA_WITH_IMM))
  69. #define CQ_ATTR_PRINT \
  70. "[%s] user cq %s cqe %u comp_vector %d comp_vector_cpu %d flags %x"
  71. DECLARE_EVENT_CLASS(rvt_cq_template,
  72. TP_PROTO(struct rvt_cq *cq,
  73. const struct ib_cq_init_attr *attr),
  74. TP_ARGS(cq, attr),
  75. TP_STRUCT__entry(RDI_DEV_ENTRY(cq->rdi)
  76. __field(struct rvt_mmap_info *, ip)
  77. __field(unsigned int, cqe)
  78. __field(int, comp_vector)
  79. __field(int, comp_vector_cpu)
  80. __field(u32, flags)
  81. ),
  82. TP_fast_assign(RDI_DEV_ASSIGN(cq->rdi)
  83. __entry->ip = cq->ip;
  84. __entry->cqe = attr->cqe;
  85. __entry->comp_vector = attr->comp_vector;
  86. __entry->comp_vector_cpu =
  87. cq->comp_vector_cpu;
  88. __entry->flags = attr->flags;
  89. ),
  90. TP_printk(CQ_ATTR_PRINT, __get_str(dev),
  91. __entry->ip ? "true" : "false", __entry->cqe,
  92. __entry->comp_vector, __entry->comp_vector_cpu,
  93. __entry->flags
  94. )
  95. );
  96. DEFINE_EVENT(rvt_cq_template, rvt_create_cq,
  97. TP_PROTO(struct rvt_cq *cq, const struct ib_cq_init_attr *attr),
  98. TP_ARGS(cq, attr));
  99. #define CQ_PRN \
  100. "[%s] idx %u wr_id %llx status %u opcode %u,%s length %u qpn %x"
  101. DECLARE_EVENT_CLASS(
  102. rvt_cq_entry_template,
  103. TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
  104. TP_ARGS(cq, wc, idx),
  105. TP_STRUCT__entry(
  106. RDI_DEV_ENTRY(cq->rdi)
  107. __field(u64, wr_id)
  108. __field(u32, status)
  109. __field(u32, opcode)
  110. __field(u32, qpn)
  111. __field(u32, length)
  112. __field(u32, idx)
  113. ),
  114. TP_fast_assign(
  115. RDI_DEV_ASSIGN(cq->rdi)
  116. __entry->wr_id = wc->wr_id;
  117. __entry->status = wc->status;
  118. __entry->opcode = wc->opcode;
  119. __entry->length = wc->byte_len;
  120. __entry->qpn = wc->qp->qp_num;
  121. __entry->idx = idx;
  122. ),
  123. TP_printk(
  124. CQ_PRN,
  125. __get_str(dev),
  126. __entry->idx,
  127. __entry->wr_id,
  128. __entry->status,
  129. __entry->opcode, show_wc_opcode(__entry->opcode),
  130. __entry->length,
  131. __entry->qpn
  132. )
  133. );
  134. DEFINE_EVENT(
  135. rvt_cq_entry_template, rvt_cq_enter,
  136. TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
  137. TP_ARGS(cq, wc, idx));
  138. DEFINE_EVENT(
  139. rvt_cq_entry_template, rvt_cq_poll,
  140. TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx),
  141. TP_ARGS(cq, wc, idx));
  142. #endif /* __RVT_TRACE_CQ_H */
  143. #undef TRACE_INCLUDE_PATH
  144. #undef TRACE_INCLUDE_FILE
  145. #define TRACE_INCLUDE_PATH .
  146. #define TRACE_INCLUDE_FILE trace_cq
  147. #include <trace/define_trace.h>