gazel.c 16 KB

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  1. /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
  2. *
  3. * low level stuff for Gazel isdn cards
  4. *
  5. * Author BeWan Systems
  6. * based on source code from Karsten Keil
  7. * Copyright by BeWan Systems
  8. *
  9. * This software may be used and distributed according to the terms
  10. * of the GNU General Public License, incorporated herein by reference.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include "hisax.h"
  15. #include "isac.h"
  16. #include "hscx.h"
  17. #include "isdnl1.h"
  18. #include "ipac.h"
  19. #include <linux/pci.h>
  20. static const char *gazel_revision = "$Revision: 2.19.2.4 $";
  21. #define R647 1
  22. #define R685 2
  23. #define R753 3
  24. #define R742 4
  25. #define PLX_CNTRL 0x50 /* registre de controle PLX */
  26. #define RESET_GAZEL 0x4
  27. #define RESET_9050 0x40000000
  28. #define PLX_INCSR 0x4C /* registre d'IT du 9050 */
  29. #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
  30. #define INT_ISAC 0x20 /* 1 = IT isac en cours */
  31. #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
  32. #define INT_HSCX 0x4 /* 1 = IT hscx en cours */
  33. #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
  34. #define INT_IPAC_EN 0x3 /* enable IT ipac */
  35. #define byteout(addr, val) outb(val, addr)
  36. #define bytein(addr) inb(addr)
  37. static inline u_char
  38. readreg(unsigned int adr, u_short off)
  39. {
  40. return bytein(adr + off);
  41. }
  42. static inline void
  43. writereg(unsigned int adr, u_short off, u_char data)
  44. {
  45. byteout(adr + off, data);
  46. }
  47. static inline void
  48. read_fifo(unsigned int adr, u_char *data, int size)
  49. {
  50. insb(adr, data, size);
  51. }
  52. static void
  53. write_fifo(unsigned int adr, u_char *data, int size)
  54. {
  55. outsb(adr, data, size);
  56. }
  57. static inline u_char
  58. readreg_ipac(unsigned int adr, u_short off)
  59. {
  60. register u_char ret;
  61. byteout(adr, off);
  62. ret = bytein(adr + 4);
  63. return ret;
  64. }
  65. static inline void
  66. writereg_ipac(unsigned int adr, u_short off, u_char data)
  67. {
  68. byteout(adr, off);
  69. byteout(adr + 4, data);
  70. }
  71. static inline void
  72. read_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
  73. {
  74. byteout(adr, off);
  75. insb(adr + 4, data, size);
  76. }
  77. static void
  78. write_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
  79. {
  80. byteout(adr, off);
  81. outsb(adr + 4, data, size);
  82. }
  83. /* Interface functions */
  84. static u_char
  85. ReadISAC(struct IsdnCardState *cs, u_char offset)
  86. {
  87. u_short off2 = offset;
  88. switch (cs->subtyp) {
  89. case R647:
  90. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  91. /* fall through */
  92. case R685:
  93. return (readreg(cs->hw.gazel.isac, off2));
  94. case R753:
  95. case R742:
  96. return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
  97. }
  98. return 0;
  99. }
  100. static void
  101. WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
  102. {
  103. u_short off2 = offset;
  104. switch (cs->subtyp) {
  105. case R647:
  106. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  107. /* fall through */
  108. case R685:
  109. writereg(cs->hw.gazel.isac, off2, value);
  110. break;
  111. case R753:
  112. case R742:
  113. writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
  114. break;
  115. }
  116. }
  117. static void
  118. ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
  119. {
  120. switch (cs->subtyp) {
  121. case R647:
  122. case R685:
  123. read_fifo(cs->hw.gazel.isacfifo, data, size);
  124. break;
  125. case R753:
  126. case R742:
  127. read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
  128. break;
  129. }
  130. }
  131. static void
  132. WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
  133. {
  134. switch (cs->subtyp) {
  135. case R647:
  136. case R685:
  137. write_fifo(cs->hw.gazel.isacfifo, data, size);
  138. break;
  139. case R753:
  140. case R742:
  141. write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
  142. break;
  143. }
  144. }
  145. static void
  146. ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
  147. {
  148. switch (cs->subtyp) {
  149. case R647:
  150. case R685:
  151. read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
  152. break;
  153. case R753:
  154. case R742:
  155. read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
  156. break;
  157. }
  158. }
  159. static void
  160. WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
  161. {
  162. switch (cs->subtyp) {
  163. case R647:
  164. case R685:
  165. write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
  166. break;
  167. case R753:
  168. case R742:
  169. write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
  170. break;
  171. }
  172. }
  173. static u_char
  174. ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
  175. {
  176. u_short off2 = offset;
  177. switch (cs->subtyp) {
  178. case R647:
  179. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  180. /* fall through */
  181. case R685:
  182. return (readreg(cs->hw.gazel.hscx[hscx], off2));
  183. case R753:
  184. case R742:
  185. return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
  186. }
  187. return 0;
  188. }
  189. static void
  190. WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
  191. {
  192. u_short off2 = offset;
  193. switch (cs->subtyp) {
  194. case R647:
  195. off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
  196. /* fall through */
  197. case R685:
  198. writereg(cs->hw.gazel.hscx[hscx], off2, value);
  199. break;
  200. case R753:
  201. case R742:
  202. writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
  203. break;
  204. }
  205. }
  206. /*
  207. * fast interrupt HSCX stuff goes here
  208. */
  209. #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
  210. #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
  211. #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
  212. #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
  213. #include "hscx_irq.c"
  214. static irqreturn_t
  215. gazel_interrupt(int intno, void *dev_id)
  216. {
  217. #define MAXCOUNT 5
  218. struct IsdnCardState *cs = dev_id;
  219. u_char valisac, valhscx;
  220. int count = 0;
  221. u_long flags;
  222. spin_lock_irqsave(&cs->lock, flags);
  223. do {
  224. valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
  225. if (valhscx)
  226. hscx_int_main(cs, valhscx);
  227. valisac = ReadISAC(cs, ISAC_ISTA);
  228. if (valisac)
  229. isac_interrupt(cs, valisac);
  230. count++;
  231. } while ((valhscx || valisac) && (count < MAXCOUNT));
  232. WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
  233. WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
  234. WriteISAC(cs, ISAC_MASK, 0xFF);
  235. WriteISAC(cs, ISAC_MASK, 0x0);
  236. WriteHSCX(cs, 0, HSCX_MASK, 0x0);
  237. WriteHSCX(cs, 1, HSCX_MASK, 0x0);
  238. spin_unlock_irqrestore(&cs->lock, flags);
  239. return IRQ_HANDLED;
  240. }
  241. static irqreturn_t
  242. gazel_interrupt_ipac(int intno, void *dev_id)
  243. {
  244. struct IsdnCardState *cs = dev_id;
  245. u_char ista, val;
  246. int count = 0;
  247. u_long flags;
  248. spin_lock_irqsave(&cs->lock, flags);
  249. ista = ReadISAC(cs, IPAC_ISTA - 0x80);
  250. do {
  251. if (ista & 0x0f) {
  252. val = ReadHSCX(cs, 1, HSCX_ISTA);
  253. if (ista & 0x01)
  254. val |= 0x01;
  255. if (ista & 0x04)
  256. val |= 0x02;
  257. if (ista & 0x08)
  258. val |= 0x04;
  259. if (val) {
  260. hscx_int_main(cs, val);
  261. }
  262. }
  263. if (ista & 0x20) {
  264. val = 0xfe & ReadISAC(cs, ISAC_ISTA);
  265. if (val) {
  266. isac_interrupt(cs, val);
  267. }
  268. }
  269. if (ista & 0x10) {
  270. val = 0x01;
  271. isac_interrupt(cs, val);
  272. }
  273. ista = ReadISAC(cs, IPAC_ISTA - 0x80);
  274. count++;
  275. }
  276. while ((ista & 0x3f) && (count < MAXCOUNT));
  277. WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
  278. WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
  279. spin_unlock_irqrestore(&cs->lock, flags);
  280. return IRQ_HANDLED;
  281. }
  282. static void
  283. release_io_gazel(struct IsdnCardState *cs)
  284. {
  285. unsigned int i;
  286. switch (cs->subtyp) {
  287. case R647:
  288. for (i = 0x0000; i < 0xC000; i += 0x1000)
  289. release_region(i + cs->hw.gazel.hscx[0], 16);
  290. release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
  291. break;
  292. case R685:
  293. release_region(cs->hw.gazel.hscx[0], 0x100);
  294. release_region(cs->hw.gazel.cfg_reg, 0x80);
  295. break;
  296. case R753:
  297. release_region(cs->hw.gazel.ipac, 0x8);
  298. release_region(cs->hw.gazel.cfg_reg, 0x80);
  299. break;
  300. case R742:
  301. release_region(cs->hw.gazel.ipac, 8);
  302. break;
  303. }
  304. }
  305. static int
  306. reset_gazel(struct IsdnCardState *cs)
  307. {
  308. unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
  309. switch (cs->subtyp) {
  310. case R647:
  311. writereg(addr, 0, 0);
  312. HZDELAY(10);
  313. writereg(addr, 0, 1);
  314. HZDELAY(2);
  315. break;
  316. case R685:
  317. plxcntrl = inl(addr + PLX_CNTRL);
  318. plxcntrl |= (RESET_9050 + RESET_GAZEL);
  319. outl(plxcntrl, addr + PLX_CNTRL);
  320. plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
  321. HZDELAY(4);
  322. outl(plxcntrl, addr + PLX_CNTRL);
  323. HZDELAY(10);
  324. outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
  325. break;
  326. case R753:
  327. plxcntrl = inl(addr + PLX_CNTRL);
  328. plxcntrl |= (RESET_9050 + RESET_GAZEL);
  329. outl(plxcntrl, addr + PLX_CNTRL);
  330. plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
  331. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
  332. HZDELAY(4);
  333. outl(plxcntrl, addr + PLX_CNTRL);
  334. HZDELAY(10);
  335. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
  336. WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
  337. WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
  338. WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
  339. WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
  340. outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
  341. WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
  342. break;
  343. case R742:
  344. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
  345. HZDELAY(4);
  346. WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
  347. WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
  348. WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
  349. WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
  350. WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
  351. WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
  352. break;
  353. }
  354. return (0);
  355. }
  356. static int
  357. Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
  358. {
  359. u_long flags;
  360. switch (mt) {
  361. case CARD_RESET:
  362. spin_lock_irqsave(&cs->lock, flags);
  363. reset_gazel(cs);
  364. spin_unlock_irqrestore(&cs->lock, flags);
  365. return (0);
  366. case CARD_RELEASE:
  367. release_io_gazel(cs);
  368. return (0);
  369. case CARD_INIT:
  370. spin_lock_irqsave(&cs->lock, flags);
  371. inithscxisac(cs, 1);
  372. if ((cs->subtyp == R647) || (cs->subtyp == R685)) {
  373. int i;
  374. for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
  375. cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
  376. cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
  377. }
  378. }
  379. spin_unlock_irqrestore(&cs->lock, flags);
  380. return (0);
  381. case CARD_TEST:
  382. return (0);
  383. }
  384. return (0);
  385. }
  386. static int
  387. reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
  388. {
  389. unsigned int i, j, base = 0, adr = 0, len = 0;
  390. switch (cs->subtyp) {
  391. case R647:
  392. base = cs->hw.gazel.hscx[0];
  393. if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
  394. goto error;
  395. for (i = 0x0000; i < 0xC000; i += 0x1000) {
  396. if (!request_region(adr = (i + base), len = 16, "gazel"))
  397. goto error;
  398. }
  399. if (i != 0xC000) {
  400. for (j = 0; j < i; j += 0x1000)
  401. release_region(j + base, 16);
  402. release_region(0xC000 + base, 1);
  403. goto error;
  404. }
  405. break;
  406. case R685:
  407. if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
  408. goto error;
  409. if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
  410. release_region(cs->hw.gazel.hscx[0], 0x100);
  411. goto error;
  412. }
  413. break;
  414. case R753:
  415. if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
  416. goto error;
  417. if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
  418. release_region(cs->hw.gazel.ipac, 8);
  419. goto error;
  420. }
  421. break;
  422. case R742:
  423. if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
  424. goto error;
  425. break;
  426. }
  427. return 0;
  428. error:
  429. printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n",
  430. adr, adr + len);
  431. return 1;
  432. }
  433. static int setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
  434. {
  435. printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
  436. // we got an irq parameter, assume it is an ISA card
  437. // R742 decodes address even in not started...
  438. // R647 returns FF if not present or not started
  439. // eventually needs improvment
  440. if (readreg_ipac(card->para[1], IPAC_ID) == 1)
  441. cs->subtyp = R742;
  442. else
  443. cs->subtyp = R647;
  444. setup_isac(cs);
  445. cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
  446. cs->hw.gazel.ipac = card->para[1];
  447. cs->hw.gazel.isac = card->para[1] + 0x8000;
  448. cs->hw.gazel.hscx[0] = card->para[1];
  449. cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
  450. cs->irq = card->para[0];
  451. cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
  452. cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
  453. cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
  454. switch (cs->subtyp) {
  455. case R647:
  456. printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
  457. cs->dc.isac.adf2 = 0x87;
  458. printk(KERN_INFO
  459. "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
  460. cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
  461. printk(KERN_INFO
  462. "Gazel: hscx A:0x%X hscx B:0x%X\n",
  463. cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
  464. break;
  465. case R742:
  466. printk(KERN_INFO "Gazel: Card ISA R742 found\n");
  467. test_and_set_bit(HW_IPAC, &cs->HW_Flags);
  468. printk(KERN_INFO
  469. "Gazel: config irq:%d ipac:0x%X\n",
  470. cs->irq, cs->hw.gazel.ipac);
  471. break;
  472. }
  473. return (0);
  474. }
  475. #ifdef CONFIG_PCI
  476. static struct pci_dev *dev_tel = NULL;
  477. static int setup_gazelpci(struct IsdnCardState *cs)
  478. {
  479. u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
  480. u_char pci_irq = 0, found;
  481. u_int nbseek, seekcard;
  482. printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
  483. found = 0;
  484. seekcard = PCI_DEVICE_ID_PLX_R685;
  485. for (nbseek = 0; nbseek < 4; nbseek++) {
  486. if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
  487. seekcard, dev_tel))) {
  488. if (pci_enable_device(dev_tel))
  489. return 1;
  490. pci_irq = dev_tel->irq;
  491. pci_ioaddr0 = pci_resource_start(dev_tel, 1);
  492. pci_ioaddr1 = pci_resource_start(dev_tel, 2);
  493. found = 1;
  494. }
  495. if (found)
  496. break;
  497. else {
  498. switch (seekcard) {
  499. case PCI_DEVICE_ID_PLX_R685:
  500. seekcard = PCI_DEVICE_ID_PLX_R753;
  501. break;
  502. case PCI_DEVICE_ID_PLX_R753:
  503. seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
  504. break;
  505. case PCI_DEVICE_ID_PLX_DJINN_ITOO:
  506. seekcard = PCI_DEVICE_ID_PLX_OLITEC;
  507. break;
  508. }
  509. }
  510. }
  511. if (!found) {
  512. printk(KERN_WARNING "Gazel: No PCI card found\n");
  513. return (1);
  514. }
  515. if (!pci_irq) {
  516. printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
  517. return 1;
  518. }
  519. cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
  520. cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
  521. setup_isac(cs);
  522. pci_ioaddr1 &= 0xfffe;
  523. cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
  524. cs->hw.gazel.ipac = pci_ioaddr1;
  525. cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
  526. cs->hw.gazel.hscx[0] = pci_ioaddr1;
  527. cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
  528. cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
  529. cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
  530. cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
  531. cs->irq = pci_irq;
  532. cs->irq_flags |= IRQF_SHARED;
  533. switch (seekcard) {
  534. case PCI_DEVICE_ID_PLX_R685:
  535. printk(KERN_INFO "Gazel: Card PCI R685 found\n");
  536. cs->subtyp = R685;
  537. cs->dc.isac.adf2 = 0x87;
  538. printk(KERN_INFO
  539. "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
  540. cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
  541. printk(KERN_INFO
  542. "Gazel: hscx A:0x%X hscx B:0x%X\n",
  543. cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
  544. break;
  545. case PCI_DEVICE_ID_PLX_R753:
  546. case PCI_DEVICE_ID_PLX_DJINN_ITOO:
  547. case PCI_DEVICE_ID_PLX_OLITEC:
  548. printk(KERN_INFO "Gazel: Card PCI R753 found\n");
  549. cs->subtyp = R753;
  550. test_and_set_bit(HW_IPAC, &cs->HW_Flags);
  551. printk(KERN_INFO
  552. "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
  553. cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
  554. break;
  555. }
  556. return (0);
  557. }
  558. #endif /* CONFIG_PCI */
  559. int setup_gazel(struct IsdnCard *card)
  560. {
  561. struct IsdnCardState *cs = card->cs;
  562. char tmp[64];
  563. u_char val;
  564. strcpy(tmp, gazel_revision);
  565. printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
  566. if (cs->typ != ISDN_CTYPE_GAZEL)
  567. return (0);
  568. if (card->para[0]) {
  569. if (setup_gazelisa(card, cs))
  570. return (0);
  571. } else {
  572. #ifdef CONFIG_PCI
  573. if (setup_gazelpci(cs))
  574. return (0);
  575. #else
  576. printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
  577. return (0);
  578. #endif /* CONFIG_PCI */
  579. }
  580. if (reserve_regions(card, cs)) {
  581. return (0);
  582. }
  583. if (reset_gazel(cs)) {
  584. printk(KERN_WARNING "Gazel: wrong IRQ\n");
  585. release_io_gazel(cs);
  586. return (0);
  587. }
  588. cs->readisac = &ReadISAC;
  589. cs->writeisac = &WriteISAC;
  590. cs->readisacfifo = &ReadISACfifo;
  591. cs->writeisacfifo = &WriteISACfifo;
  592. cs->BC_Read_Reg = &ReadHSCX;
  593. cs->BC_Write_Reg = &WriteHSCX;
  594. cs->BC_Send_Data = &hscx_fill_fifo;
  595. cs->cardmsg = &Gazel_card_msg;
  596. switch (cs->subtyp) {
  597. case R647:
  598. case R685:
  599. cs->irq_func = &gazel_interrupt;
  600. ISACVersion(cs, "Gazel:");
  601. if (HscxVersion(cs, "Gazel:")) {
  602. printk(KERN_WARNING
  603. "Gazel: wrong HSCX versions check IO address\n");
  604. release_io_gazel(cs);
  605. return (0);
  606. }
  607. break;
  608. case R742:
  609. case R753:
  610. cs->irq_func = &gazel_interrupt_ipac;
  611. val = ReadISAC(cs, IPAC_ID - 0x80);
  612. printk(KERN_INFO "Gazel: IPAC version %x\n", val);
  613. break;
  614. }
  615. return (1);
  616. }