mt9v011.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  4. //
  5. // Copyright (c) 2009 Mauro Carvalho Chehab <mchehab@kernel.org>
  6. #include <linux/i2c.h>
  7. #include <linux/slab.h>
  8. #include <linux/videodev2.h>
  9. #include <linux/delay.h>
  10. #include <linux/module.h>
  11. #include <asm/div64.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-ctrls.h>
  14. #include <media/i2c/mt9v011.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab");
  17. MODULE_LICENSE("GPL v2");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. #define R00_MT9V011_CHIP_VERSION 0x00
  22. #define R01_MT9V011_ROWSTART 0x01
  23. #define R02_MT9V011_COLSTART 0x02
  24. #define R03_MT9V011_HEIGHT 0x03
  25. #define R04_MT9V011_WIDTH 0x04
  26. #define R05_MT9V011_HBLANK 0x05
  27. #define R06_MT9V011_VBLANK 0x06
  28. #define R07_MT9V011_OUT_CTRL 0x07
  29. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  30. #define R0A_MT9V011_CLK_SPEED 0x0a
  31. #define R0B_MT9V011_RESTART 0x0b
  32. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  33. #define R0D_MT9V011_RESET 0x0d
  34. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  35. #define R20_MT9V011_READ_MODE 0x20
  36. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  37. #define R2C_MT9V011_BLUE_GAIN 0x2c
  38. #define R2D_MT9V011_RED_GAIN 0x2d
  39. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  40. #define R35_MT9V011_GLOBAL_GAIN 0x35
  41. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  42. #define MT9V011_VERSION 0x8232
  43. #define MT9V011_REV_B_VERSION 0x8243
  44. struct mt9v011 {
  45. struct v4l2_subdev sd;
  46. #ifdef CONFIG_MEDIA_CONTROLLER
  47. struct media_pad pad;
  48. #endif
  49. struct v4l2_ctrl_handler ctrls;
  50. unsigned width, height;
  51. unsigned xtal;
  52. unsigned hflip:1;
  53. unsigned vflip:1;
  54. u16 global_gain, exposure;
  55. s16 red_bal, blue_bal;
  56. };
  57. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  58. {
  59. return container_of(sd, struct mt9v011, sd);
  60. }
  61. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  62. {
  63. struct i2c_client *c = v4l2_get_subdevdata(sd);
  64. __be16 buffer;
  65. int rc, val;
  66. rc = i2c_master_send(c, &addr, 1);
  67. if (rc != 1)
  68. v4l2_dbg(0, debug, sd,
  69. "i2c i/o error: rc == %d (should be 1)\n", rc);
  70. msleep(10);
  71. rc = i2c_master_recv(c, (char *)&buffer, 2);
  72. if (rc != 2)
  73. v4l2_dbg(0, debug, sd,
  74. "i2c i/o error: rc == %d (should be 2)\n", rc);
  75. val = be16_to_cpu(buffer);
  76. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  77. return val;
  78. }
  79. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  80. u16 value)
  81. {
  82. struct i2c_client *c = v4l2_get_subdevdata(sd);
  83. unsigned char buffer[3];
  84. int rc;
  85. buffer[0] = addr;
  86. buffer[1] = value >> 8;
  87. buffer[2] = value & 0xff;
  88. v4l2_dbg(2, debug, sd,
  89. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  90. rc = i2c_master_send(c, buffer, 3);
  91. if (rc != 3)
  92. v4l2_dbg(0, debug, sd,
  93. "i2c i/o error: rc == %d (should be 3)\n", rc);
  94. }
  95. struct i2c_reg_value {
  96. unsigned char reg;
  97. u16 value;
  98. };
  99. /*
  100. * Values used at the original driver
  101. * Some values are marked as Reserved at the datasheet
  102. */
  103. static const struct i2c_reg_value mt9v011_init_default[] = {
  104. { R0D_MT9V011_RESET, 0x0001 },
  105. { R0D_MT9V011_RESET, 0x0000 },
  106. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  107. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  108. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  109. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  110. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  111. };
  112. static u16 calc_mt9v011_gain(s16 lineargain)
  113. {
  114. u16 digitalgain = 0;
  115. u16 analogmult = 0;
  116. u16 analoginit = 0;
  117. if (lineargain < 0)
  118. lineargain = 0;
  119. /* recommended minimum */
  120. lineargain += 0x0020;
  121. if (lineargain > 2047)
  122. lineargain = 2047;
  123. if (lineargain > 1023) {
  124. digitalgain = 3;
  125. analogmult = 3;
  126. analoginit = lineargain / 16;
  127. } else if (lineargain > 511) {
  128. digitalgain = 1;
  129. analogmult = 3;
  130. analoginit = lineargain / 8;
  131. } else if (lineargain > 255) {
  132. analogmult = 3;
  133. analoginit = lineargain / 4;
  134. } else if (lineargain > 127) {
  135. analogmult = 1;
  136. analoginit = lineargain / 2;
  137. } else
  138. analoginit = lineargain;
  139. return analoginit + (analogmult << 7) + (digitalgain << 9);
  140. }
  141. static void set_balance(struct v4l2_subdev *sd)
  142. {
  143. struct mt9v011 *core = to_mt9v011(sd);
  144. u16 green_gain, blue_gain, red_gain;
  145. u16 exposure;
  146. s16 bal;
  147. exposure = core->exposure;
  148. green_gain = calc_mt9v011_gain(core->global_gain);
  149. bal = core->global_gain;
  150. bal += (core->blue_bal * core->global_gain / (1 << 7));
  151. blue_gain = calc_mt9v011_gain(bal);
  152. bal = core->global_gain;
  153. bal += (core->red_bal * core->global_gain / (1 << 7));
  154. red_gain = calc_mt9v011_gain(bal);
  155. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  156. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  157. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  158. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  159. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  160. }
  161. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  162. {
  163. struct mt9v011 *core = to_mt9v011(sd);
  164. unsigned height, width, hblank, vblank, speed;
  165. unsigned row_time, t_time;
  166. u64 frames_per_ms;
  167. unsigned tmp;
  168. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  169. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  170. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  171. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  172. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  173. row_time = (width + 113 + hblank) * (speed + 2);
  174. t_time = row_time * (height + vblank + 1);
  175. frames_per_ms = core->xtal * 1000l;
  176. do_div(frames_per_ms, t_time);
  177. tmp = frames_per_ms;
  178. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  179. tmp / 1000, tmp % 1000, t_time);
  180. if (numerator && denominator) {
  181. *numerator = 1000;
  182. *denominator = (u32)frames_per_ms;
  183. }
  184. }
  185. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  186. {
  187. struct mt9v011 *core = to_mt9v011(sd);
  188. unsigned height, width, hblank, vblank;
  189. unsigned row_time, line_time;
  190. u64 t_time, speed;
  191. /* Avoid bogus calculus */
  192. if (!numerator || !denominator)
  193. return 0;
  194. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  195. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  196. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  197. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  198. row_time = width + 113 + hblank;
  199. line_time = height + vblank + 1;
  200. t_time = core->xtal * ((u64)numerator);
  201. /* round to the closest value */
  202. t_time += denominator / 2;
  203. do_div(t_time, denominator);
  204. speed = t_time;
  205. do_div(speed, row_time * line_time);
  206. /* Avoid having a negative value for speed */
  207. if (speed < 2)
  208. speed = 0;
  209. else
  210. speed -= 2;
  211. /* Avoid speed overflow */
  212. if (speed > 15)
  213. return 15;
  214. return (u16)speed;
  215. }
  216. static void set_res(struct v4l2_subdev *sd)
  217. {
  218. struct mt9v011 *core = to_mt9v011(sd);
  219. unsigned vstart, hstart;
  220. /*
  221. * The mt9v011 doesn't have scaling. So, in order to select the desired
  222. * resolution, we're cropping at the middle of the sensor.
  223. * hblank and vblank should be adjusted, in order to warrant that
  224. * we'll preserve the line timings for 30 fps, no matter what resolution
  225. * is selected.
  226. * NOTE: datasheet says that width (and height) should be filled with
  227. * width-1. However, this doesn't work, since one pixel per line will
  228. * be missing.
  229. */
  230. hstart = 20 + (640 - core->width) / 2;
  231. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  232. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  233. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  234. vstart = 8 + (480 - core->height) / 2;
  235. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  236. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  237. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  238. calc_fps(sd, NULL, NULL);
  239. };
  240. static void set_read_mode(struct v4l2_subdev *sd)
  241. {
  242. struct mt9v011 *core = to_mt9v011(sd);
  243. unsigned mode = 0x1000;
  244. if (core->hflip)
  245. mode |= 0x4000;
  246. if (core->vflip)
  247. mode |= 0x8000;
  248. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  249. }
  250. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  251. {
  252. int i;
  253. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  254. mt9v011_write(sd, mt9v011_init_default[i].reg,
  255. mt9v011_init_default[i].value);
  256. set_balance(sd);
  257. set_res(sd);
  258. set_read_mode(sd);
  259. return 0;
  260. }
  261. static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd,
  262. struct v4l2_subdev_pad_config *cfg,
  263. struct v4l2_subdev_mbus_code_enum *code)
  264. {
  265. if (code->pad || code->index > 0)
  266. return -EINVAL;
  267. code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
  268. return 0;
  269. }
  270. static int mt9v011_set_fmt(struct v4l2_subdev *sd,
  271. struct v4l2_subdev_pad_config *cfg,
  272. struct v4l2_subdev_format *format)
  273. {
  274. struct v4l2_mbus_framefmt *fmt = &format->format;
  275. struct mt9v011 *core = to_mt9v011(sd);
  276. if (format->pad || fmt->code != MEDIA_BUS_FMT_SGRBG8_1X8)
  277. return -EINVAL;
  278. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  279. &fmt->height, 32, 480, 1, 0);
  280. fmt->field = V4L2_FIELD_NONE;
  281. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  282. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  283. core->width = fmt->width;
  284. core->height = fmt->height;
  285. set_res(sd);
  286. } else {
  287. cfg->try_fmt = *fmt;
  288. }
  289. return 0;
  290. }
  291. static int mt9v011_g_frame_interval(struct v4l2_subdev *sd,
  292. struct v4l2_subdev_frame_interval *ival)
  293. {
  294. calc_fps(sd,
  295. &ival->interval.numerator,
  296. &ival->interval.denominator);
  297. return 0;
  298. }
  299. static int mt9v011_s_frame_interval(struct v4l2_subdev *sd,
  300. struct v4l2_subdev_frame_interval *ival)
  301. {
  302. struct v4l2_fract *tpf = &ival->interval;
  303. u16 speed;
  304. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  305. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  306. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  307. /* Recalculate and update fps info */
  308. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  309. return 0;
  310. }
  311. #ifdef CONFIG_VIDEO_ADV_DEBUG
  312. static int mt9v011_g_register(struct v4l2_subdev *sd,
  313. struct v4l2_dbg_register *reg)
  314. {
  315. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  316. reg->size = 2;
  317. return 0;
  318. }
  319. static int mt9v011_s_register(struct v4l2_subdev *sd,
  320. const struct v4l2_dbg_register *reg)
  321. {
  322. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  323. return 0;
  324. }
  325. #endif
  326. static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
  327. {
  328. struct mt9v011 *core =
  329. container_of(ctrl->handler, struct mt9v011, ctrls);
  330. struct v4l2_subdev *sd = &core->sd;
  331. switch (ctrl->id) {
  332. case V4L2_CID_GAIN:
  333. core->global_gain = ctrl->val;
  334. break;
  335. case V4L2_CID_EXPOSURE:
  336. core->exposure = ctrl->val;
  337. break;
  338. case V4L2_CID_RED_BALANCE:
  339. core->red_bal = ctrl->val;
  340. break;
  341. case V4L2_CID_BLUE_BALANCE:
  342. core->blue_bal = ctrl->val;
  343. break;
  344. case V4L2_CID_HFLIP:
  345. core->hflip = ctrl->val;
  346. set_read_mode(sd);
  347. return 0;
  348. case V4L2_CID_VFLIP:
  349. core->vflip = ctrl->val;
  350. set_read_mode(sd);
  351. return 0;
  352. default:
  353. return -EINVAL;
  354. }
  355. set_balance(sd);
  356. return 0;
  357. }
  358. static const struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
  359. .s_ctrl = mt9v011_s_ctrl,
  360. };
  361. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  362. .reset = mt9v011_reset,
  363. #ifdef CONFIG_VIDEO_ADV_DEBUG
  364. .g_register = mt9v011_g_register,
  365. .s_register = mt9v011_s_register,
  366. #endif
  367. };
  368. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  369. .g_frame_interval = mt9v011_g_frame_interval,
  370. .s_frame_interval = mt9v011_s_frame_interval,
  371. };
  372. static const struct v4l2_subdev_pad_ops mt9v011_pad_ops = {
  373. .enum_mbus_code = mt9v011_enum_mbus_code,
  374. .set_fmt = mt9v011_set_fmt,
  375. };
  376. static const struct v4l2_subdev_ops mt9v011_ops = {
  377. .core = &mt9v011_core_ops,
  378. .video = &mt9v011_video_ops,
  379. .pad = &mt9v011_pad_ops,
  380. };
  381. /****************************************************************************
  382. I2C Client & Driver
  383. ****************************************************************************/
  384. static int mt9v011_probe(struct i2c_client *c,
  385. const struct i2c_device_id *id)
  386. {
  387. u16 version;
  388. struct mt9v011 *core;
  389. struct v4l2_subdev *sd;
  390. #ifdef CONFIG_MEDIA_CONTROLLER
  391. int ret;
  392. #endif
  393. /* Check if the adapter supports the needed features */
  394. if (!i2c_check_functionality(c->adapter,
  395. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  396. return -EIO;
  397. core = devm_kzalloc(&c->dev, sizeof(struct mt9v011), GFP_KERNEL);
  398. if (!core)
  399. return -ENOMEM;
  400. sd = &core->sd;
  401. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  402. #ifdef CONFIG_MEDIA_CONTROLLER
  403. core->pad.flags = MEDIA_PAD_FL_SOURCE;
  404. sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
  405. ret = media_entity_pads_init(&sd->entity, 1, &core->pad);
  406. if (ret < 0)
  407. return ret;
  408. #endif
  409. /* Check if the sensor is really a MT9V011 */
  410. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  411. if ((version != MT9V011_VERSION) &&
  412. (version != MT9V011_REV_B_VERSION)) {
  413. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  414. version);
  415. return -EINVAL;
  416. }
  417. v4l2_ctrl_handler_init(&core->ctrls, 5);
  418. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  419. V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
  420. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  421. V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
  422. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  423. V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  424. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  425. V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  426. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  427. V4L2_CID_HFLIP, 0, 1, 1, 0);
  428. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  429. V4L2_CID_VFLIP, 0, 1, 1, 0);
  430. if (core->ctrls.error) {
  431. int ret = core->ctrls.error;
  432. v4l2_err(sd, "control initialization error %d\n", ret);
  433. v4l2_ctrl_handler_free(&core->ctrls);
  434. return ret;
  435. }
  436. core->sd.ctrl_handler = &core->ctrls;
  437. core->global_gain = 0x0024;
  438. core->exposure = 0x01fc;
  439. core->width = 640;
  440. core->height = 480;
  441. core->xtal = 27000000; /* Hz */
  442. if (c->dev.platform_data) {
  443. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  444. core->xtal = pdata->xtal;
  445. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  446. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  447. }
  448. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  449. c->addr << 1, c->adapter->name, version);
  450. return 0;
  451. }
  452. static int mt9v011_remove(struct i2c_client *c)
  453. {
  454. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  455. struct mt9v011 *core = to_mt9v011(sd);
  456. v4l2_dbg(1, debug, sd,
  457. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  458. c->addr << 1);
  459. v4l2_device_unregister_subdev(sd);
  460. v4l2_ctrl_handler_free(&core->ctrls);
  461. return 0;
  462. }
  463. /* ----------------------------------------------------------------------- */
  464. static const struct i2c_device_id mt9v011_id[] = {
  465. { "mt9v011", 0 },
  466. { }
  467. };
  468. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  469. static struct i2c_driver mt9v011_driver = {
  470. .driver = {
  471. .name = "mt9v011",
  472. },
  473. .probe = mt9v011_probe,
  474. .remove = mt9v011_remove,
  475. .id_table = mt9v011_id,
  476. };
  477. module_i2c_driver(mt9v011_driver);