mtk-smi.c 11 KB

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  1. /*
  2. * Copyright (c) 2015-2016 MediaTek Inc.
  3. * Author: Yong Wu <yong.wu@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/component.h>
  16. #include <linux/device.h>
  17. #include <linux/err.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <soc/mediatek/smi.h>
  25. #include <dt-bindings/memory/mt2701-larb-port.h>
  26. /* mt8173 */
  27. #define SMI_LARB_MMU_EN 0xf00
  28. /* mt2701 */
  29. #define REG_SMI_SECUR_CON_BASE 0x5c0
  30. /* every register control 8 port, register offset 0x4 */
  31. #define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
  32. #define REG_SMI_SECUR_CON_ADDR(id) \
  33. (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
  34. /*
  35. * every port have 4 bit to control, bit[port + 3] control virtual or physical,
  36. * bit[port + 2 : port + 1] control the domain, bit[port] control the security
  37. * or non-security.
  38. */
  39. #define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
  40. #define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
  41. /* mt2701 domain should be set to 3 */
  42. #define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
  43. /* mt2712 */
  44. #define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))
  45. #define F_MMU_EN BIT(0)
  46. struct mtk_smi_larb_gen {
  47. bool need_larbid;
  48. int port_in_larb[MTK_LARB_NR_MAX + 1];
  49. void (*config_port)(struct device *);
  50. };
  51. struct mtk_smi {
  52. struct device *dev;
  53. struct clk *clk_apb, *clk_smi;
  54. struct clk *clk_async; /*only needed by mt2701*/
  55. void __iomem *smi_ao_base;
  56. };
  57. struct mtk_smi_larb { /* larb: local arbiter */
  58. struct mtk_smi smi;
  59. void __iomem *base;
  60. struct device *smi_common_dev;
  61. const struct mtk_smi_larb_gen *larb_gen;
  62. int larbid;
  63. u32 *mmu;
  64. };
  65. enum mtk_smi_gen {
  66. MTK_SMI_GEN1,
  67. MTK_SMI_GEN2
  68. };
  69. static int mtk_smi_enable(const struct mtk_smi *smi)
  70. {
  71. int ret;
  72. ret = pm_runtime_get_sync(smi->dev);
  73. if (ret < 0)
  74. return ret;
  75. ret = clk_prepare_enable(smi->clk_apb);
  76. if (ret)
  77. goto err_put_pm;
  78. ret = clk_prepare_enable(smi->clk_smi);
  79. if (ret)
  80. goto err_disable_apb;
  81. return 0;
  82. err_disable_apb:
  83. clk_disable_unprepare(smi->clk_apb);
  84. err_put_pm:
  85. pm_runtime_put_sync(smi->dev);
  86. return ret;
  87. }
  88. static void mtk_smi_disable(const struct mtk_smi *smi)
  89. {
  90. clk_disable_unprepare(smi->clk_smi);
  91. clk_disable_unprepare(smi->clk_apb);
  92. pm_runtime_put_sync(smi->dev);
  93. }
  94. int mtk_smi_larb_get(struct device *larbdev)
  95. {
  96. struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
  97. const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
  98. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  99. int ret;
  100. /* Enable the smi-common's power and clocks */
  101. ret = mtk_smi_enable(common);
  102. if (ret)
  103. return ret;
  104. /* Enable the larb's power and clocks */
  105. ret = mtk_smi_enable(&larb->smi);
  106. if (ret) {
  107. mtk_smi_disable(common);
  108. return ret;
  109. }
  110. /* Configure the iommu info for this larb */
  111. larb_gen->config_port(larbdev);
  112. return 0;
  113. }
  114. EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
  115. void mtk_smi_larb_put(struct device *larbdev)
  116. {
  117. struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
  118. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  119. /*
  120. * Don't de-configure the iommu info for this larb since there may be
  121. * several modules in this larb.
  122. * The iommu info will be reset after power off.
  123. */
  124. mtk_smi_disable(&larb->smi);
  125. mtk_smi_disable(common);
  126. }
  127. EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
  128. static int
  129. mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
  130. {
  131. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  132. struct mtk_smi_iommu *smi_iommu = data;
  133. unsigned int i;
  134. if (larb->larb_gen->need_larbid) {
  135. larb->mmu = &smi_iommu->larb_imu[larb->larbid].mmu;
  136. return 0;
  137. }
  138. /*
  139. * If there is no larbid property, Loop to find the corresponding
  140. * iommu information.
  141. */
  142. for (i = 0; i < smi_iommu->larb_nr; i++) {
  143. if (dev == smi_iommu->larb_imu[i].dev) {
  144. /* The 'mmu' may be updated in iommu-attach/detach. */
  145. larb->mmu = &smi_iommu->larb_imu[i].mmu;
  146. return 0;
  147. }
  148. }
  149. return -ENODEV;
  150. }
  151. static void mtk_smi_larb_config_port_mt2712(struct device *dev)
  152. {
  153. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  154. u32 reg;
  155. int i;
  156. /*
  157. * larb 8/9 is the bdpsys larb, the iommu_en is enabled defaultly.
  158. * Don't need to set it again.
  159. */
  160. if (larb->larbid == 8 || larb->larbid == 9)
  161. return;
  162. for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
  163. reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
  164. reg |= F_MMU_EN;
  165. writel(reg, larb->base + SMI_LARB_NONSEC_CON(i));
  166. }
  167. }
  168. static void mtk_smi_larb_config_port_mt8173(struct device *dev)
  169. {
  170. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  171. writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
  172. }
  173. static void mtk_smi_larb_config_port_gen1(struct device *dev)
  174. {
  175. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  176. const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
  177. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  178. int i, m4u_port_id, larb_port_num;
  179. u32 sec_con_val, reg_val;
  180. m4u_port_id = larb_gen->port_in_larb[larb->larbid];
  181. larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
  182. - larb_gen->port_in_larb[larb->larbid];
  183. for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
  184. if (*larb->mmu & BIT(i)) {
  185. /* bit[port + 3] controls the virtual or physical */
  186. sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
  187. } else {
  188. /* do not need to enable m4u for this port */
  189. continue;
  190. }
  191. reg_val = readl(common->smi_ao_base
  192. + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
  193. reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
  194. reg_val |= sec_con_val;
  195. reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
  196. writel(reg_val,
  197. common->smi_ao_base
  198. + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
  199. }
  200. }
  201. static void
  202. mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
  203. {
  204. /* Do nothing as the iommu is always enabled. */
  205. }
  206. static const struct component_ops mtk_smi_larb_component_ops = {
  207. .bind = mtk_smi_larb_bind,
  208. .unbind = mtk_smi_larb_unbind,
  209. };
  210. static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
  211. /* mt8173 do not need the port in larb */
  212. .config_port = mtk_smi_larb_config_port_mt8173,
  213. };
  214. static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
  215. .need_larbid = true,
  216. .port_in_larb = {
  217. LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
  218. LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
  219. },
  220. .config_port = mtk_smi_larb_config_port_gen1,
  221. };
  222. static const struct mtk_smi_larb_gen mtk_smi_larb_mt2712 = {
  223. .need_larbid = true,
  224. .config_port = mtk_smi_larb_config_port_mt2712,
  225. };
  226. static const struct of_device_id mtk_smi_larb_of_ids[] = {
  227. {
  228. .compatible = "mediatek,mt8173-smi-larb",
  229. .data = &mtk_smi_larb_mt8173
  230. },
  231. {
  232. .compatible = "mediatek,mt2701-smi-larb",
  233. .data = &mtk_smi_larb_mt2701
  234. },
  235. {
  236. .compatible = "mediatek,mt2712-smi-larb",
  237. .data = &mtk_smi_larb_mt2712
  238. },
  239. {}
  240. };
  241. static int mtk_smi_larb_probe(struct platform_device *pdev)
  242. {
  243. struct mtk_smi_larb *larb;
  244. struct resource *res;
  245. struct device *dev = &pdev->dev;
  246. struct device_node *smi_node;
  247. struct platform_device *smi_pdev;
  248. int err;
  249. larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
  250. if (!larb)
  251. return -ENOMEM;
  252. larb->larb_gen = of_device_get_match_data(dev);
  253. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  254. larb->base = devm_ioremap_resource(dev, res);
  255. if (IS_ERR(larb->base))
  256. return PTR_ERR(larb->base);
  257. larb->smi.clk_apb = devm_clk_get(dev, "apb");
  258. if (IS_ERR(larb->smi.clk_apb))
  259. return PTR_ERR(larb->smi.clk_apb);
  260. larb->smi.clk_smi = devm_clk_get(dev, "smi");
  261. if (IS_ERR(larb->smi.clk_smi))
  262. return PTR_ERR(larb->smi.clk_smi);
  263. larb->smi.dev = dev;
  264. if (larb->larb_gen->need_larbid) {
  265. err = of_property_read_u32(dev->of_node, "mediatek,larb-id",
  266. &larb->larbid);
  267. if (err) {
  268. dev_err(dev, "missing larbid property\n");
  269. return err;
  270. }
  271. }
  272. smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
  273. if (!smi_node)
  274. return -EINVAL;
  275. smi_pdev = of_find_device_by_node(smi_node);
  276. of_node_put(smi_node);
  277. if (smi_pdev) {
  278. if (!platform_get_drvdata(smi_pdev))
  279. return -EPROBE_DEFER;
  280. larb->smi_common_dev = &smi_pdev->dev;
  281. } else {
  282. dev_err(dev, "Failed to get the smi_common device\n");
  283. return -EINVAL;
  284. }
  285. pm_runtime_enable(dev);
  286. platform_set_drvdata(pdev, larb);
  287. return component_add(dev, &mtk_smi_larb_component_ops);
  288. }
  289. static int mtk_smi_larb_remove(struct platform_device *pdev)
  290. {
  291. pm_runtime_disable(&pdev->dev);
  292. component_del(&pdev->dev, &mtk_smi_larb_component_ops);
  293. return 0;
  294. }
  295. static struct platform_driver mtk_smi_larb_driver = {
  296. .probe = mtk_smi_larb_probe,
  297. .remove = mtk_smi_larb_remove,
  298. .driver = {
  299. .name = "mtk-smi-larb",
  300. .of_match_table = mtk_smi_larb_of_ids,
  301. }
  302. };
  303. static const struct of_device_id mtk_smi_common_of_ids[] = {
  304. {
  305. .compatible = "mediatek,mt8173-smi-common",
  306. .data = (void *)MTK_SMI_GEN2
  307. },
  308. {
  309. .compatible = "mediatek,mt2701-smi-common",
  310. .data = (void *)MTK_SMI_GEN1
  311. },
  312. {
  313. .compatible = "mediatek,mt2712-smi-common",
  314. .data = (void *)MTK_SMI_GEN2
  315. },
  316. {}
  317. };
  318. static int mtk_smi_common_probe(struct platform_device *pdev)
  319. {
  320. struct device *dev = &pdev->dev;
  321. struct mtk_smi *common;
  322. struct resource *res;
  323. enum mtk_smi_gen smi_gen;
  324. int ret;
  325. common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
  326. if (!common)
  327. return -ENOMEM;
  328. common->dev = dev;
  329. common->clk_apb = devm_clk_get(dev, "apb");
  330. if (IS_ERR(common->clk_apb))
  331. return PTR_ERR(common->clk_apb);
  332. common->clk_smi = devm_clk_get(dev, "smi");
  333. if (IS_ERR(common->clk_smi))
  334. return PTR_ERR(common->clk_smi);
  335. /*
  336. * for mtk smi gen 1, we need to get the ao(always on) base to config
  337. * m4u port, and we need to enable the aync clock for transform the smi
  338. * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
  339. * base.
  340. */
  341. smi_gen = (enum mtk_smi_gen)of_device_get_match_data(dev);
  342. if (smi_gen == MTK_SMI_GEN1) {
  343. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  344. common->smi_ao_base = devm_ioremap_resource(dev, res);
  345. if (IS_ERR(common->smi_ao_base))
  346. return PTR_ERR(common->smi_ao_base);
  347. common->clk_async = devm_clk_get(dev, "async");
  348. if (IS_ERR(common->clk_async))
  349. return PTR_ERR(common->clk_async);
  350. ret = clk_prepare_enable(common->clk_async);
  351. if (ret)
  352. return ret;
  353. }
  354. pm_runtime_enable(dev);
  355. platform_set_drvdata(pdev, common);
  356. return 0;
  357. }
  358. static int mtk_smi_common_remove(struct platform_device *pdev)
  359. {
  360. pm_runtime_disable(&pdev->dev);
  361. return 0;
  362. }
  363. static struct platform_driver mtk_smi_common_driver = {
  364. .probe = mtk_smi_common_probe,
  365. .remove = mtk_smi_common_remove,
  366. .driver = {
  367. .name = "mtk-smi-common",
  368. .of_match_table = mtk_smi_common_of_ids,
  369. }
  370. };
  371. static int __init mtk_smi_init(void)
  372. {
  373. int ret;
  374. ret = platform_driver_register(&mtk_smi_common_driver);
  375. if (ret != 0) {
  376. pr_err("Failed to register SMI driver\n");
  377. return ret;
  378. }
  379. ret = platform_driver_register(&mtk_smi_larb_driver);
  380. if (ret != 0) {
  381. pr_err("Failed to register SMI-LARB driver\n");
  382. goto err_unreg_smi;
  383. }
  384. return ret;
  385. err_unreg_smi:
  386. platform_driver_unregister(&mtk_smi_common_driver);
  387. return ret;
  388. }
  389. module_init(mtk_smi_init);