cavium-thunderx.c 4.8 KB

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  1. /*
  2. * Driver for MMC and SSD cards for Cavium ThunderX SOCs.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2016 Cavium Inc.
  9. */
  10. #include <linux/device.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/mmc/mmc.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/pci.h>
  18. #include "cavium.h"
  19. static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
  20. {
  21. down(&host->mmc_serializer);
  22. }
  23. static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
  24. {
  25. up(&host->mmc_serializer);
  26. }
  27. static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
  28. {
  29. writeq(val, host->base + MIO_EMM_INT(host));
  30. writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
  31. }
  32. static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
  33. struct pci_dev *pdev)
  34. {
  35. int nvec, ret, i;
  36. nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
  37. if (nvec < 0)
  38. return nvec;
  39. /* register interrupts */
  40. for (i = 0; i < nvec; i++) {
  41. ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
  42. cvm_mmc_interrupt,
  43. 0, cvm_mmc_irq_names[i], host);
  44. if (ret)
  45. return ret;
  46. }
  47. return 0;
  48. }
  49. static int thunder_mmc_probe(struct pci_dev *pdev,
  50. const struct pci_device_id *id)
  51. {
  52. struct device_node *node = pdev->dev.of_node;
  53. struct device *dev = &pdev->dev;
  54. struct device_node *child_node;
  55. struct cvm_mmc_host *host;
  56. int ret, i = 0;
  57. host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
  58. if (!host)
  59. return -ENOMEM;
  60. pci_set_drvdata(pdev, host);
  61. ret = pcim_enable_device(pdev);
  62. if (ret)
  63. return ret;
  64. ret = pci_request_regions(pdev, KBUILD_MODNAME);
  65. if (ret)
  66. return ret;
  67. host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
  68. if (!host->base)
  69. return -EINVAL;
  70. /* On ThunderX these are identical */
  71. host->dma_base = host->base;
  72. host->reg_off = 0x2000;
  73. host->reg_off_dma = 0x160;
  74. host->clk = devm_clk_get(dev, NULL);
  75. if (IS_ERR(host->clk))
  76. return PTR_ERR(host->clk);
  77. ret = clk_prepare_enable(host->clk);
  78. if (ret)
  79. return ret;
  80. host->sys_freq = clk_get_rate(host->clk);
  81. spin_lock_init(&host->irq_handler_lock);
  82. sema_init(&host->mmc_serializer, 1);
  83. host->dev = dev;
  84. host->acquire_bus = thunder_mmc_acquire_bus;
  85. host->release_bus = thunder_mmc_release_bus;
  86. host->int_enable = thunder_mmc_int_enable;
  87. host->use_sg = true;
  88. host->big_dma_addr = true;
  89. host->need_irq_handler_lock = true;
  90. host->last_slot = -1;
  91. ret = dma_set_mask(dev, DMA_BIT_MASK(48));
  92. if (ret)
  93. goto error;
  94. /*
  95. * Clear out any pending interrupts that may be left over from
  96. * bootloader. Writing 1 to the bits clears them.
  97. */
  98. writeq(127, host->base + MIO_EMM_INT_EN(host));
  99. writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
  100. /* Clear DMA FIFO */
  101. writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));
  102. ret = thunder_mmc_register_interrupts(host, pdev);
  103. if (ret)
  104. goto error;
  105. for_each_child_of_node(node, child_node) {
  106. /*
  107. * mmc_of_parse and devm* require one device per slot.
  108. * Create a dummy device per slot and set the node pointer to
  109. * the slot. The easiest way to get this is using
  110. * of_platform_device_create.
  111. */
  112. if (of_device_is_compatible(child_node, "mmc-slot")) {
  113. host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
  114. &pdev->dev);
  115. if (!host->slot_pdev[i])
  116. continue;
  117. ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
  118. if (ret)
  119. goto error;
  120. }
  121. i++;
  122. }
  123. dev_info(dev, "probed\n");
  124. return 0;
  125. error:
  126. for (i = 0; i < CAVIUM_MAX_MMC; i++) {
  127. if (host->slot[i])
  128. cvm_mmc_of_slot_remove(host->slot[i]);
  129. if (host->slot_pdev[i]) {
  130. get_device(&host->slot_pdev[i]->dev);
  131. of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL);
  132. put_device(&host->slot_pdev[i]->dev);
  133. }
  134. }
  135. clk_disable_unprepare(host->clk);
  136. return ret;
  137. }
  138. static void thunder_mmc_remove(struct pci_dev *pdev)
  139. {
  140. struct cvm_mmc_host *host = pci_get_drvdata(pdev);
  141. u64 dma_cfg;
  142. int i;
  143. for (i = 0; i < CAVIUM_MAX_MMC; i++)
  144. if (host->slot[i])
  145. cvm_mmc_of_slot_remove(host->slot[i]);
  146. dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
  147. dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
  148. writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
  149. clk_disable_unprepare(host->clk);
  150. }
  151. static const struct pci_device_id thunder_mmc_id_table[] = {
  152. { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
  153. { 0, } /* end of table */
  154. };
  155. static struct pci_driver thunder_mmc_driver = {
  156. .name = KBUILD_MODNAME,
  157. .id_table = thunder_mmc_id_table,
  158. .probe = thunder_mmc_probe,
  159. .remove = thunder_mmc_remove,
  160. };
  161. module_pci_driver(thunder_mmc_driver);
  162. MODULE_AUTHOR("Cavium Inc.");
  163. MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
  164. MODULE_LICENSE("GPL");
  165. MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);