rtsx_usb_sdmmc.c 36 KB

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  1. /* Realtek USB SD/MMC Card Interface driver
  2. *
  3. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along
  15. * with this program; if not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * Author:
  18. * Roger Tseng <rogerable@realtek.com>
  19. */
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/usb.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/mmc/mmc.h>
  27. #include <linux/mmc/sd.h>
  28. #include <linux/mmc/card.h>
  29. #include <linux/scatterlist.h>
  30. #include <linux/pm_runtime.h>
  31. #include <linux/rtsx_usb.h>
  32. #include <asm/unaligned.h>
  33. #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  34. defined(CONFIG_MMC_REALTEK_USB_MODULE))
  35. #include <linux/leds.h>
  36. #include <linux/workqueue.h>
  37. #define RTSX_USB_USE_LEDS_CLASS
  38. #endif
  39. struct rtsx_usb_sdmmc {
  40. struct platform_device *pdev;
  41. struct rtsx_ucr *ucr;
  42. struct mmc_host *mmc;
  43. struct mmc_request *mrq;
  44. struct mutex host_mutex;
  45. u8 ssc_depth;
  46. unsigned int clock;
  47. bool vpclk;
  48. bool double_clk;
  49. bool host_removal;
  50. bool card_exist;
  51. bool initial_mode;
  52. bool ddr_mode;
  53. unsigned char power_mode;
  54. #ifdef RTSX_USB_USE_LEDS_CLASS
  55. struct led_classdev led;
  56. char led_name[32];
  57. struct work_struct led_work;
  58. #endif
  59. };
  60. static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
  61. {
  62. return &(host->pdev->dev);
  63. }
  64. static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
  65. {
  66. struct rtsx_ucr *ucr = host->ucr;
  67. rtsx_usb_ep0_write_register(ucr, CARD_STOP,
  68. SD_STOP | SD_CLR_ERR,
  69. SD_STOP | SD_CLR_ERR);
  70. rtsx_usb_clear_dma_err(ucr);
  71. rtsx_usb_clear_fsm_err(ucr);
  72. }
  73. #ifdef DEBUG
  74. static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
  75. {
  76. struct rtsx_ucr *ucr = host->ucr;
  77. u8 val = 0;
  78. rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
  79. dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
  80. rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
  81. dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
  82. rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
  83. dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
  84. }
  85. #else
  86. #define sd_print_debug_regs(host)
  87. #endif /* DEBUG */
  88. static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  89. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  90. {
  91. struct rtsx_ucr *ucr = host->ucr;
  92. int err;
  93. u8 trans_mode;
  94. if (!buf)
  95. buf_len = 0;
  96. rtsx_usb_init_cmd(ucr);
  97. if (cmd != NULL) {
  98. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
  99. , cmd->opcode);
  100. if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
  101. trans_mode = SD_TM_AUTO_TUNING;
  102. else
  103. trans_mode = SD_TM_NORMAL_READ;
  104. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  105. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  106. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  107. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  108. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  109. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  110. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  111. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  112. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  113. SD_CMD4, 0xFF, (u8)cmd->arg);
  114. } else {
  115. trans_mode = SD_TM_AUTO_READ_3;
  116. }
  117. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  118. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  119. 0xFF, (u8)(byte_cnt >> 8));
  120. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  121. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  122. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  123. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  124. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  125. if (trans_mode != SD_TM_AUTO_TUNING)
  126. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  127. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  128. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  129. 0xFF, trans_mode | SD_TRANSFER_START);
  130. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  131. SD_TRANSFER_END, SD_TRANSFER_END);
  132. if (cmd != NULL) {
  133. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  134. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  135. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  136. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  137. }
  138. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  139. if (err) {
  140. dev_dbg(sdmmc_dev(host),
  141. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  142. return err;
  143. }
  144. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  145. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  146. sd_print_debug_regs(host);
  147. if (!err) {
  148. dev_dbg(sdmmc_dev(host),
  149. "Transfer failed (SD_TRANSFER = %02x)\n",
  150. ucr->rsp_buf[0]);
  151. err = -EIO;
  152. } else {
  153. dev_dbg(sdmmc_dev(host),
  154. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  155. }
  156. return err;
  157. }
  158. if (cmd != NULL) {
  159. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  160. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  161. cmd->resp[0]);
  162. }
  163. if (buf && buf_len) {
  164. /* 2-byte aligned part */
  165. err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
  166. if (err) {
  167. dev_dbg(sdmmc_dev(host),
  168. "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
  169. return err;
  170. }
  171. /* unaligned byte */
  172. if (byte_cnt % 2)
  173. return rtsx_usb_read_register(ucr,
  174. PPBUF_BASE2 + byte_cnt,
  175. buf + byte_cnt - 1);
  176. }
  177. return 0;
  178. }
  179. static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  180. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  181. {
  182. struct rtsx_ucr *ucr = host->ucr;
  183. int err;
  184. u8 trans_mode;
  185. if (!buf)
  186. buf_len = 0;
  187. if (buf && buf_len) {
  188. err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
  189. if (err) {
  190. dev_dbg(sdmmc_dev(host),
  191. "rtsx_usb_write_ppbuf failed (err = %d)\n",
  192. err);
  193. return err;
  194. }
  195. }
  196. trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
  197. rtsx_usb_init_cmd(ucr);
  198. if (cmd != NULL) {
  199. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
  200. cmd->opcode);
  201. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  202. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  203. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  204. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  205. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  206. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  207. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  208. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  209. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  210. SD_CMD4, 0xFF, (u8)cmd->arg);
  211. }
  212. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  213. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  214. 0xFF, (u8)(byte_cnt >> 8));
  215. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  216. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  217. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  218. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  219. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  220. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  221. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  222. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  223. trans_mode | SD_TRANSFER_START);
  224. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  225. SD_TRANSFER_END, SD_TRANSFER_END);
  226. if (cmd != NULL) {
  227. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  228. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  229. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  230. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  231. }
  232. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  233. if (err) {
  234. dev_dbg(sdmmc_dev(host),
  235. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  236. return err;
  237. }
  238. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  239. if (err) {
  240. sd_print_debug_regs(host);
  241. dev_dbg(sdmmc_dev(host),
  242. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  243. return err;
  244. }
  245. if (cmd != NULL) {
  246. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  247. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  248. cmd->resp[0]);
  249. }
  250. return 0;
  251. }
  252. static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
  253. struct mmc_command *cmd)
  254. {
  255. struct rtsx_ucr *ucr = host->ucr;
  256. u8 cmd_idx = (u8)cmd->opcode;
  257. u32 arg = cmd->arg;
  258. int err = 0;
  259. int timeout = 100;
  260. int i;
  261. u8 *ptr;
  262. int stat_idx = 0;
  263. int len = 2;
  264. u8 rsp_type;
  265. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
  266. __func__, cmd_idx, arg);
  267. /* Response type:
  268. * R0
  269. * R1, R5, R6, R7
  270. * R1b
  271. * R2
  272. * R3, R4
  273. */
  274. switch (mmc_resp_type(cmd)) {
  275. case MMC_RSP_NONE:
  276. rsp_type = SD_RSP_TYPE_R0;
  277. break;
  278. case MMC_RSP_R1:
  279. rsp_type = SD_RSP_TYPE_R1;
  280. break;
  281. case MMC_RSP_R1_NO_CRC:
  282. rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
  283. break;
  284. case MMC_RSP_R1B:
  285. rsp_type = SD_RSP_TYPE_R1b;
  286. break;
  287. case MMC_RSP_R2:
  288. rsp_type = SD_RSP_TYPE_R2;
  289. break;
  290. case MMC_RSP_R3:
  291. rsp_type = SD_RSP_TYPE_R3;
  292. break;
  293. default:
  294. dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
  295. err = -EINVAL;
  296. goto out;
  297. }
  298. if (rsp_type == SD_RSP_TYPE_R1b)
  299. timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
  300. if (cmd->opcode == SD_SWITCH_VOLTAGE) {
  301. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  302. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  303. SD_CLK_TOGGLE_EN);
  304. if (err)
  305. goto out;
  306. }
  307. rtsx_usb_init_cmd(ucr);
  308. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
  309. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
  310. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
  311. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
  312. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
  313. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
  314. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  315. 0x01, PINGPONG_BUFFER);
  316. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  317. 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
  318. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  319. SD_TRANSFER_END | SD_STAT_IDLE,
  320. SD_TRANSFER_END | SD_STAT_IDLE);
  321. if (rsp_type == SD_RSP_TYPE_R2) {
  322. /* Read data from ping-pong buffer */
  323. for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
  324. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  325. stat_idx = 16;
  326. } else if (rsp_type != SD_RSP_TYPE_R0) {
  327. /* Read data from SD_CMDx registers */
  328. for (i = SD_CMD0; i <= SD_CMD4; i++)
  329. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  330. stat_idx = 5;
  331. }
  332. len += stat_idx;
  333. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
  334. err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
  335. if (err) {
  336. dev_dbg(sdmmc_dev(host),
  337. "rtsx_usb_send_cmd error (err = %d)\n", err);
  338. goto out;
  339. }
  340. err = rtsx_usb_get_rsp(ucr, len, timeout);
  341. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  342. sd_print_debug_regs(host);
  343. sd_clear_error(host);
  344. if (!err) {
  345. dev_dbg(sdmmc_dev(host),
  346. "Transfer failed (SD_TRANSFER = %02x)\n",
  347. ucr->rsp_buf[0]);
  348. err = -EIO;
  349. } else {
  350. dev_dbg(sdmmc_dev(host),
  351. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  352. }
  353. goto out;
  354. }
  355. if (rsp_type == SD_RSP_TYPE_R0) {
  356. err = 0;
  357. goto out;
  358. }
  359. /* Skip result of CHECK_REG_CMD */
  360. ptr = ucr->rsp_buf + 1;
  361. /* Check (Start,Transmission) bit of Response */
  362. if ((ptr[0] & 0xC0) != 0) {
  363. err = -EILSEQ;
  364. dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
  365. goto out;
  366. }
  367. /* Check CRC7 */
  368. if (!(rsp_type & SD_NO_CHECK_CRC7)) {
  369. if (ptr[stat_idx] & SD_CRC7_ERR) {
  370. err = -EILSEQ;
  371. dev_dbg(sdmmc_dev(host), "CRC7 error\n");
  372. goto out;
  373. }
  374. }
  375. if (rsp_type == SD_RSP_TYPE_R2) {
  376. /*
  377. * The controller offloads the last byte {CRC-7, end bit 1'b1}
  378. * of response type R2. Assign dummy CRC, 0, and end bit to the
  379. * byte(ptr[16], goes into the LSB of resp[3] later).
  380. */
  381. ptr[16] = 1;
  382. for (i = 0; i < 4; i++) {
  383. cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
  384. dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
  385. i, cmd->resp[i]);
  386. }
  387. } else {
  388. cmd->resp[0] = get_unaligned_be32(ptr + 1);
  389. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  390. cmd->resp[0]);
  391. }
  392. out:
  393. cmd->error = err;
  394. }
  395. static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
  396. {
  397. struct rtsx_ucr *ucr = host->ucr;
  398. struct mmc_data *data = mrq->data;
  399. int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
  400. u8 cfg2, trans_mode;
  401. int err;
  402. u8 flag;
  403. size_t data_len = data->blksz * data->blocks;
  404. unsigned int pipe;
  405. if (read) {
  406. dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
  407. __func__, data_len);
  408. cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  409. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
  410. trans_mode = SD_TM_AUTO_READ_3;
  411. } else {
  412. dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
  413. __func__, data_len);
  414. cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  415. SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
  416. trans_mode = SD_TM_AUTO_WRITE_3;
  417. }
  418. rtsx_usb_init_cmd(ucr);
  419. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
  420. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
  421. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
  422. 0xFF, (u8)data->blocks);
  423. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
  424. 0xFF, (u8)(data->blocks >> 8));
  425. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  426. 0x01, RING_BUFFER);
  427. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
  428. 0xFF, (u8)(data_len >> 24));
  429. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
  430. 0xFF, (u8)(data_len >> 16));
  431. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
  432. 0xFF, (u8)(data_len >> 8));
  433. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
  434. 0xFF, (u8)data_len);
  435. if (read) {
  436. flag = MODE_CDIR;
  437. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  438. 0x03 | DMA_PACK_SIZE_MASK,
  439. DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
  440. } else {
  441. flag = MODE_CDOR;
  442. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  443. 0x03 | DMA_PACK_SIZE_MASK,
  444. DMA_DIR_TO_CARD | DMA_EN | DMA_512);
  445. }
  446. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
  447. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  448. trans_mode | SD_TRANSFER_START);
  449. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  450. SD_TRANSFER_END, SD_TRANSFER_END);
  451. err = rtsx_usb_send_cmd(ucr, flag, 100);
  452. if (err)
  453. return err;
  454. if (read)
  455. pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
  456. else
  457. pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
  458. err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
  459. data->sg_len, NULL, 10000);
  460. if (err) {
  461. dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
  462. , err);
  463. sd_clear_error(host);
  464. return err;
  465. }
  466. return rtsx_usb_get_rsp(ucr, 1, 2000);
  467. }
  468. static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
  469. {
  470. rtsx_usb_write_register(host->ucr, SD_CFG1,
  471. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
  472. }
  473. static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
  474. {
  475. rtsx_usb_write_register(host->ucr, SD_CFG1,
  476. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
  477. }
  478. static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
  479. struct mmc_request *mrq)
  480. {
  481. struct mmc_command *cmd = mrq->cmd;
  482. struct mmc_data *data = mrq->data;
  483. u8 *buf;
  484. buf = kzalloc(data->blksz, GFP_NOIO);
  485. if (!buf) {
  486. cmd->error = -ENOMEM;
  487. return;
  488. }
  489. if (data->flags & MMC_DATA_READ) {
  490. if (host->initial_mode)
  491. sd_disable_initial_mode(host);
  492. cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
  493. data->blksz, 200);
  494. if (host->initial_mode)
  495. sd_enable_initial_mode(host);
  496. sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
  497. } else {
  498. sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
  499. cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
  500. data->blksz, 200);
  501. }
  502. kfree(buf);
  503. }
  504. static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
  505. {
  506. struct rtsx_ucr *ucr = host->ucr;
  507. int err;
  508. dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
  509. __func__, tx ? "TX" : "RX", sample_point);
  510. rtsx_usb_init_cmd(ucr);
  511. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
  512. if (tx)
  513. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  514. 0x0F, sample_point);
  515. else
  516. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
  517. 0x0F, sample_point);
  518. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
  519. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  520. PHASE_NOT_RESET, PHASE_NOT_RESET);
  521. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
  522. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
  523. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  524. if (err)
  525. return err;
  526. return 0;
  527. }
  528. static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
  529. {
  530. idx &= MAX_PHASE;
  531. return phase_map & (1 << idx);
  532. }
  533. static int get_phase_len(u32 phase_map, unsigned int idx)
  534. {
  535. int i;
  536. for (i = 0; i < MAX_PHASE + 1; i++) {
  537. if (get_phase_point(phase_map, idx + i) == 0)
  538. return i;
  539. }
  540. return MAX_PHASE + 1;
  541. }
  542. static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
  543. {
  544. int start = 0, len = 0;
  545. int start_final = 0, len_final = 0;
  546. u8 final_phase = 0xFF;
  547. if (phase_map == 0) {
  548. dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
  549. return final_phase;
  550. }
  551. while (start < MAX_PHASE + 1) {
  552. len = get_phase_len(phase_map, start);
  553. if (len_final < len) {
  554. start_final = start;
  555. len_final = len;
  556. }
  557. start += len ? len : 1;
  558. }
  559. final_phase = (start_final + len_final / 2) & MAX_PHASE;
  560. dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
  561. phase_map, len_final, final_phase);
  562. return final_phase;
  563. }
  564. static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
  565. {
  566. int err, i;
  567. u8 val = 0;
  568. for (i = 0; i < 100; i++) {
  569. err = rtsx_usb_ep0_read_register(host->ucr,
  570. SD_DATA_STATE, &val);
  571. if (val & SD_DATA_IDLE)
  572. return;
  573. usleep_range(100, 1000);
  574. }
  575. }
  576. static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
  577. u8 opcode, u8 sample_point)
  578. {
  579. int err;
  580. struct mmc_command cmd = {};
  581. err = sd_change_phase(host, sample_point, 0);
  582. if (err)
  583. return err;
  584. cmd.opcode = MMC_SEND_TUNING_BLOCK;
  585. err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
  586. if (err) {
  587. /* Wait till SD DATA IDLE */
  588. sd_wait_data_idle(host);
  589. sd_clear_error(host);
  590. return err;
  591. }
  592. return 0;
  593. }
  594. static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
  595. u8 opcode, u16 *phase_map)
  596. {
  597. int err, i;
  598. u16 raw_phase_map = 0;
  599. for (i = MAX_PHASE; i >= 0; i--) {
  600. err = sd_tuning_rx_cmd(host, opcode, (u8)i);
  601. if (!err)
  602. raw_phase_map |= 1 << i;
  603. }
  604. if (phase_map)
  605. *phase_map = raw_phase_map;
  606. }
  607. static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
  608. {
  609. int err, i;
  610. u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
  611. u8 final_phase;
  612. /* setting fixed default TX phase */
  613. err = sd_change_phase(host, 0x01, 1);
  614. if (err) {
  615. dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
  616. return err;
  617. }
  618. /* tuning RX phase */
  619. for (i = 0; i < RX_TUNING_CNT; i++) {
  620. sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
  621. if (raw_phase_map[i] == 0)
  622. break;
  623. }
  624. phase_map = 0xFFFF;
  625. for (i = 0; i < RX_TUNING_CNT; i++) {
  626. dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
  627. i, raw_phase_map[i]);
  628. phase_map &= raw_phase_map[i];
  629. }
  630. dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
  631. if (phase_map) {
  632. final_phase = sd_search_final_phase(host, phase_map);
  633. if (final_phase == 0xFF)
  634. return -EINVAL;
  635. err = sd_change_phase(host, final_phase, 0);
  636. if (err)
  637. return err;
  638. } else {
  639. return -EINVAL;
  640. }
  641. return 0;
  642. }
  643. static int sdmmc_get_ro(struct mmc_host *mmc)
  644. {
  645. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  646. struct rtsx_ucr *ucr = host->ucr;
  647. int err;
  648. u16 val;
  649. if (host->host_removal)
  650. return -ENOMEDIUM;
  651. mutex_lock(&ucr->dev_mutex);
  652. /* Check SD card detect */
  653. err = rtsx_usb_get_card_status(ucr, &val);
  654. mutex_unlock(&ucr->dev_mutex);
  655. /* Treat failed detection as non-ro */
  656. if (err)
  657. return 0;
  658. if (val & SD_WP)
  659. return 1;
  660. return 0;
  661. }
  662. static int sdmmc_get_cd(struct mmc_host *mmc)
  663. {
  664. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  665. struct rtsx_ucr *ucr = host->ucr;
  666. int err;
  667. u16 val;
  668. if (host->host_removal)
  669. return -ENOMEDIUM;
  670. mutex_lock(&ucr->dev_mutex);
  671. /* Check SD card detect */
  672. err = rtsx_usb_get_card_status(ucr, &val);
  673. mutex_unlock(&ucr->dev_mutex);
  674. /* Treat failed detection as non-exist */
  675. if (err)
  676. goto no_card;
  677. if (val & SD_CD) {
  678. host->card_exist = true;
  679. return 1;
  680. }
  681. no_card:
  682. host->card_exist = false;
  683. return 0;
  684. }
  685. static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  686. {
  687. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  688. struct rtsx_ucr *ucr = host->ucr;
  689. struct mmc_command *cmd = mrq->cmd;
  690. struct mmc_data *data = mrq->data;
  691. unsigned int data_size = 0;
  692. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  693. if (host->host_removal) {
  694. cmd->error = -ENOMEDIUM;
  695. goto finish;
  696. }
  697. if ((!host->card_exist)) {
  698. cmd->error = -ENOMEDIUM;
  699. goto finish_detect_card;
  700. }
  701. mutex_lock(&ucr->dev_mutex);
  702. mutex_lock(&host->host_mutex);
  703. host->mrq = mrq;
  704. mutex_unlock(&host->host_mutex);
  705. if (mrq->data)
  706. data_size = data->blocks * data->blksz;
  707. if (!data_size) {
  708. sd_send_cmd_get_rsp(host, cmd);
  709. } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
  710. mmc_op_multi(cmd->opcode)) {
  711. sd_send_cmd_get_rsp(host, cmd);
  712. if (!cmd->error) {
  713. sd_rw_multi(host, mrq);
  714. if (mmc_op_multi(cmd->opcode) && mrq->stop) {
  715. sd_send_cmd_get_rsp(host, mrq->stop);
  716. rtsx_usb_write_register(ucr, MC_FIFO_CTL,
  717. FIFO_FLUSH, FIFO_FLUSH);
  718. }
  719. }
  720. } else {
  721. sd_normal_rw(host, mrq);
  722. }
  723. if (mrq->data) {
  724. if (cmd->error || data->error)
  725. data->bytes_xfered = 0;
  726. else
  727. data->bytes_xfered = data->blocks * data->blksz;
  728. }
  729. mutex_unlock(&ucr->dev_mutex);
  730. finish_detect_card:
  731. if (cmd->error) {
  732. /*
  733. * detect card when fail to update card existence state and
  734. * speed up card removal when retry
  735. */
  736. sdmmc_get_cd(mmc);
  737. dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
  738. }
  739. finish:
  740. mutex_lock(&host->host_mutex);
  741. host->mrq = NULL;
  742. mutex_unlock(&host->host_mutex);
  743. mmc_request_done(mmc, mrq);
  744. }
  745. static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
  746. unsigned char bus_width)
  747. {
  748. int err = 0;
  749. static const u8 width[] = {
  750. [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
  751. [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
  752. [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
  753. };
  754. if (bus_width <= MMC_BUS_WIDTH_8)
  755. err = rtsx_usb_write_register(host->ucr, SD_CFG1,
  756. 0x03, width[bus_width]);
  757. return err;
  758. }
  759. static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
  760. {
  761. rtsx_usb_init_cmd(ucr);
  762. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
  763. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  764. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  765. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  766. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  767. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  768. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  769. }
  770. static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
  771. {
  772. rtsx_usb_init_cmd(ucr);
  773. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
  774. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  775. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  776. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  777. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
  778. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
  779. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  780. }
  781. static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
  782. {
  783. rtsx_usb_init_cmd(ucr);
  784. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
  785. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
  786. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
  787. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  788. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  789. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  790. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  791. }
  792. static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
  793. {
  794. rtsx_usb_init_cmd(ucr);
  795. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
  796. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
  797. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
  798. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
  799. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
  800. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
  801. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  802. }
  803. static int sd_power_on(struct rtsx_usb_sdmmc *host)
  804. {
  805. struct rtsx_ucr *ucr = host->ucr;
  806. int err;
  807. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  808. rtsx_usb_init_cmd(ucr);
  809. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
  810. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
  811. CARD_SHARE_MASK, CARD_SHARE_SD);
  812. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
  813. SD_CLK_EN, SD_CLK_EN);
  814. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  815. if (err)
  816. return err;
  817. if (CHECK_PKG(ucr, LQFP48))
  818. err = sd_pull_ctl_enable_lqfp48(ucr);
  819. else
  820. err = sd_pull_ctl_enable_qfn24(ucr);
  821. if (err)
  822. return err;
  823. err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
  824. POWER_MASK, PARTIAL_POWER_ON);
  825. if (err)
  826. return err;
  827. usleep_range(800, 1000);
  828. rtsx_usb_init_cmd(ucr);
  829. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  830. POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
  831. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
  832. SD_OUTPUT_EN, SD_OUTPUT_EN);
  833. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  834. }
  835. static int sd_power_off(struct rtsx_usb_sdmmc *host)
  836. {
  837. struct rtsx_ucr *ucr = host->ucr;
  838. int err;
  839. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  840. rtsx_usb_init_cmd(ucr);
  841. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
  842. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
  843. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  844. POWER_MASK, POWER_OFF);
  845. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  846. POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
  847. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  848. if (err)
  849. return err;
  850. if (CHECK_PKG(ucr, LQFP48))
  851. return sd_pull_ctl_disable_lqfp48(ucr);
  852. return sd_pull_ctl_disable_qfn24(ucr);
  853. }
  854. static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
  855. unsigned char power_mode)
  856. {
  857. int err;
  858. if (power_mode != MMC_POWER_OFF)
  859. power_mode = MMC_POWER_ON;
  860. if (power_mode == host->power_mode)
  861. return 0;
  862. if (power_mode == MMC_POWER_OFF) {
  863. err = sd_power_off(host);
  864. pm_runtime_put(sdmmc_dev(host));
  865. } else {
  866. pm_runtime_get_sync(sdmmc_dev(host));
  867. err = sd_power_on(host);
  868. }
  869. if (!err)
  870. host->power_mode = power_mode;
  871. return err;
  872. }
  873. static int sd_set_timing(struct rtsx_usb_sdmmc *host,
  874. unsigned char timing, bool *ddr_mode)
  875. {
  876. struct rtsx_ucr *ucr = host->ucr;
  877. int err;
  878. *ddr_mode = false;
  879. rtsx_usb_init_cmd(ucr);
  880. switch (timing) {
  881. case MMC_TIMING_UHS_SDR104:
  882. case MMC_TIMING_UHS_SDR50:
  883. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  884. 0x0C | SD_ASYNC_FIFO_RST,
  885. SD_30_MODE | SD_ASYNC_FIFO_RST);
  886. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  887. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  888. break;
  889. case MMC_TIMING_UHS_DDR50:
  890. *ddr_mode = true;
  891. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  892. 0x0C | SD_ASYNC_FIFO_RST,
  893. SD_DDR_MODE | SD_ASYNC_FIFO_RST);
  894. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  895. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  896. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  897. DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
  898. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  899. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
  900. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
  901. break;
  902. case MMC_TIMING_MMC_HS:
  903. case MMC_TIMING_SD_HS:
  904. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  905. 0x0C, SD_20_MODE);
  906. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  907. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  908. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  909. SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
  910. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  911. SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
  912. break;
  913. default:
  914. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  915. SD_CFG1, 0x0C, SD_20_MODE);
  916. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  917. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  918. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  919. SD_PUSH_POINT_CTL, 0xFF, 0);
  920. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  921. SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
  922. break;
  923. }
  924. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  925. return err;
  926. }
  927. static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  928. {
  929. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  930. struct rtsx_ucr *ucr = host->ucr;
  931. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  932. mutex_lock(&ucr->dev_mutex);
  933. sd_set_power_mode(host, ios->power_mode);
  934. sd_set_bus_width(host, ios->bus_width);
  935. sd_set_timing(host, ios->timing, &host->ddr_mode);
  936. host->vpclk = false;
  937. host->double_clk = true;
  938. switch (ios->timing) {
  939. case MMC_TIMING_UHS_SDR104:
  940. case MMC_TIMING_UHS_SDR50:
  941. host->ssc_depth = SSC_DEPTH_2M;
  942. host->vpclk = true;
  943. host->double_clk = false;
  944. break;
  945. case MMC_TIMING_UHS_DDR50:
  946. case MMC_TIMING_UHS_SDR25:
  947. host->ssc_depth = SSC_DEPTH_1M;
  948. break;
  949. default:
  950. host->ssc_depth = SSC_DEPTH_512K;
  951. break;
  952. }
  953. host->initial_mode = (ios->clock <= 1000000) ? true : false;
  954. host->clock = ios->clock;
  955. rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
  956. host->initial_mode, host->double_clk, host->vpclk);
  957. mutex_unlock(&ucr->dev_mutex);
  958. dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
  959. }
  960. static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
  961. {
  962. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  963. struct rtsx_ucr *ucr = host->ucr;
  964. int err = 0;
  965. dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
  966. __func__, ios->signal_voltage);
  967. if (host->host_removal)
  968. return -ENOMEDIUM;
  969. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
  970. return -EPERM;
  971. mutex_lock(&ucr->dev_mutex);
  972. err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
  973. if (err) {
  974. mutex_unlock(&ucr->dev_mutex);
  975. return err;
  976. }
  977. /* Let mmc core do the busy checking, simply stop the forced-toggle
  978. * clock(while issuing CMD11) and switch voltage.
  979. */
  980. rtsx_usb_init_cmd(ucr);
  981. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
  982. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  983. SD_IO_USING_1V8, SD_IO_USING_3V3);
  984. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  985. TUNE_SD18_MASK, TUNE_SD18_3V3);
  986. } else {
  987. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
  988. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  989. SD_CLK_FORCE_STOP);
  990. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  991. SD_IO_USING_1V8, SD_IO_USING_1V8);
  992. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  993. TUNE_SD18_MASK, TUNE_SD18_1V8);
  994. }
  995. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  996. mutex_unlock(&ucr->dev_mutex);
  997. return err;
  998. }
  999. static int sdmmc_card_busy(struct mmc_host *mmc)
  1000. {
  1001. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1002. struct rtsx_ucr *ucr = host->ucr;
  1003. int err;
  1004. u8 stat;
  1005. u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
  1006. | SD_DAT0_STATUS;
  1007. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  1008. mutex_lock(&ucr->dev_mutex);
  1009. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1010. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  1011. SD_CLK_TOGGLE_EN);
  1012. if (err)
  1013. goto out;
  1014. mdelay(1);
  1015. err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
  1016. if (err)
  1017. goto out;
  1018. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1019. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
  1020. out:
  1021. mutex_unlock(&ucr->dev_mutex);
  1022. if (err)
  1023. return err;
  1024. /* check if any pin between dat[0:3] is low */
  1025. if ((stat & mask) != mask)
  1026. return 1;
  1027. else
  1028. return 0;
  1029. }
  1030. static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
  1031. {
  1032. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1033. struct rtsx_ucr *ucr = host->ucr;
  1034. int err = 0;
  1035. if (host->host_removal)
  1036. return -ENOMEDIUM;
  1037. mutex_lock(&ucr->dev_mutex);
  1038. if (!host->ddr_mode)
  1039. err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
  1040. mutex_unlock(&ucr->dev_mutex);
  1041. return err;
  1042. }
  1043. static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
  1044. .request = sdmmc_request,
  1045. .set_ios = sdmmc_set_ios,
  1046. .get_ro = sdmmc_get_ro,
  1047. .get_cd = sdmmc_get_cd,
  1048. .start_signal_voltage_switch = sdmmc_switch_voltage,
  1049. .card_busy = sdmmc_card_busy,
  1050. .execute_tuning = sdmmc_execute_tuning,
  1051. };
  1052. #ifdef RTSX_USB_USE_LEDS_CLASS
  1053. static void rtsx_usb_led_control(struct led_classdev *led,
  1054. enum led_brightness brightness)
  1055. {
  1056. struct rtsx_usb_sdmmc *host = container_of(led,
  1057. struct rtsx_usb_sdmmc, led);
  1058. if (host->host_removal)
  1059. return;
  1060. host->led.brightness = brightness;
  1061. schedule_work(&host->led_work);
  1062. }
  1063. static void rtsx_usb_update_led(struct work_struct *work)
  1064. {
  1065. struct rtsx_usb_sdmmc *host =
  1066. container_of(work, struct rtsx_usb_sdmmc, led_work);
  1067. struct rtsx_ucr *ucr = host->ucr;
  1068. pm_runtime_get_sync(sdmmc_dev(host));
  1069. mutex_lock(&ucr->dev_mutex);
  1070. if (host->led.brightness == LED_OFF)
  1071. rtsx_usb_turn_off_led(ucr);
  1072. else
  1073. rtsx_usb_turn_on_led(ucr);
  1074. mutex_unlock(&ucr->dev_mutex);
  1075. pm_runtime_put(sdmmc_dev(host));
  1076. }
  1077. #endif
  1078. static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
  1079. {
  1080. struct mmc_host *mmc = host->mmc;
  1081. mmc->f_min = 250000;
  1082. mmc->f_max = 208000000;
  1083. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  1084. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
  1085. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
  1086. MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
  1087. MMC_CAP_NEEDS_POLL | MMC_CAP_ERASE;
  1088. mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
  1089. MMC_CAP2_NO_SDIO;
  1090. mmc->max_current_330 = 400;
  1091. mmc->max_current_180 = 800;
  1092. mmc->ops = &rtsx_usb_sdmmc_ops;
  1093. mmc->max_segs = 256;
  1094. mmc->max_seg_size = 65536;
  1095. mmc->max_blk_size = 512;
  1096. mmc->max_blk_count = 65535;
  1097. mmc->max_req_size = 524288;
  1098. host->power_mode = MMC_POWER_OFF;
  1099. }
  1100. static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
  1101. {
  1102. struct mmc_host *mmc;
  1103. struct rtsx_usb_sdmmc *host;
  1104. struct rtsx_ucr *ucr;
  1105. #ifdef RTSX_USB_USE_LEDS_CLASS
  1106. int err;
  1107. #endif
  1108. ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
  1109. if (!ucr)
  1110. return -ENXIO;
  1111. dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
  1112. mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
  1113. if (!mmc)
  1114. return -ENOMEM;
  1115. host = mmc_priv(mmc);
  1116. host->ucr = ucr;
  1117. host->mmc = mmc;
  1118. host->pdev = pdev;
  1119. platform_set_drvdata(pdev, host);
  1120. mutex_init(&host->host_mutex);
  1121. rtsx_usb_init_host(host);
  1122. pm_runtime_use_autosuspend(&pdev->dev);
  1123. pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
  1124. pm_runtime_enable(&pdev->dev);
  1125. #ifdef RTSX_USB_USE_LEDS_CLASS
  1126. snprintf(host->led_name, sizeof(host->led_name),
  1127. "%s::", mmc_hostname(mmc));
  1128. host->led.name = host->led_name;
  1129. host->led.brightness = LED_OFF;
  1130. host->led.default_trigger = mmc_hostname(mmc);
  1131. host->led.brightness_set = rtsx_usb_led_control;
  1132. err = led_classdev_register(mmc_dev(mmc), &host->led);
  1133. if (err)
  1134. dev_err(&(pdev->dev),
  1135. "Failed to register LED device: %d\n", err);
  1136. INIT_WORK(&host->led_work, rtsx_usb_update_led);
  1137. #endif
  1138. mmc_add_host(mmc);
  1139. return 0;
  1140. }
  1141. static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
  1142. {
  1143. struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
  1144. struct mmc_host *mmc;
  1145. if (!host)
  1146. return 0;
  1147. mmc = host->mmc;
  1148. host->host_removal = true;
  1149. mutex_lock(&host->host_mutex);
  1150. if (host->mrq) {
  1151. dev_dbg(&(pdev->dev),
  1152. "%s: Controller removed during transfer\n",
  1153. mmc_hostname(mmc));
  1154. host->mrq->cmd->error = -ENOMEDIUM;
  1155. if (host->mrq->stop)
  1156. host->mrq->stop->error = -ENOMEDIUM;
  1157. mmc_request_done(mmc, host->mrq);
  1158. }
  1159. mutex_unlock(&host->host_mutex);
  1160. mmc_remove_host(mmc);
  1161. #ifdef RTSX_USB_USE_LEDS_CLASS
  1162. cancel_work_sync(&host->led_work);
  1163. led_classdev_unregister(&host->led);
  1164. #endif
  1165. mmc_free_host(mmc);
  1166. pm_runtime_disable(&pdev->dev);
  1167. pm_runtime_dont_use_autosuspend(&pdev->dev);
  1168. platform_set_drvdata(pdev, NULL);
  1169. dev_dbg(&(pdev->dev),
  1170. ": Realtek USB SD/MMC module has been removed\n");
  1171. return 0;
  1172. }
  1173. static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
  1174. {
  1175. .name = "rtsx_usb_sdmmc",
  1176. }, {
  1177. /* sentinel */
  1178. }
  1179. };
  1180. MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
  1181. static struct platform_driver rtsx_usb_sdmmc_driver = {
  1182. .probe = rtsx_usb_sdmmc_drv_probe,
  1183. .remove = rtsx_usb_sdmmc_drv_remove,
  1184. .id_table = rtsx_usb_sdmmc_ids,
  1185. .driver = {
  1186. .name = "rtsx_usb_sdmmc",
  1187. },
  1188. };
  1189. module_platform_driver(rtsx_usb_sdmmc_driver);
  1190. MODULE_LICENSE("GPL v2");
  1191. MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
  1192. MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");