pciehp.h 8.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * PCI Express Hot Plug Controller Driver
  4. *
  5. * Copyright (C) 1995,2001 Compaq Computer Corporation
  6. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  7. * Copyright (C) 2001 IBM Corp.
  8. * Copyright (C) 2003-2004 Intel Corporation
  9. *
  10. * All rights reserved.
  11. *
  12. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  13. *
  14. */
  15. #ifndef _PCIEHP_H
  16. #define _PCIEHP_H
  17. #include <linux/types.h>
  18. #include <linux/pci.h>
  19. #include <linux/pci_hotplug.h>
  20. #include <linux/delay.h>
  21. #include <linux/sched/signal.h> /* signal_pending() */
  22. #include <linux/mutex.h>
  23. #include <linux/rwsem.h>
  24. #include <linux/workqueue.h>
  25. #include "../pcie/portdrv.h"
  26. #define MY_NAME "pciehp"
  27. extern bool pciehp_poll_mode;
  28. extern int pciehp_poll_time;
  29. extern bool pciehp_debug;
  30. #define dbg(format, arg...) \
  31. do { \
  32. if (pciehp_debug) \
  33. printk(KERN_DEBUG "%s: " format, MY_NAME, ## arg); \
  34. } while (0)
  35. #define err(format, arg...) \
  36. printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
  37. #define info(format, arg...) \
  38. printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
  39. #define warn(format, arg...) \
  40. printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
  41. #define ctrl_dbg(ctrl, format, arg...) \
  42. do { \
  43. if (pciehp_debug) \
  44. dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
  45. format, ## arg); \
  46. } while (0)
  47. #define ctrl_err(ctrl, format, arg...) \
  48. dev_err(&ctrl->pcie->device, format, ## arg)
  49. #define ctrl_info(ctrl, format, arg...) \
  50. dev_info(&ctrl->pcie->device, format, ## arg)
  51. #define ctrl_warn(ctrl, format, arg...) \
  52. dev_warn(&ctrl->pcie->device, format, ## arg)
  53. #define SLOT_NAME_SIZE 10
  54. /**
  55. * struct slot - PCIe hotplug slot
  56. * @state: current state machine position
  57. * @ctrl: pointer to the slot's controller structure
  58. * @hotplug_slot: pointer to the structure registered with the PCI hotplug core
  59. * @work: work item to turn the slot on or off after 5 seconds in response to
  60. * an Attention Button press
  61. * @lock: protects reads and writes of @state;
  62. * protects scheduling, execution and cancellation of @work
  63. */
  64. struct slot {
  65. u8 state;
  66. struct controller *ctrl;
  67. struct hotplug_slot *hotplug_slot;
  68. struct delayed_work work;
  69. struct mutex lock;
  70. };
  71. /**
  72. * struct controller - PCIe hotplug controller
  73. * @ctrl_lock: serializes writes to the Slot Control register
  74. * @pcie: pointer to the controller's PCIe port service device
  75. * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
  76. * Link Status register and to the Presence Detect State bit in the Slot
  77. * Status register during a slot reset which may cause them to flap
  78. * @slot: pointer to the controller's slot structure
  79. * @queue: wait queue to wake up on reception of a Command Completed event,
  80. * used for synchronous writes to the Slot Control register
  81. * @slot_cap: cached copy of the Slot Capabilities register
  82. * @slot_ctrl: cached copy of the Slot Control register
  83. * @poll_thread: thread to poll for slot events if no IRQ is available,
  84. * enabled with pciehp_poll_mode module parameter
  85. * @cmd_started: jiffies when the Slot Control register was last written;
  86. * the next write is allowed 1 second later, absent a Command Completed
  87. * interrupt (PCIe r4.0, sec 6.7.3.2)
  88. * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
  89. * on reception of a Command Completed event
  90. * @link_active_reporting: cached copy of Data Link Layer Link Active Reporting
  91. * Capable bit in Link Capabilities register; if this bit is zero, the
  92. * Data Link Layer Link Active bit in the Link Status register will never
  93. * be set and the driver is thus confined to wait 1 second before assuming
  94. * the link to a hotplugged device is up and accessing it
  95. * @notification_enabled: whether the IRQ was requested successfully
  96. * @power_fault_detected: whether a power fault was detected by the hardware
  97. * that has not yet been cleared by the user
  98. * @pending_events: used by the IRQ handler to save events retrieved from the
  99. * Slot Status register for later consumption by the IRQ thread
  100. * @ist_running: flag to keep user request waiting while IRQ thread is running
  101. * @request_result: result of last user request submitted to the IRQ thread
  102. * @requester: wait queue to wake up on completion of user request,
  103. * used for synchronous slot enable/disable request via sysfs
  104. */
  105. struct controller {
  106. struct mutex ctrl_lock;
  107. struct pcie_device *pcie;
  108. struct rw_semaphore reset_lock;
  109. struct slot *slot;
  110. wait_queue_head_t queue;
  111. u32 slot_cap;
  112. u16 slot_ctrl;
  113. struct task_struct *poll_thread;
  114. unsigned long cmd_started; /* jiffies */
  115. unsigned int cmd_busy:1;
  116. unsigned int link_active_reporting:1;
  117. unsigned int notification_enabled:1;
  118. unsigned int power_fault_detected;
  119. atomic_t pending_events;
  120. unsigned int ist_running;
  121. int request_result;
  122. wait_queue_head_t requester;
  123. };
  124. /**
  125. * DOC: Slot state
  126. *
  127. * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
  128. * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
  129. * green led is blinking
  130. * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
  131. * green led is blinking
  132. * @POWERON_STATE: slot is currently powering on
  133. * @POWEROFF_STATE: slot is currently powering off
  134. * @ON_STATE: slot is powered on, subordinate devices have been enumerated
  135. */
  136. #define OFF_STATE 0
  137. #define BLINKINGON_STATE 1
  138. #define BLINKINGOFF_STATE 2
  139. #define POWERON_STATE 3
  140. #define POWEROFF_STATE 4
  141. #define ON_STATE 5
  142. /**
  143. * DOC: Flags to request an action from the IRQ thread
  144. *
  145. * These are stored together with events read from the Slot Status register,
  146. * hence must be greater than its 16-bit width.
  147. *
  148. * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
  149. * an Attention Button press after the 5 second delay
  150. * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
  151. * hotplug port was inaccessible when the interrupt occurred, requiring
  152. * that the IRQ handler is rerun by the IRQ thread after it has made the
  153. * hotplug port accessible by runtime resuming its parents to D0
  154. */
  155. #define DISABLE_SLOT (1 << 16)
  156. #define RERUN_ISR (1 << 17)
  157. #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
  158. #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
  159. #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
  160. #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
  161. #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
  162. #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
  163. #define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
  164. #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
  165. #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
  166. int pciehp_sysfs_enable_slot(struct slot *slot);
  167. int pciehp_sysfs_disable_slot(struct slot *slot);
  168. void pciehp_request(struct controller *ctrl, int action);
  169. void pciehp_handle_button_press(struct slot *slot);
  170. void pciehp_handle_disable_request(struct slot *slot);
  171. void pciehp_handle_presence_or_link_change(struct slot *slot, u32 events);
  172. int pciehp_configure_device(struct slot *p_slot);
  173. void pciehp_unconfigure_device(struct slot *p_slot);
  174. void pciehp_queue_pushbutton_work(struct work_struct *work);
  175. struct controller *pcie_init(struct pcie_device *dev);
  176. int pcie_init_notification(struct controller *ctrl);
  177. void pcie_shutdown_notification(struct controller *ctrl);
  178. void pcie_clear_hotplug_events(struct controller *ctrl);
  179. int pciehp_power_on_slot(struct slot *slot);
  180. void pciehp_power_off_slot(struct slot *slot);
  181. void pciehp_get_power_status(struct slot *slot, u8 *status);
  182. void pciehp_get_attention_status(struct slot *slot, u8 *status);
  183. void pciehp_set_attention_status(struct slot *slot, u8 status);
  184. void pciehp_get_latch_status(struct slot *slot, u8 *status);
  185. void pciehp_get_adapter_status(struct slot *slot, u8 *status);
  186. int pciehp_query_power_fault(struct slot *slot);
  187. void pciehp_green_led_on(struct slot *slot);
  188. void pciehp_green_led_off(struct slot *slot);
  189. void pciehp_green_led_blink(struct slot *slot);
  190. int pciehp_check_link_status(struct controller *ctrl);
  191. bool pciehp_check_link_active(struct controller *ctrl);
  192. void pciehp_release_ctrl(struct controller *ctrl);
  193. int pciehp_reset_slot(struct slot *slot, int probe);
  194. int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
  195. int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
  196. static inline const char *slot_name(struct slot *slot)
  197. {
  198. return hotplug_slot_name(slot->hotplug_slot);
  199. }
  200. #endif /* _PCIEHP_H */