intel_punit_ipc.c 8.9 KB

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  1. /*
  2. * Driver for the Intel P-Unit Mailbox IPC mechanism
  3. *
  4. * (C) Copyright 2015 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * The heart of the P-Unit is the Foxton microcontroller and its firmware,
  11. * which provide mailbox interface for power management usage.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/acpi.h>
  16. #include <linux/delay.h>
  17. #include <linux/bitops.h>
  18. #include <linux/device.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/io.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/intel_punit_ipc.h>
  23. /* IPC Mailbox registers */
  24. #define OFFSET_DATA_LOW 0x0
  25. #define OFFSET_DATA_HIGH 0x4
  26. /* bit field of interface register */
  27. #define CMD_RUN BIT(31)
  28. #define CMD_ERRCODE_MASK GENMASK(7, 0)
  29. #define CMD_PARA1_SHIFT 8
  30. #define CMD_PARA2_SHIFT 16
  31. #define CMD_TIMEOUT_SECONDS 1
  32. enum {
  33. BASE_DATA = 0,
  34. BASE_IFACE,
  35. BASE_MAX,
  36. };
  37. typedef struct {
  38. struct device *dev;
  39. struct mutex lock;
  40. int irq;
  41. struct completion cmd_complete;
  42. /* base of interface and data registers */
  43. void __iomem *base[RESERVED_IPC][BASE_MAX];
  44. IPC_TYPE type;
  45. } IPC_DEV;
  46. static IPC_DEV *punit_ipcdev;
  47. static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
  48. {
  49. return readl(ipcdev->base[type][BASE_IFACE]);
  50. }
  51. static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
  52. {
  53. writel(cmd, ipcdev->base[type][BASE_IFACE]);
  54. }
  55. static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
  56. {
  57. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  58. }
  59. static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
  60. {
  61. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  62. }
  63. static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  64. {
  65. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  66. }
  67. static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  68. {
  69. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  70. }
  71. static const char *ipc_err_string(int error)
  72. {
  73. if (error == IPC_PUNIT_ERR_SUCCESS)
  74. return "no error";
  75. else if (error == IPC_PUNIT_ERR_INVALID_CMD)
  76. return "invalid command";
  77. else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
  78. return "invalid parameter";
  79. else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
  80. return "command timeout";
  81. else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
  82. return "command locked";
  83. else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
  84. return "invalid vr id";
  85. else if (error == IPC_PUNIT_ERR_VR_ERR)
  86. return "vr error";
  87. else
  88. return "unknown error";
  89. }
  90. static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
  91. {
  92. int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
  93. int errcode;
  94. int status;
  95. if (ipcdev->irq) {
  96. if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
  97. CMD_TIMEOUT_SECONDS * HZ)) {
  98. dev_err(ipcdev->dev, "IPC timed out\n");
  99. return -ETIMEDOUT;
  100. }
  101. } else {
  102. while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
  103. udelay(1);
  104. if (!loops) {
  105. dev_err(ipcdev->dev, "IPC timed out\n");
  106. return -ETIMEDOUT;
  107. }
  108. }
  109. status = ipc_read_status(ipcdev, type);
  110. errcode = status & CMD_ERRCODE_MASK;
  111. if (errcode) {
  112. dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
  113. ipc_err_string(errcode), status);
  114. return -EIO;
  115. }
  116. return 0;
  117. }
  118. /**
  119. * intel_punit_ipc_simple_command() - Simple IPC command
  120. * @cmd: IPC command code.
  121. * @para1: First 8bit parameter, set 0 if not used.
  122. * @para2: Second 8bit parameter, set 0 if not used.
  123. *
  124. * Send a IPC command to P-Unit when there is no data transaction
  125. *
  126. * Return: IPC error code or 0 on success.
  127. */
  128. int intel_punit_ipc_simple_command(int cmd, int para1, int para2)
  129. {
  130. IPC_DEV *ipcdev = punit_ipcdev;
  131. IPC_TYPE type;
  132. u32 val;
  133. int ret;
  134. mutex_lock(&ipcdev->lock);
  135. reinit_completion(&ipcdev->cmd_complete);
  136. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  137. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  138. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  139. ipc_write_cmd(ipcdev, type, val);
  140. ret = intel_punit_ipc_check_status(ipcdev, type);
  141. mutex_unlock(&ipcdev->lock);
  142. return ret;
  143. }
  144. EXPORT_SYMBOL(intel_punit_ipc_simple_command);
  145. /**
  146. * intel_punit_ipc_command() - IPC command with data and pointers
  147. * @cmd: IPC command code.
  148. * @para1: First 8bit parameter, set 0 if not used.
  149. * @para2: Second 8bit parameter, set 0 if not used.
  150. * @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.
  151. * @out: Output data.
  152. *
  153. * Send a IPC command to P-Unit with data transaction
  154. *
  155. * Return: IPC error code or 0 on success.
  156. */
  157. int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
  158. {
  159. IPC_DEV *ipcdev = punit_ipcdev;
  160. IPC_TYPE type;
  161. u32 val;
  162. int ret;
  163. mutex_lock(&ipcdev->lock);
  164. reinit_completion(&ipcdev->cmd_complete);
  165. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  166. if (in) {
  167. ipc_write_data_low(ipcdev, type, *in);
  168. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  169. ipc_write_data_high(ipcdev, type, *++in);
  170. }
  171. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  172. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  173. ipc_write_cmd(ipcdev, type, val);
  174. ret = intel_punit_ipc_check_status(ipcdev, type);
  175. if (ret)
  176. goto out;
  177. if (out) {
  178. *out = ipc_read_data_low(ipcdev, type);
  179. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  180. *++out = ipc_read_data_high(ipcdev, type);
  181. }
  182. out:
  183. mutex_unlock(&ipcdev->lock);
  184. return ret;
  185. }
  186. EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
  187. static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
  188. {
  189. IPC_DEV *ipcdev = dev_id;
  190. complete(&ipcdev->cmd_complete);
  191. return IRQ_HANDLED;
  192. }
  193. static int intel_punit_get_bars(struct platform_device *pdev)
  194. {
  195. struct resource *res;
  196. void __iomem *addr;
  197. /*
  198. * The following resources are required
  199. * - BIOS_IPC BASE_DATA
  200. * - BIOS_IPC BASE_IFACE
  201. */
  202. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  203. addr = devm_ioremap_resource(&pdev->dev, res);
  204. if (IS_ERR(addr))
  205. return PTR_ERR(addr);
  206. punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
  207. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  208. addr = devm_ioremap_resource(&pdev->dev, res);
  209. if (IS_ERR(addr))
  210. return PTR_ERR(addr);
  211. punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
  212. /*
  213. * The following resources are optional
  214. * - ISPDRIVER_IPC BASE_DATA
  215. * - ISPDRIVER_IPC BASE_IFACE
  216. * - GTDRIVER_IPC BASE_DATA
  217. * - GTDRIVER_IPC BASE_IFACE
  218. */
  219. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  220. if (res && resource_size(res) > 1) {
  221. addr = devm_ioremap_resource(&pdev->dev, res);
  222. if (!IS_ERR(addr))
  223. punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
  224. }
  225. res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
  226. if (res && resource_size(res) > 1) {
  227. addr = devm_ioremap_resource(&pdev->dev, res);
  228. if (!IS_ERR(addr))
  229. punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
  230. }
  231. res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
  232. if (res && resource_size(res) > 1) {
  233. addr = devm_ioremap_resource(&pdev->dev, res);
  234. if (!IS_ERR(addr))
  235. punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
  236. }
  237. res = platform_get_resource(pdev, IORESOURCE_MEM, 5);
  238. if (res && resource_size(res) > 1) {
  239. addr = devm_ioremap_resource(&pdev->dev, res);
  240. if (!IS_ERR(addr))
  241. punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
  242. }
  243. return 0;
  244. }
  245. static int intel_punit_ipc_probe(struct platform_device *pdev)
  246. {
  247. int irq, ret;
  248. punit_ipcdev = devm_kzalloc(&pdev->dev,
  249. sizeof(*punit_ipcdev), GFP_KERNEL);
  250. if (!punit_ipcdev)
  251. return -ENOMEM;
  252. platform_set_drvdata(pdev, punit_ipcdev);
  253. irq = platform_get_irq(pdev, 0);
  254. if (irq < 0) {
  255. punit_ipcdev->irq = 0;
  256. dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
  257. } else {
  258. ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
  259. IRQF_NO_SUSPEND, "intel_punit_ipc",
  260. &punit_ipcdev);
  261. if (ret) {
  262. dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
  263. return ret;
  264. }
  265. punit_ipcdev->irq = irq;
  266. }
  267. ret = intel_punit_get_bars(pdev);
  268. if (ret)
  269. goto out;
  270. punit_ipcdev->dev = &pdev->dev;
  271. mutex_init(&punit_ipcdev->lock);
  272. init_completion(&punit_ipcdev->cmd_complete);
  273. out:
  274. return ret;
  275. }
  276. static int intel_punit_ipc_remove(struct platform_device *pdev)
  277. {
  278. return 0;
  279. }
  280. static const struct acpi_device_id punit_ipc_acpi_ids[] = {
  281. { "INT34D4", 0 },
  282. { }
  283. };
  284. static struct platform_driver intel_punit_ipc_driver = {
  285. .probe = intel_punit_ipc_probe,
  286. .remove = intel_punit_ipc_remove,
  287. .driver = {
  288. .name = "intel_punit_ipc",
  289. .acpi_match_table = ACPI_PTR(punit_ipc_acpi_ids),
  290. },
  291. };
  292. static int __init intel_punit_ipc_init(void)
  293. {
  294. return platform_driver_register(&intel_punit_ipc_driver);
  295. }
  296. static void __exit intel_punit_ipc_exit(void)
  297. {
  298. platform_driver_unregister(&intel_punit_ipc_driver);
  299. }
  300. MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
  301. MODULE_DESCRIPTION("Intel P-Unit IPC driver");
  302. MODULE_LICENSE("GPL v2");
  303. /* Some modules are dependent on this, so init earlier */
  304. fs_initcall(intel_punit_ipc_init);
  305. module_exit(intel_punit_ipc_exit);