vfio_pci_intrs.c 16 KB

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  1. /*
  2. * VFIO PCI interrupt handling
  3. *
  4. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  5. * Author: Alex Williamson <alex.williamson@redhat.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Derived from original vfio:
  12. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  13. * Author: Tom Lyon, pugs@cisco.com
  14. */
  15. #include <linux/device.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/eventfd.h>
  18. #include <linux/msi.h>
  19. #include <linux/pci.h>
  20. #include <linux/file.h>
  21. #include <linux/vfio.h>
  22. #include <linux/wait.h>
  23. #include <linux/slab.h>
  24. #include "vfio_pci_private.h"
  25. /*
  26. * INTx
  27. */
  28. static void vfio_send_intx_eventfd(void *opaque, void *unused)
  29. {
  30. struct vfio_pci_device *vdev = opaque;
  31. if (likely(is_intx(vdev) && !vdev->virq_disabled))
  32. eventfd_signal(vdev->ctx[0].trigger, 1);
  33. }
  34. void vfio_pci_intx_mask(struct vfio_pci_device *vdev)
  35. {
  36. struct pci_dev *pdev = vdev->pdev;
  37. unsigned long flags;
  38. spin_lock_irqsave(&vdev->irqlock, flags);
  39. /*
  40. * Masking can come from interrupt, ioctl, or config space
  41. * via INTx disable. The latter means this can get called
  42. * even when not using intx delivery. In this case, just
  43. * try to have the physical bit follow the virtual bit.
  44. */
  45. if (unlikely(!is_intx(vdev))) {
  46. if (vdev->pci_2_3)
  47. pci_intx(pdev, 0);
  48. } else if (!vdev->ctx[0].masked) {
  49. /*
  50. * Can't use check_and_mask here because we always want to
  51. * mask, not just when something is pending.
  52. */
  53. if (vdev->pci_2_3)
  54. pci_intx(pdev, 0);
  55. else
  56. disable_irq_nosync(pdev->irq);
  57. vdev->ctx[0].masked = true;
  58. }
  59. spin_unlock_irqrestore(&vdev->irqlock, flags);
  60. }
  61. /*
  62. * If this is triggered by an eventfd, we can't call eventfd_signal
  63. * or else we'll deadlock on the eventfd wait queue. Return >0 when
  64. * a signal is necessary, which can then be handled via a work queue
  65. * or directly depending on the caller.
  66. */
  67. static int vfio_pci_intx_unmask_handler(void *opaque, void *unused)
  68. {
  69. struct vfio_pci_device *vdev = opaque;
  70. struct pci_dev *pdev = vdev->pdev;
  71. unsigned long flags;
  72. int ret = 0;
  73. spin_lock_irqsave(&vdev->irqlock, flags);
  74. /*
  75. * Unmasking comes from ioctl or config, so again, have the
  76. * physical bit follow the virtual even when not using INTx.
  77. */
  78. if (unlikely(!is_intx(vdev))) {
  79. if (vdev->pci_2_3)
  80. pci_intx(pdev, 1);
  81. } else if (vdev->ctx[0].masked && !vdev->virq_disabled) {
  82. /*
  83. * A pending interrupt here would immediately trigger,
  84. * but we can avoid that overhead by just re-sending
  85. * the interrupt to the user.
  86. */
  87. if (vdev->pci_2_3) {
  88. if (!pci_check_and_unmask_intx(pdev))
  89. ret = 1;
  90. } else
  91. enable_irq(pdev->irq);
  92. vdev->ctx[0].masked = (ret > 0);
  93. }
  94. spin_unlock_irqrestore(&vdev->irqlock, flags);
  95. return ret;
  96. }
  97. void vfio_pci_intx_unmask(struct vfio_pci_device *vdev)
  98. {
  99. if (vfio_pci_intx_unmask_handler(vdev, NULL) > 0)
  100. vfio_send_intx_eventfd(vdev, NULL);
  101. }
  102. static irqreturn_t vfio_intx_handler(int irq, void *dev_id)
  103. {
  104. struct vfio_pci_device *vdev = dev_id;
  105. unsigned long flags;
  106. int ret = IRQ_NONE;
  107. spin_lock_irqsave(&vdev->irqlock, flags);
  108. if (!vdev->pci_2_3) {
  109. disable_irq_nosync(vdev->pdev->irq);
  110. vdev->ctx[0].masked = true;
  111. ret = IRQ_HANDLED;
  112. } else if (!vdev->ctx[0].masked && /* may be shared */
  113. pci_check_and_mask_intx(vdev->pdev)) {
  114. vdev->ctx[0].masked = true;
  115. ret = IRQ_HANDLED;
  116. }
  117. spin_unlock_irqrestore(&vdev->irqlock, flags);
  118. if (ret == IRQ_HANDLED)
  119. vfio_send_intx_eventfd(vdev, NULL);
  120. return ret;
  121. }
  122. static int vfio_intx_enable(struct vfio_pci_device *vdev)
  123. {
  124. if (!is_irq_none(vdev))
  125. return -EINVAL;
  126. if (!vdev->pdev->irq)
  127. return -ENODEV;
  128. vdev->ctx = kzalloc(sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
  129. if (!vdev->ctx)
  130. return -ENOMEM;
  131. vdev->num_ctx = 1;
  132. /*
  133. * If the virtual interrupt is masked, restore it. Devices
  134. * supporting DisINTx can be masked at the hardware level
  135. * here, non-PCI-2.3 devices will have to wait until the
  136. * interrupt is enabled.
  137. */
  138. vdev->ctx[0].masked = vdev->virq_disabled;
  139. if (vdev->pci_2_3)
  140. pci_intx(vdev->pdev, !vdev->ctx[0].masked);
  141. vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX;
  142. return 0;
  143. }
  144. static int vfio_intx_set_signal(struct vfio_pci_device *vdev, int fd)
  145. {
  146. struct pci_dev *pdev = vdev->pdev;
  147. unsigned long irqflags = IRQF_SHARED;
  148. struct eventfd_ctx *trigger;
  149. unsigned long flags;
  150. int ret;
  151. if (vdev->ctx[0].trigger) {
  152. free_irq(pdev->irq, vdev);
  153. kfree(vdev->ctx[0].name);
  154. eventfd_ctx_put(vdev->ctx[0].trigger);
  155. vdev->ctx[0].trigger = NULL;
  156. }
  157. if (fd < 0) /* Disable only */
  158. return 0;
  159. vdev->ctx[0].name = kasprintf(GFP_KERNEL, "vfio-intx(%s)",
  160. pci_name(pdev));
  161. if (!vdev->ctx[0].name)
  162. return -ENOMEM;
  163. trigger = eventfd_ctx_fdget(fd);
  164. if (IS_ERR(trigger)) {
  165. kfree(vdev->ctx[0].name);
  166. return PTR_ERR(trigger);
  167. }
  168. vdev->ctx[0].trigger = trigger;
  169. if (!vdev->pci_2_3)
  170. irqflags = 0;
  171. ret = request_irq(pdev->irq, vfio_intx_handler,
  172. irqflags, vdev->ctx[0].name, vdev);
  173. if (ret) {
  174. vdev->ctx[0].trigger = NULL;
  175. kfree(vdev->ctx[0].name);
  176. eventfd_ctx_put(trigger);
  177. return ret;
  178. }
  179. /*
  180. * INTx disable will stick across the new irq setup,
  181. * disable_irq won't.
  182. */
  183. spin_lock_irqsave(&vdev->irqlock, flags);
  184. if (!vdev->pci_2_3 && vdev->ctx[0].masked)
  185. disable_irq_nosync(pdev->irq);
  186. spin_unlock_irqrestore(&vdev->irqlock, flags);
  187. return 0;
  188. }
  189. static void vfio_intx_disable(struct vfio_pci_device *vdev)
  190. {
  191. vfio_virqfd_disable(&vdev->ctx[0].unmask);
  192. vfio_virqfd_disable(&vdev->ctx[0].mask);
  193. vfio_intx_set_signal(vdev, -1);
  194. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  195. vdev->num_ctx = 0;
  196. kfree(vdev->ctx);
  197. }
  198. /*
  199. * MSI/MSI-X
  200. */
  201. static irqreturn_t vfio_msihandler(int irq, void *arg)
  202. {
  203. struct eventfd_ctx *trigger = arg;
  204. eventfd_signal(trigger, 1);
  205. return IRQ_HANDLED;
  206. }
  207. static int vfio_msi_enable(struct vfio_pci_device *vdev, int nvec, bool msix)
  208. {
  209. struct pci_dev *pdev = vdev->pdev;
  210. unsigned int flag = msix ? PCI_IRQ_MSIX : PCI_IRQ_MSI;
  211. int ret;
  212. u16 cmd;
  213. if (!is_irq_none(vdev))
  214. return -EINVAL;
  215. vdev->ctx = kcalloc(nvec, sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
  216. if (!vdev->ctx)
  217. return -ENOMEM;
  218. /* return the number of supported vectors if we can't get all: */
  219. cmd = vfio_pci_memory_lock_and_enable(vdev);
  220. ret = pci_alloc_irq_vectors(pdev, 1, nvec, flag);
  221. if (ret < nvec) {
  222. if (ret > 0)
  223. pci_free_irq_vectors(pdev);
  224. vfio_pci_memory_unlock_and_restore(vdev, cmd);
  225. kfree(vdev->ctx);
  226. return ret;
  227. }
  228. vfio_pci_memory_unlock_and_restore(vdev, cmd);
  229. vdev->num_ctx = nvec;
  230. vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX :
  231. VFIO_PCI_MSI_IRQ_INDEX;
  232. if (!msix) {
  233. /*
  234. * Compute the virtual hardware field for max msi vectors -
  235. * it is the log base 2 of the number of vectors.
  236. */
  237. vdev->msi_qmax = fls(nvec * 2 - 1) - 1;
  238. }
  239. return 0;
  240. }
  241. static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev,
  242. int vector, int fd, bool msix)
  243. {
  244. struct pci_dev *pdev = vdev->pdev;
  245. struct eventfd_ctx *trigger;
  246. int irq, ret;
  247. u16 cmd;
  248. if (vector < 0 || vector >= vdev->num_ctx)
  249. return -EINVAL;
  250. irq = pci_irq_vector(pdev, vector);
  251. if (vdev->ctx[vector].trigger) {
  252. irq_bypass_unregister_producer(&vdev->ctx[vector].producer);
  253. cmd = vfio_pci_memory_lock_and_enable(vdev);
  254. free_irq(irq, vdev->ctx[vector].trigger);
  255. vfio_pci_memory_unlock_and_restore(vdev, cmd);
  256. kfree(vdev->ctx[vector].name);
  257. eventfd_ctx_put(vdev->ctx[vector].trigger);
  258. vdev->ctx[vector].trigger = NULL;
  259. }
  260. if (fd < 0)
  261. return 0;
  262. vdev->ctx[vector].name = kasprintf(GFP_KERNEL, "vfio-msi%s[%d](%s)",
  263. msix ? "x" : "", vector,
  264. pci_name(pdev));
  265. if (!vdev->ctx[vector].name)
  266. return -ENOMEM;
  267. trigger = eventfd_ctx_fdget(fd);
  268. if (IS_ERR(trigger)) {
  269. kfree(vdev->ctx[vector].name);
  270. return PTR_ERR(trigger);
  271. }
  272. /*
  273. * The MSIx vector table resides in device memory which may be cleared
  274. * via backdoor resets. We don't allow direct access to the vector
  275. * table so even if a userspace driver attempts to save/restore around
  276. * such a reset it would be unsuccessful. To avoid this, restore the
  277. * cached value of the message prior to enabling.
  278. */
  279. cmd = vfio_pci_memory_lock_and_enable(vdev);
  280. if (msix) {
  281. struct msi_msg msg;
  282. get_cached_msi_msg(irq, &msg);
  283. pci_write_msi_msg(irq, &msg);
  284. }
  285. ret = request_irq(irq, vfio_msihandler, 0,
  286. vdev->ctx[vector].name, trigger);
  287. vfio_pci_memory_unlock_and_restore(vdev, cmd);
  288. if (ret) {
  289. kfree(vdev->ctx[vector].name);
  290. eventfd_ctx_put(trigger);
  291. return ret;
  292. }
  293. vdev->ctx[vector].producer.token = trigger;
  294. vdev->ctx[vector].producer.irq = irq;
  295. ret = irq_bypass_register_producer(&vdev->ctx[vector].producer);
  296. if (unlikely(ret)) {
  297. dev_info(&pdev->dev,
  298. "irq bypass producer (token %p) registration fails: %d\n",
  299. vdev->ctx[vector].producer.token, ret);
  300. vdev->ctx[vector].producer.token = NULL;
  301. }
  302. vdev->ctx[vector].trigger = trigger;
  303. return 0;
  304. }
  305. static int vfio_msi_set_block(struct vfio_pci_device *vdev, unsigned start,
  306. unsigned count, int32_t *fds, bool msix)
  307. {
  308. int i, j, ret = 0;
  309. if (start >= vdev->num_ctx || start + count > vdev->num_ctx)
  310. return -EINVAL;
  311. for (i = 0, j = start; i < count && !ret; i++, j++) {
  312. int fd = fds ? fds[i] : -1;
  313. ret = vfio_msi_set_vector_signal(vdev, j, fd, msix);
  314. }
  315. if (ret) {
  316. for (--j; j >= (int)start; j--)
  317. vfio_msi_set_vector_signal(vdev, j, -1, msix);
  318. }
  319. return ret;
  320. }
  321. static void vfio_msi_disable(struct vfio_pci_device *vdev, bool msix)
  322. {
  323. struct pci_dev *pdev = vdev->pdev;
  324. int i;
  325. u16 cmd;
  326. for (i = 0; i < vdev->num_ctx; i++) {
  327. vfio_virqfd_disable(&vdev->ctx[i].unmask);
  328. vfio_virqfd_disable(&vdev->ctx[i].mask);
  329. }
  330. vfio_msi_set_block(vdev, 0, vdev->num_ctx, NULL, msix);
  331. cmd = vfio_pci_memory_lock_and_enable(vdev);
  332. pci_free_irq_vectors(pdev);
  333. vfio_pci_memory_unlock_and_restore(vdev, cmd);
  334. /*
  335. * Both disable paths above use pci_intx_for_msi() to clear DisINTx
  336. * via their shutdown paths. Restore for NoINTx devices.
  337. */
  338. if (vdev->nointx)
  339. pci_intx(pdev, 0);
  340. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  341. vdev->num_ctx = 0;
  342. kfree(vdev->ctx);
  343. }
  344. /*
  345. * IOCTL support
  346. */
  347. static int vfio_pci_set_intx_unmask(struct vfio_pci_device *vdev,
  348. unsigned index, unsigned start,
  349. unsigned count, uint32_t flags, void *data)
  350. {
  351. if (!is_intx(vdev) || start != 0 || count != 1)
  352. return -EINVAL;
  353. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  354. vfio_pci_intx_unmask(vdev);
  355. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  356. uint8_t unmask = *(uint8_t *)data;
  357. if (unmask)
  358. vfio_pci_intx_unmask(vdev);
  359. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  360. int32_t fd = *(int32_t *)data;
  361. if (fd >= 0)
  362. return vfio_virqfd_enable((void *) vdev,
  363. vfio_pci_intx_unmask_handler,
  364. vfio_send_intx_eventfd, NULL,
  365. &vdev->ctx[0].unmask, fd);
  366. vfio_virqfd_disable(&vdev->ctx[0].unmask);
  367. }
  368. return 0;
  369. }
  370. static int vfio_pci_set_intx_mask(struct vfio_pci_device *vdev,
  371. unsigned index, unsigned start,
  372. unsigned count, uint32_t flags, void *data)
  373. {
  374. if (!is_intx(vdev) || start != 0 || count != 1)
  375. return -EINVAL;
  376. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  377. vfio_pci_intx_mask(vdev);
  378. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  379. uint8_t mask = *(uint8_t *)data;
  380. if (mask)
  381. vfio_pci_intx_mask(vdev);
  382. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  383. return -ENOTTY; /* XXX implement me */
  384. }
  385. return 0;
  386. }
  387. static int vfio_pci_set_intx_trigger(struct vfio_pci_device *vdev,
  388. unsigned index, unsigned start,
  389. unsigned count, uint32_t flags, void *data)
  390. {
  391. if (is_intx(vdev) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
  392. vfio_intx_disable(vdev);
  393. return 0;
  394. }
  395. if (!(is_intx(vdev) || is_irq_none(vdev)) || start != 0 || count != 1)
  396. return -EINVAL;
  397. if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  398. int32_t fd = *(int32_t *)data;
  399. int ret;
  400. if (is_intx(vdev))
  401. return vfio_intx_set_signal(vdev, fd);
  402. ret = vfio_intx_enable(vdev);
  403. if (ret)
  404. return ret;
  405. ret = vfio_intx_set_signal(vdev, fd);
  406. if (ret)
  407. vfio_intx_disable(vdev);
  408. return ret;
  409. }
  410. if (!is_intx(vdev))
  411. return -EINVAL;
  412. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  413. vfio_send_intx_eventfd(vdev, NULL);
  414. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  415. uint8_t trigger = *(uint8_t *)data;
  416. if (trigger)
  417. vfio_send_intx_eventfd(vdev, NULL);
  418. }
  419. return 0;
  420. }
  421. static int vfio_pci_set_msi_trigger(struct vfio_pci_device *vdev,
  422. unsigned index, unsigned start,
  423. unsigned count, uint32_t flags, void *data)
  424. {
  425. int i;
  426. bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false;
  427. if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
  428. vfio_msi_disable(vdev, msix);
  429. return 0;
  430. }
  431. if (!(irq_is(vdev, index) || is_irq_none(vdev)))
  432. return -EINVAL;
  433. if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  434. int32_t *fds = data;
  435. int ret;
  436. if (vdev->irq_type == index)
  437. return vfio_msi_set_block(vdev, start, count,
  438. fds, msix);
  439. ret = vfio_msi_enable(vdev, start + count, msix);
  440. if (ret)
  441. return ret;
  442. ret = vfio_msi_set_block(vdev, start, count, fds, msix);
  443. if (ret)
  444. vfio_msi_disable(vdev, msix);
  445. return ret;
  446. }
  447. if (!irq_is(vdev, index) || start + count > vdev->num_ctx)
  448. return -EINVAL;
  449. for (i = start; i < start + count; i++) {
  450. if (!vdev->ctx[i].trigger)
  451. continue;
  452. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  453. eventfd_signal(vdev->ctx[i].trigger, 1);
  454. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  455. uint8_t *bools = data;
  456. if (bools[i - start])
  457. eventfd_signal(vdev->ctx[i].trigger, 1);
  458. }
  459. }
  460. return 0;
  461. }
  462. static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
  463. unsigned int count, uint32_t flags,
  464. void *data)
  465. {
  466. /* DATA_NONE/DATA_BOOL enables loopback testing */
  467. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  468. if (*ctx) {
  469. if (count) {
  470. eventfd_signal(*ctx, 1);
  471. } else {
  472. eventfd_ctx_put(*ctx);
  473. *ctx = NULL;
  474. }
  475. return 0;
  476. }
  477. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  478. uint8_t trigger;
  479. if (!count)
  480. return -EINVAL;
  481. trigger = *(uint8_t *)data;
  482. if (trigger && *ctx)
  483. eventfd_signal(*ctx, 1);
  484. return 0;
  485. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  486. int32_t fd;
  487. if (!count)
  488. return -EINVAL;
  489. fd = *(int32_t *)data;
  490. if (fd == -1) {
  491. if (*ctx)
  492. eventfd_ctx_put(*ctx);
  493. *ctx = NULL;
  494. } else if (fd >= 0) {
  495. struct eventfd_ctx *efdctx;
  496. efdctx = eventfd_ctx_fdget(fd);
  497. if (IS_ERR(efdctx))
  498. return PTR_ERR(efdctx);
  499. if (*ctx)
  500. eventfd_ctx_put(*ctx);
  501. *ctx = efdctx;
  502. }
  503. return 0;
  504. }
  505. return -EINVAL;
  506. }
  507. static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev,
  508. unsigned index, unsigned start,
  509. unsigned count, uint32_t flags, void *data)
  510. {
  511. if (index != VFIO_PCI_ERR_IRQ_INDEX || start != 0 || count > 1)
  512. return -EINVAL;
  513. return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger,
  514. count, flags, data);
  515. }
  516. static int vfio_pci_set_req_trigger(struct vfio_pci_device *vdev,
  517. unsigned index, unsigned start,
  518. unsigned count, uint32_t flags, void *data)
  519. {
  520. if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count > 1)
  521. return -EINVAL;
  522. return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger,
  523. count, flags, data);
  524. }
  525. int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
  526. unsigned index, unsigned start, unsigned count,
  527. void *data)
  528. {
  529. int (*func)(struct vfio_pci_device *vdev, unsigned index,
  530. unsigned start, unsigned count, uint32_t flags,
  531. void *data) = NULL;
  532. switch (index) {
  533. case VFIO_PCI_INTX_IRQ_INDEX:
  534. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  535. case VFIO_IRQ_SET_ACTION_MASK:
  536. func = vfio_pci_set_intx_mask;
  537. break;
  538. case VFIO_IRQ_SET_ACTION_UNMASK:
  539. func = vfio_pci_set_intx_unmask;
  540. break;
  541. case VFIO_IRQ_SET_ACTION_TRIGGER:
  542. func = vfio_pci_set_intx_trigger;
  543. break;
  544. }
  545. break;
  546. case VFIO_PCI_MSI_IRQ_INDEX:
  547. case VFIO_PCI_MSIX_IRQ_INDEX:
  548. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  549. case VFIO_IRQ_SET_ACTION_MASK:
  550. case VFIO_IRQ_SET_ACTION_UNMASK:
  551. /* XXX Need masking support exported */
  552. break;
  553. case VFIO_IRQ_SET_ACTION_TRIGGER:
  554. func = vfio_pci_set_msi_trigger;
  555. break;
  556. }
  557. break;
  558. case VFIO_PCI_ERR_IRQ_INDEX:
  559. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  560. case VFIO_IRQ_SET_ACTION_TRIGGER:
  561. if (pci_is_pcie(vdev->pdev))
  562. func = vfio_pci_set_err_trigger;
  563. break;
  564. }
  565. break;
  566. case VFIO_PCI_REQ_IRQ_INDEX:
  567. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  568. case VFIO_IRQ_SET_ACTION_TRIGGER:
  569. func = vfio_pci_set_req_trigger;
  570. break;
  571. }
  572. break;
  573. }
  574. if (!func)
  575. return -ENOTTY;
  576. return func(vdev, index, start, count, flags, data);
  577. }