cop2-ex.c 2.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2013 Broadcom Corporation.
  7. *
  8. * based on arch/mips/cavium-octeon/cpu.c
  9. * Copyright (C) 2009 Wind River Systems,
  10. * written by Ralf Baechle <ralf@linux-mips.org>
  11. */
  12. #include <linux/capability.h>
  13. #include <linux/init.h>
  14. #include <linux/irqflags.h>
  15. #include <linux/notifier.h>
  16. #include <linux/prefetch.h>
  17. #include <linux/ptrace.h>
  18. #include <linux/sched.h>
  19. #include <linux/sched/task_stack.h>
  20. #include <asm/cop2.h>
  21. #include <asm/current.h>
  22. #include <asm/mipsregs.h>
  23. #include <asm/page.h>
  24. #include <asm/netlogic/mips-extns.h>
  25. /*
  26. * 64 bit ops are done in inline assembly to support 32 bit
  27. * compilation
  28. */
  29. void nlm_cop2_save(struct nlm_cop2_state *r)
  30. {
  31. asm volatile(
  32. ".set push\n"
  33. ".set noat\n"
  34. "dmfc2 $1, $0, 0\n"
  35. "sd $1, 0(%1)\n"
  36. "dmfc2 $1, $0, 1\n"
  37. "sd $1, 8(%1)\n"
  38. "dmfc2 $1, $0, 2\n"
  39. "sd $1, 16(%1)\n"
  40. "dmfc2 $1, $0, 3\n"
  41. "sd $1, 24(%1)\n"
  42. "dmfc2 $1, $1, 0\n"
  43. "sd $1, 0(%2)\n"
  44. "dmfc2 $1, $1, 1\n"
  45. "sd $1, 8(%2)\n"
  46. "dmfc2 $1, $1, 2\n"
  47. "sd $1, 16(%2)\n"
  48. "dmfc2 $1, $1, 3\n"
  49. "sd $1, 24(%2)\n"
  50. ".set pop\n"
  51. : "=m"(*r)
  52. : "r"(r->tx), "r"(r->rx));
  53. r->tx_msg_status = __read_32bit_c2_register($2, 0);
  54. r->rx_msg_status = __read_32bit_c2_register($3, 0) & 0x0fffffff;
  55. }
  56. void nlm_cop2_restore(struct nlm_cop2_state *r)
  57. {
  58. u32 rstat;
  59. asm volatile(
  60. ".set push\n"
  61. ".set noat\n"
  62. "ld $1, 0(%1)\n"
  63. "dmtc2 $1, $0, 0\n"
  64. "ld $1, 8(%1)\n"
  65. "dmtc2 $1, $0, 1\n"
  66. "ld $1, 16(%1)\n"
  67. "dmtc2 $1, $0, 2\n"
  68. "ld $1, 24(%1)\n"
  69. "dmtc2 $1, $0, 3\n"
  70. "ld $1, 0(%2)\n"
  71. "dmtc2 $1, $1, 0\n"
  72. "ld $1, 8(%2)\n"
  73. "dmtc2 $1, $1, 1\n"
  74. "ld $1, 16(%2)\n"
  75. "dmtc2 $1, $1, 2\n"
  76. "ld $1, 24(%2)\n"
  77. "dmtc2 $1, $1, 3\n"
  78. ".set pop\n"
  79. : : "m"(*r), "r"(r->tx), "r"(r->rx));
  80. __write_32bit_c2_register($2, 0, r->tx_msg_status);
  81. rstat = __read_32bit_c2_register($3, 0) & 0xf0000000u;
  82. __write_32bit_c2_register($3, 0, r->rx_msg_status | rstat);
  83. }
  84. static int nlm_cu2_call(struct notifier_block *nfb, unsigned long action,
  85. void *data)
  86. {
  87. unsigned long flags;
  88. unsigned int status;
  89. switch (action) {
  90. case CU2_EXCEPTION:
  91. if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
  92. break;
  93. local_irq_save(flags);
  94. KSTK_STATUS(current) |= ST0_CU2;
  95. status = read_c0_status();
  96. write_c0_status(status | ST0_CU2);
  97. nlm_cop2_restore(&(current->thread.cp2));
  98. write_c0_status(status & ~ST0_CU2);
  99. local_irq_restore(flags);
  100. pr_info("COP2 access enabled for pid %d (%s)\n",
  101. current->pid, current->comm);
  102. return NOTIFY_BAD; /* Don't call default notifier */
  103. }
  104. return NOTIFY_OK; /* Let default notifier send signals */
  105. }
  106. static int __init nlm_cu2_setup(void)
  107. {
  108. return cu2_notifier(nlm_cu2_call, 0);
  109. }
  110. early_initcall(nlm_cu2_setup);