ark1668e-adc.c 10.0 KB

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  1. #include <linux/kernel.h>
  2. #include <linux/module.h>
  3. #include <linux/platform_device.h>
  4. #include <linux/io.h>
  5. #include <linux/iio/iio.h>
  6. #include <linux/iio/machine.h>
  7. #include <linux/iio/driver.h>
  8. #include <linux/mfd/syscon.h>
  9. #include <linux/regmap.h>
  10. #include <linux/of_platform.h>
  11. #include <linux/err.h>
  12. #include <linux/errno.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/delay.h>
  15. #include <linux/clk.h>
  16. #include <linux/completion.h>
  17. #define ADC_CHANNEL_MAX_NUMS 8
  18. #define ADC_ARK1668E_CHANNEL_NUM 4
  19. struct ark_adc {
  20. struct ark_adc_data *data;
  21. struct device *dev;
  22. void __iomem *sys_base;
  23. void __iomem *adc_base;
  24. struct clk *clk;
  25. struct completion completion;
  26. u32 irq;
  27. bool pull_down;
  28. u32 value[ADC_CHANNEL_MAX_NUMS];
  29. };
  30. struct ark_adc_data {
  31. int num_channels;
  32. u32 mask;
  33. void (*init_hw)(struct ark_adc *info);
  34. void (*exit_hw)(struct ark_adc *info);
  35. //void (*clear_irq)(struct ark_adc *info);
  36. void (*start_conv)(struct ark_adc *info, unsigned long addr);
  37. };
  38. #define ADC_CTL0 0x0
  39. #define ADC_CTL1 0x4
  40. #define ADC_IMR 0x8
  41. #define ADC_STA 0xc
  42. #define ADC_INTER 0x10
  43. #define ADC_DBNCNT 0x14
  44. #define ADC_AUX10 0x18
  45. #define ADC_AUX32 0x1c
  46. #define ADC_AUX54 0x20
  47. #define ADC_AUX76 0x24
  48. #define AUX_START_INT(ch) (1 << ((ch) * 3 + 0))
  49. #define AUX_STOP_INT(ch) (1 << ((ch) * 3 + 1))
  50. #define AUX_VALUE_INT(ch) (1 << ((ch) * 3 + 2))
  51. #define AUX_START_INTMASK(ch) (1 << ((ch) + 0))
  52. #define AUX_STOP_INTMASK(ch) (1 << ((ch) + 8))
  53. #define AUX_VALUE_INTMASK(ch) (1 << ((ch) + 16))
  54. #define ARK_ADC_DATX_MASK_12BIT 0xFFF
  55. #define ARK_ADC_DATX_MASK_10BIT 0x3FF
  56. #define ARK_ADC_VOLTAGE_REF 3300// 3.3V
  57. #define ARK_ADC_TIMEOUT (msecs_to_jiffies(20))
  58. #define ADC_CHANNEL(_index, _id) { \
  59. .type = IIO_VOLTAGE, \
  60. .indexed = 1, \
  61. .channel = _index, \
  62. .address = _index, \
  63. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  64. .datasheet_name = _id, \
  65. }
  66. static const struct iio_chan_spec ark_adc_iio_channels[] = {
  67. ADC_CHANNEL(0, "adc0"),
  68. ADC_CHANNEL(1, "adc1"),
  69. ADC_CHANNEL(2, "adc2"),
  70. ADC_CHANNEL(3, "adc3"),
  71. };
  72. static u32 ark1668e_get_aux_value(struct ark_adc *info, unsigned int ch)
  73. {
  74. u32 val;
  75. val = readl(info->adc_base + ADC_AUX10 + ch / 2 * 4);
  76. if (ch & 1)
  77. val = (val >> 16) & 0xfff;
  78. else
  79. val = val & 0xfff;
  80. return val;
  81. }
  82. static void ark1668e_adc_disable_channel(struct ark_adc *info, unsigned int ch)
  83. {
  84. u32 val;
  85. if (ch >= ADC_CHANNEL_MAX_NUMS)
  86. return;
  87. val = readl(info->adc_base + ADC_CTL0);
  88. val &= ~(1 << ch);
  89. writel(val, info->adc_base + ADC_CTL0);
  90. }
  91. static void ark1668e_adc_enable_channel(struct ark_adc *info, unsigned int ch)
  92. {
  93. u32 val;
  94. if (ch >= ADC_CHANNEL_MAX_NUMS)
  95. return;
  96. val = readl(info->adc_base + ADC_CTL0);
  97. val |= 1 << ch;
  98. writel(val, info->adc_base + ADC_CTL0);
  99. }
  100. static int ark_adc_reg_access(struct iio_dev *indio_dev,
  101. unsigned reg, unsigned writeval,
  102. unsigned *readval)
  103. {
  104. struct ark_adc *info = iio_priv(indio_dev);
  105. u32 val;
  106. if (readval != NULL) {
  107. val = readl(info->adc_base + reg);
  108. *readval = val;
  109. } else {
  110. writel(val, info->adc_base + reg);
  111. }
  112. return 0;
  113. }
  114. static int ark_read_raw(struct iio_dev *indio_dev,
  115. struct iio_chan_spec const *chan,
  116. int *val,
  117. int *val2,
  118. long mask)
  119. {
  120. struct ark_adc *info = iio_priv(indio_dev);
  121. unsigned long timeout;
  122. int ret = 0;
  123. mutex_lock(&indio_dev->mlock);
  124. reinit_completion(&info->completion);
  125. /* Select the channel to be used and Trigger conversion */
  126. if (info->data->start_conv)
  127. info->data->start_conv(info, chan->address);
  128. timeout = wait_for_completion_timeout(&info->completion, ARK_ADC_TIMEOUT);
  129. if (timeout == 0)
  130. dev_warn(&indio_dev->dev, "Conversion timed out!\n");
  131. *val = info->value[chan->address];
  132. *val2 = 0;
  133. ret = IIO_VAL_INT;
  134. ark1668e_adc_disable_channel(info, chan->address);
  135. mutex_unlock(&indio_dev->mlock);
  136. return ret;
  137. }
  138. static const struct iio_info ark_adc_iio_info = {
  139. .read_raw = &ark_read_raw,
  140. .debugfs_reg_access = &ark_adc_reg_access,
  141. };
  142. static void ark1668e_adc_init_hw(struct ark_adc *info)
  143. {
  144. unsigned int val;
  145. //soft reset
  146. val = readl(info->sys_base + 0x74);
  147. val &= ~(1 << 2);
  148. writel(val, info->sys_base + 0x74);
  149. udelay(1);
  150. val |= 1 << 2;
  151. writel(val, info->sys_base + 0x74);
  152. udelay(1);
  153. val = readl(info->adc_base + ADC_CTL1);
  154. val |= 0x3f << 16;
  155. writel(val, info->adc_base + ADC_CTL1);
  156. val = readl(info->adc_base + ADC_CTL0);
  157. val &= ~(1 << 31);
  158. val &= ~0xff;
  159. val |= 0xff << 16;
  160. writel(val, info->adc_base + ADC_CTL0);
  161. //set transform interval 10ms
  162. val = readl(info->adc_base + ADC_INTER);
  163. val &= ~0xffff;;
  164. val |= 10000;
  165. writel(val, info->adc_base + ADC_INTER);
  166. //enable interrupt
  167. writel(0x0, info->adc_base + ADC_IMR);
  168. }
  169. static void ark1668e_adc_exit_hw(struct ark_adc *info)
  170. {
  171. //printk(KERN_ALERT "### exit\n");
  172. }
  173. static void ark1668e_adc_start_conv(struct ark_adc *info, unsigned long addr)
  174. {
  175. int i;
  176. if (addr >= ADC_CHANNEL_MAX_NUMS)
  177. return;
  178. if (info->pull_down)
  179. info->value[addr] = 0;
  180. else
  181. info->value[addr] = ARK_ADC_VOLTAGE_REF;
  182. for (i = 0; i < ADC_CHANNEL_MAX_NUMS; i++) {
  183. if (i == addr)
  184. ark1668e_adc_enable_channel(info, i);
  185. else
  186. ark1668e_adc_disable_channel(info, i);
  187. }
  188. }
  189. static const struct ark_adc_data ark1668e_adc_data = {
  190. .num_channels = ADC_ARK1668E_CHANNEL_NUM,
  191. .mask = ARK_ADC_DATX_MASK_12BIT,
  192. .init_hw = ark1668e_adc_init_hw,
  193. .exit_hw = ark1668e_adc_exit_hw,
  194. .start_conv = ark1668e_adc_start_conv,
  195. };
  196. static const struct of_device_id ark_adc_match[] = {
  197. {
  198. .compatible = "arkmicro,ark1668e-adc",
  199. .data = &ark1668e_adc_data,
  200. },
  201. {},
  202. };
  203. MODULE_DEVICE_TABLE(of, ark_adc_match);
  204. static struct ark_adc_data *ark_adc_get_data(struct platform_device *pdev)
  205. {
  206. const struct of_device_id *match = of_match_node(ark_adc_match, pdev->dev.of_node);
  207. return (struct ark_adc_data *)match->data;
  208. }
  209. static irqreturn_t ark_adc_intr_handler(int irq, void *dev_id)
  210. {
  211. struct ark_adc *info = (struct ark_adc *)dev_id;
  212. u32 val, range, status;
  213. int i;
  214. status = readl(info->adc_base + ADC_STA);
  215. writel(0, info->adc_base + ADC_STA);
  216. //printk(KERN_ALERT "++++++ark_adc_intr_handler status=0x%x\n", status);
  217. for (i = 0; i < ADC_CHANNEL_MAX_NUMS; i++) {
  218. if (status & AUX_START_INT(i)) {
  219. //printk(KERN_ALERT "ch%d start int.\n", i);
  220. }
  221. if (status & AUX_STOP_INT(i)) {
  222. //printk(KERN_ALERT "ch%d stop int.\n", i);
  223. if (info->pull_down)
  224. info->value[i] = 0;
  225. else
  226. info->value[i] = ARK_ADC_VOLTAGE_REF;
  227. }
  228. if (status & AUX_VALUE_INT(i)) {
  229. //printk(KERN_ALERT "ch%d value int.\n", i);
  230. val = ark1668e_get_aux_value(info, i);
  231. range = (info->data->mask == ARK_ADC_DATX_MASK_12BIT) ? 4096 : 1024;
  232. info->value[i] = val * ARK_ADC_VOLTAGE_REF / range;
  233. complete(&info->completion);
  234. }
  235. }
  236. return IRQ_HANDLED;
  237. }
  238. static int ark_adc_probe(struct platform_device *pdev)
  239. {
  240. struct device_node *np = pdev->dev.of_node;
  241. struct iio_dev *indio_dev = NULL;
  242. struct ark_adc *info = NULL;
  243. struct resource *res = NULL;
  244. int ret = -ENODEV;
  245. int i;
  246. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct ark_adc));
  247. if (!indio_dev) {
  248. dev_err(&pdev->dev, "failed allocating iio device\n");
  249. return -ENOMEM;
  250. }
  251. info = iio_priv(indio_dev);
  252. //get data
  253. info->data = ark_adc_get_data(pdev);
  254. if (!info->data) {
  255. dev_err(&pdev->dev, "failed getting ark_adc_data\n");
  256. goto err_devm_iio_device_alloc;
  257. }
  258. //adc resource
  259. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  260. info->adc_base = devm_ioremap_resource(&pdev->dev, res);
  261. if (IS_ERR(info->adc_base)) {
  262. ret = PTR_ERR(info->adc_base);
  263. goto err_resource;
  264. }
  265. //sys resource
  266. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  267. if (IS_ERR(res)) {
  268. ret = PTR_ERR(res);
  269. goto err_resource;
  270. }
  271. info->sys_base = ioremap(res->start, resource_size(res));
  272. if (IS_ERR(info->sys_base)) {
  273. ret = PTR_ERR(info->sys_base);
  274. goto err_resource;
  275. }
  276. //irq
  277. info->irq = platform_get_irq(pdev, 0);
  278. if (info->irq < 0) {
  279. dev_err(&pdev->dev, "no irq resource\n");
  280. ret = info->irq;
  281. goto err_irq;
  282. }
  283. ret = devm_request_irq(
  284. &pdev->dev,
  285. info->irq,
  286. ark_adc_intr_handler,
  287. 0,//IRQF_SHARED|IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, //SA_SHIRQ,
  288. dev_name(&pdev->dev),//"adc",
  289. info
  290. );
  291. if (ret < 0) {
  292. dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", info->irq);
  293. goto err_irq;
  294. }
  295. info->pull_down = of_property_read_bool(np, "pull-down");
  296. for (i = 0; i < ADC_CHANNEL_MAX_NUMS; i++) {
  297. if (info->pull_down)
  298. info->value[i] = 0;
  299. else
  300. info->value[i] = ARK_ADC_VOLTAGE_REF;
  301. }
  302. info->dev = &pdev->dev;
  303. platform_set_drvdata(pdev, indio_dev);
  304. indio_dev->name = dev_name(&pdev->dev);
  305. indio_dev->dev.parent = &pdev->dev;
  306. indio_dev->dev.of_node = pdev->dev.of_node;
  307. indio_dev->info = &ark_adc_iio_info;
  308. indio_dev->modes = INDIO_DIRECT_MODE;
  309. indio_dev->channels = ark_adc_iio_channels;
  310. indio_dev->num_channels = info->data->num_channels;
  311. ret = iio_device_register(indio_dev);
  312. if(ret)
  313. goto err_iio_device_register;
  314. //ret = of_platform_populate(np, ark_adc_match, NULL, &indio_dev->dev);
  315. //if (ret < 0) {
  316. // dev_err(&pdev->dev, "failed adding child nodes\n");
  317. // goto err_of_populate;
  318. //}
  319. init_completion(&info->completion);
  320. if (info->data->init_hw)
  321. info->data->init_hw(info);
  322. //printk(KERN_ALERT "++++++ark1668e_adc_probe success\n");
  323. return 0;
  324. err_iio_device_register:
  325. err_irq:
  326. if(info->sys_base)
  327. devm_iounmap(&pdev->dev, info->sys_base);
  328. err_resource:
  329. err_devm_iio_device_alloc:
  330. return ret;
  331. }
  332. static int ark_adc_remove(struct platform_device *pdev)
  333. {
  334. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  335. struct ark_adc *info = iio_priv(indio_dev);
  336. if(!info)
  337. return -ENODEV;
  338. iio_device_unregister(indio_dev);
  339. if(info->sys_base)
  340. devm_iounmap(&pdev->dev, info->sys_base);
  341. return 0;
  342. }
  343. static struct platform_driver ark_adc_driver = {
  344. .probe = ark_adc_probe,
  345. .remove = ark_adc_remove,
  346. .driver = {
  347. .name = "ark1668e-adc",
  348. .owner = THIS_MODULE,
  349. .of_match_table = ark_adc_match,
  350. },
  351. };
  352. module_platform_driver(ark_adc_driver);
  353. MODULE_LICENSE("GPL v2");
  354. MODULE_DESCRIPTION("Arkmicro ADC Driver");