cpld.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /**
  3. * Copyright 2014 Freescale Semiconductor
  4. *
  5. * This file provides support for the board-specific CPLD used on some Freescale
  6. * reference boards.
  7. *
  8. * The following macros need to be defined:
  9. *
  10. * CONFIG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
  11. */
  12. #include <common.h>
  13. #include <command.h>
  14. #include <asm/io.h>
  15. #include "cpld.h"
  16. u8 cpld_read(unsigned int reg)
  17. {
  18. void *p = (void *)CONFIG_SYS_CPLD_BASE;
  19. return in_8(p + reg);
  20. }
  21. void cpld_write(unsigned int reg, u8 value)
  22. {
  23. void *p = (void *)CONFIG_SYS_CPLD_BASE;
  24. out_8(p + reg, value);
  25. }
  26. /**
  27. * Set the boot bank to the alternate bank
  28. */
  29. void cpld_set_altbank(void)
  30. {
  31. u8 reg = CPLD_READ(flash_ctl_status);
  32. reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
  33. CPLD_WRITE(flash_ctl_status, reg);
  34. CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
  35. }
  36. /**
  37. * Set the boot bank to the default bank
  38. */
  39. void cpld_set_defbank(void)
  40. {
  41. u8 reg = CPLD_READ(flash_ctl_status);
  42. reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
  43. CPLD_WRITE(flash_ctl_status, reg);
  44. CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
  45. }
  46. #ifdef DEBUG
  47. static void cpld_dump_regs(void)
  48. {
  49. printf("cpld_ver = 0x%02x\n", CPLD_READ(cpld_ver));
  50. printf("cpld_ver_sub = 0x%02x\n", CPLD_READ(cpld_ver_sub));
  51. printf("hw_ver = 0x%02x\n", CPLD_READ(hw_ver));
  52. printf("sw_ver = 0x%02x\n", CPLD_READ(sw_ver));
  53. printf("reset_ctl1 = 0x%02x\n", CPLD_READ(reset_ctl1));
  54. printf("reset_ctl2 = 0x%02x\n", CPLD_READ(reset_ctl2));
  55. printf("int_status = 0x%02x\n", CPLD_READ(int_status));
  56. printf("flash_ctl_status = 0x%02x\n", CPLD_READ(flash_ctl_status));
  57. printf("fan_ctl_status = 0x%02x\n", CPLD_READ(fan_ctl_status));
  58. #if defined(CONFIG_TARGET_T1040D4D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
  59. printf("int_mask = 0x%02x\n", CPLD_READ(int_mask));
  60. #else
  61. printf("led_ctl_status = 0x%02x\n", CPLD_READ(led_ctl_status));
  62. #endif
  63. printf("sfp_ctl_status = 0x%02x\n", CPLD_READ(sfp_ctl_status));
  64. printf("misc_ctl_status = 0x%02x\n", CPLD_READ(misc_ctl_status));
  65. printf("boot_override = 0x%02x\n", CPLD_READ(boot_override));
  66. printf("boot_config1 = 0x%02x\n", CPLD_READ(boot_config1));
  67. printf("boot_config2 = 0x%02x\n", CPLD_READ(boot_config2));
  68. putc('\n');
  69. }
  70. #endif
  71. int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  72. {
  73. int rc = 0;
  74. if (argc <= 1)
  75. return cmd_usage(cmdtp);
  76. if (strcmp(argv[1], "reset") == 0) {
  77. if (strcmp(argv[2], "altbank") == 0)
  78. cpld_set_altbank();
  79. else
  80. cpld_set_defbank();
  81. #ifdef DEBUG
  82. } else if (strcmp(argv[1], "dump") == 0) {
  83. cpld_dump_regs();
  84. #endif
  85. } else
  86. rc = cmd_usage(cmdtp);
  87. return rc;
  88. }
  89. U_BOOT_CMD(
  90. cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
  91. "Reset the board or alternate bank",
  92. "reset - hard reset to default bank\n"
  93. "cpld reset altbank - reset to alternate bank\n"
  94. #ifdef DEBUG
  95. "cpld dump - display the CPLD registers\n"
  96. #endif
  97. );