ccu-sun8i-a83t.h 1.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. /*
  2. * Copyright 2016 Chen-Yu Tsai
  3. *
  4. * Chen-Yu Tsai <wens@csie.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #ifndef _CCU_SUN8I_A83T_H_
  17. #define _CCU_SUN8I_A83T_H_
  18. #include <dt-bindings/clock/sun8i-a83t-ccu.h>
  19. #include <dt-bindings/reset/sun8i-a83t-ccu.h>
  20. #define CLK_PLL_C0CPUX 0
  21. #define CLK_PLL_C1CPUX 1
  22. #define CLK_PLL_AUDIO 2
  23. #define CLK_PLL_VIDEO0 3
  24. #define CLK_PLL_VE 4
  25. #define CLK_PLL_DDR 5
  26. /* pll-periph is exported to the PRCM block */
  27. #define CLK_PLL_GPU 7
  28. #define CLK_PLL_HSIC 8
  29. /* pll-de is exported for the display engine */
  30. #define CLK_PLL_VIDEO1 10
  31. /* The CPUX clocks are exported */
  32. #define CLK_AXI0 13
  33. #define CLK_AXI1 14
  34. #define CLK_AHB1 15
  35. #define CLK_AHB2 16
  36. #define CLK_APB1 17
  37. #define CLK_APB2 18
  38. /* bus gates exported */
  39. #define CLK_CCI400 58
  40. /* module and usb clocks exported */
  41. #define CLK_DRAM 82
  42. /* dram gates and more module clocks exported */
  43. #define CLK_MBUS 95
  44. /* more module clocks exported */
  45. #define CLK_NUMBER (CLK_GPU_HYD + 1)
  46. #endif /* _CCU_SUN8I_A83T_H_ */