armada-3720-espressobin.dts 3.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Globalscale Marvell ESPRESSOBin Board
  4. * Copyright (C) 2016 Marvell
  5. *
  6. * Romain Perier <romain.perier@free-electrons.com>
  7. *
  8. */
  9. /*
  10. * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
  11. */
  12. /dts-v1/;
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include "armada-372x.dtsi"
  15. / {
  16. model = "Globalscale Marvell ESPRESSOBin Board";
  17. compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
  18. aliases {
  19. ethernet0 = &eth0;
  20. /* for dsa slave device */
  21. ethernet1 = &switch0port1;
  22. ethernet2 = &switch0port2;
  23. ethernet3 = &switch0port3;
  24. serial0 = &uart0;
  25. serial1 = &uart1;
  26. };
  27. chosen {
  28. stdout-path = "serial0:115200n8";
  29. };
  30. memory@0 {
  31. device_type = "memory";
  32. reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  33. };
  34. vcc_sd_reg1: regulator {
  35. compatible = "regulator-gpio";
  36. regulator-name = "vcc_sd1";
  37. regulator-min-microvolt = <1800000>;
  38. regulator-max-microvolt = <3300000>;
  39. regulator-boot-on;
  40. gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
  41. gpios-states = <0>;
  42. states = <1800000 0x1
  43. 3300000 0x0>;
  44. enable-active-high;
  45. };
  46. };
  47. /* J9 */
  48. &pcie0 {
  49. status = "okay";
  50. };
  51. /* J6 */
  52. &sata {
  53. status = "okay";
  54. };
  55. /* J1 */
  56. &sdhci1 {
  57. wp-inverted;
  58. bus-width = <4>;
  59. cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  60. marvell,pad-type = "sd";
  61. vqmmc-supply = <&vcc_sd_reg1>;
  62. status = "okay";
  63. };
  64. &spi0 {
  65. status = "okay";
  66. flash@0 {
  67. reg = <0>;
  68. compatible = "winbond,w25q32dw", "jedec,spi-flash";
  69. spi-max-frequency = <104000000>;
  70. m25p,fast-read;
  71. partitions {
  72. compatible = "fixed-partitions";
  73. #address-cells = <1>;
  74. #size-cells = <1>;
  75. partition@0 {
  76. label = "uboot";
  77. reg = <0 0x180000>;
  78. };
  79. partition@180000 {
  80. label = "ubootenv";
  81. reg = <0x180000 0x10000>;
  82. };
  83. };
  84. };
  85. };
  86. /* Exported on the micro USB connector J5 through an FTDI */
  87. &uart0 {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&uart1_pins>;
  90. status = "okay";
  91. };
  92. /*
  93. * Connector J17 and J18 expose a number of different features. Some pins are
  94. * multiplexed. This is the case for instance for the following features:
  95. * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
  96. * how to enable it. Beware that the signals are 1.8V TTL.
  97. * - I2C
  98. * - SPI
  99. * - MMC
  100. */
  101. /* J7 */
  102. &usb3 {
  103. status = "okay";
  104. };
  105. /* J8 */
  106. &usb2 {
  107. status = "okay";
  108. };
  109. &mdio {
  110. switch0: switch0@1 {
  111. compatible = "marvell,mv88e6085";
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. reg = <1>;
  115. dsa,member = <0 0>;
  116. ports {
  117. #address-cells = <1>;
  118. #size-cells = <0>;
  119. switch0port0: port@0 {
  120. reg = <0>;
  121. label = "cpu";
  122. ethernet = <&eth0>;
  123. };
  124. switch0port1: port@1 {
  125. reg = <1>;
  126. label = "wan";
  127. phy-handle = <&switch0phy0>;
  128. };
  129. switch0port2: port@2 {
  130. reg = <2>;
  131. label = "lan0";
  132. phy-handle = <&switch0phy1>;
  133. };
  134. switch0port3: port@3 {
  135. reg = <3>;
  136. label = "lan1";
  137. phy-handle = <&switch0phy2>;
  138. };
  139. };
  140. mdio {
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. switch0phy0: switch0phy0@11 {
  144. reg = <0x11>;
  145. };
  146. switch0phy1: switch0phy1@12 {
  147. reg = <0x12>;
  148. };
  149. switch0phy2: switch0phy2@13 {
  150. reg = <0x13>;
  151. };
  152. };
  153. };
  154. };
  155. &eth0 {
  156. phy-mode = "rgmii-id";
  157. status = "okay";
  158. fixed-link {
  159. speed = <1000>;
  160. full-duplex;
  161. };
  162. };