e1000_ethtool.c 51 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887
  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2006 Intel Corporation. */
  3. /* ethtool support for e1000 */
  4. #include "e1000.h"
  5. #include <linux/jiffies.h>
  6. #include <linux/uaccess.h>
  7. enum {NETDEV_STATS, E1000_STATS};
  8. struct e1000_stats {
  9. char stat_string[ETH_GSTRING_LEN];
  10. int type;
  11. int sizeof_stat;
  12. int stat_offset;
  13. };
  14. #define E1000_STAT(m) E1000_STATS, \
  15. sizeof(((struct e1000_adapter *)0)->m), \
  16. offsetof(struct e1000_adapter, m)
  17. #define E1000_NETDEV_STAT(m) NETDEV_STATS, \
  18. sizeof(((struct net_device *)0)->m), \
  19. offsetof(struct net_device, m)
  20. static const struct e1000_stats e1000_gstrings_stats[] = {
  21. { "rx_packets", E1000_STAT(stats.gprc) },
  22. { "tx_packets", E1000_STAT(stats.gptc) },
  23. { "rx_bytes", E1000_STAT(stats.gorcl) },
  24. { "tx_bytes", E1000_STAT(stats.gotcl) },
  25. { "rx_broadcast", E1000_STAT(stats.bprc) },
  26. { "tx_broadcast", E1000_STAT(stats.bptc) },
  27. { "rx_multicast", E1000_STAT(stats.mprc) },
  28. { "tx_multicast", E1000_STAT(stats.mptc) },
  29. { "rx_errors", E1000_STAT(stats.rxerrc) },
  30. { "tx_errors", E1000_STAT(stats.txerrc) },
  31. { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
  32. { "multicast", E1000_STAT(stats.mprc) },
  33. { "collisions", E1000_STAT(stats.colc) },
  34. { "rx_length_errors", E1000_STAT(stats.rlerrc) },
  35. { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
  36. { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
  37. { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
  38. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  39. { "rx_missed_errors", E1000_STAT(stats.mpc) },
  40. { "tx_aborted_errors", E1000_STAT(stats.ecol) },
  41. { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
  42. { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
  43. { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
  44. { "tx_window_errors", E1000_STAT(stats.latecol) },
  45. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  46. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  47. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  48. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  49. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  50. { "tx_restart_queue", E1000_STAT(restart_queue) },
  51. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  52. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  53. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  54. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  55. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  56. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  57. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  58. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  59. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  60. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  61. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  62. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  63. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  64. { "tx_smbus", E1000_STAT(stats.mgptc) },
  65. { "rx_smbus", E1000_STAT(stats.mgprc) },
  66. { "dropped_smbus", E1000_STAT(stats.mgpdc) },
  67. };
  68. #define E1000_QUEUE_STATS_LEN 0
  69. #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
  70. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  71. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  72. "Register test (offline)", "Eeprom test (offline)",
  73. "Interrupt test (offline)", "Loopback test (offline)",
  74. "Link test (on/offline)"
  75. };
  76. #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
  77. static int e1000_get_link_ksettings(struct net_device *netdev,
  78. struct ethtool_link_ksettings *cmd)
  79. {
  80. struct e1000_adapter *adapter = netdev_priv(netdev);
  81. struct e1000_hw *hw = &adapter->hw;
  82. u32 supported, advertising;
  83. if (hw->media_type == e1000_media_type_copper) {
  84. supported = (SUPPORTED_10baseT_Half |
  85. SUPPORTED_10baseT_Full |
  86. SUPPORTED_100baseT_Half |
  87. SUPPORTED_100baseT_Full |
  88. SUPPORTED_1000baseT_Full|
  89. SUPPORTED_Autoneg |
  90. SUPPORTED_TP);
  91. advertising = ADVERTISED_TP;
  92. if (hw->autoneg == 1) {
  93. advertising |= ADVERTISED_Autoneg;
  94. /* the e1000 autoneg seems to match ethtool nicely */
  95. advertising |= hw->autoneg_advertised;
  96. }
  97. cmd->base.port = PORT_TP;
  98. cmd->base.phy_address = hw->phy_addr;
  99. } else {
  100. supported = (SUPPORTED_1000baseT_Full |
  101. SUPPORTED_FIBRE |
  102. SUPPORTED_Autoneg);
  103. advertising = (ADVERTISED_1000baseT_Full |
  104. ADVERTISED_FIBRE |
  105. ADVERTISED_Autoneg);
  106. cmd->base.port = PORT_FIBRE;
  107. }
  108. if (er32(STATUS) & E1000_STATUS_LU) {
  109. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  110. &adapter->link_duplex);
  111. cmd->base.speed = adapter->link_speed;
  112. /* unfortunately FULL_DUPLEX != DUPLEX_FULL
  113. * and HALF_DUPLEX != DUPLEX_HALF
  114. */
  115. if (adapter->link_duplex == FULL_DUPLEX)
  116. cmd->base.duplex = DUPLEX_FULL;
  117. else
  118. cmd->base.duplex = DUPLEX_HALF;
  119. } else {
  120. cmd->base.speed = SPEED_UNKNOWN;
  121. cmd->base.duplex = DUPLEX_UNKNOWN;
  122. }
  123. cmd->base.autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  124. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  125. /* MDI-X => 1; MDI => 0 */
  126. if ((hw->media_type == e1000_media_type_copper) &&
  127. netif_carrier_ok(netdev))
  128. cmd->base.eth_tp_mdix = (!!adapter->phy_info.mdix_mode ?
  129. ETH_TP_MDI_X : ETH_TP_MDI);
  130. else
  131. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  132. if (hw->mdix == AUTO_ALL_MODES)
  133. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
  134. else
  135. cmd->base.eth_tp_mdix_ctrl = hw->mdix;
  136. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
  137. supported);
  138. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
  139. advertising);
  140. return 0;
  141. }
  142. static int e1000_set_link_ksettings(struct net_device *netdev,
  143. const struct ethtool_link_ksettings *cmd)
  144. {
  145. struct e1000_adapter *adapter = netdev_priv(netdev);
  146. struct e1000_hw *hw = &adapter->hw;
  147. u32 advertising;
  148. ethtool_convert_link_mode_to_legacy_u32(&advertising,
  149. cmd->link_modes.advertising);
  150. /* MDI setting is only allowed when autoneg enabled because
  151. * some hardware doesn't allow MDI setting when speed or
  152. * duplex is forced.
  153. */
  154. if (cmd->base.eth_tp_mdix_ctrl) {
  155. if (hw->media_type != e1000_media_type_copper)
  156. return -EOPNOTSUPP;
  157. if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
  158. (cmd->base.autoneg != AUTONEG_ENABLE)) {
  159. e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
  160. return -EINVAL;
  161. }
  162. }
  163. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  164. msleep(1);
  165. if (cmd->base.autoneg == AUTONEG_ENABLE) {
  166. hw->autoneg = 1;
  167. if (hw->media_type == e1000_media_type_fiber)
  168. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  169. ADVERTISED_FIBRE |
  170. ADVERTISED_Autoneg;
  171. else
  172. hw->autoneg_advertised = advertising |
  173. ADVERTISED_TP |
  174. ADVERTISED_Autoneg;
  175. } else {
  176. u32 speed = cmd->base.speed;
  177. /* calling this overrides forced MDI setting */
  178. if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
  179. clear_bit(__E1000_RESETTING, &adapter->flags);
  180. return -EINVAL;
  181. }
  182. }
  183. /* MDI-X => 2; MDI => 1; Auto => 3 */
  184. if (cmd->base.eth_tp_mdix_ctrl) {
  185. if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
  186. hw->mdix = AUTO_ALL_MODES;
  187. else
  188. hw->mdix = cmd->base.eth_tp_mdix_ctrl;
  189. }
  190. /* reset the link */
  191. if (netif_running(adapter->netdev)) {
  192. e1000_down(adapter);
  193. e1000_up(adapter);
  194. } else {
  195. e1000_reset(adapter);
  196. }
  197. clear_bit(__E1000_RESETTING, &adapter->flags);
  198. return 0;
  199. }
  200. static u32 e1000_get_link(struct net_device *netdev)
  201. {
  202. struct e1000_adapter *adapter = netdev_priv(netdev);
  203. /* If the link is not reported up to netdev, interrupts are disabled,
  204. * and so the physical link state may have changed since we last
  205. * looked. Set get_link_status to make sure that the true link
  206. * state is interrogated, rather than pulling a cached and possibly
  207. * stale link state from the driver.
  208. */
  209. if (!netif_carrier_ok(netdev))
  210. adapter->hw.get_link_status = 1;
  211. return e1000_has_link(adapter);
  212. }
  213. static void e1000_get_pauseparam(struct net_device *netdev,
  214. struct ethtool_pauseparam *pause)
  215. {
  216. struct e1000_adapter *adapter = netdev_priv(netdev);
  217. struct e1000_hw *hw = &adapter->hw;
  218. pause->autoneg =
  219. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  220. if (hw->fc == E1000_FC_RX_PAUSE) {
  221. pause->rx_pause = 1;
  222. } else if (hw->fc == E1000_FC_TX_PAUSE) {
  223. pause->tx_pause = 1;
  224. } else if (hw->fc == E1000_FC_FULL) {
  225. pause->rx_pause = 1;
  226. pause->tx_pause = 1;
  227. }
  228. }
  229. static int e1000_set_pauseparam(struct net_device *netdev,
  230. struct ethtool_pauseparam *pause)
  231. {
  232. struct e1000_adapter *adapter = netdev_priv(netdev);
  233. struct e1000_hw *hw = &adapter->hw;
  234. int retval = 0;
  235. adapter->fc_autoneg = pause->autoneg;
  236. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  237. msleep(1);
  238. if (pause->rx_pause && pause->tx_pause)
  239. hw->fc = E1000_FC_FULL;
  240. else if (pause->rx_pause && !pause->tx_pause)
  241. hw->fc = E1000_FC_RX_PAUSE;
  242. else if (!pause->rx_pause && pause->tx_pause)
  243. hw->fc = E1000_FC_TX_PAUSE;
  244. else if (!pause->rx_pause && !pause->tx_pause)
  245. hw->fc = E1000_FC_NONE;
  246. hw->original_fc = hw->fc;
  247. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  248. if (netif_running(adapter->netdev)) {
  249. e1000_down(adapter);
  250. e1000_up(adapter);
  251. } else {
  252. e1000_reset(adapter);
  253. }
  254. } else
  255. retval = ((hw->media_type == e1000_media_type_fiber) ?
  256. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  257. clear_bit(__E1000_RESETTING, &adapter->flags);
  258. return retval;
  259. }
  260. static u32 e1000_get_msglevel(struct net_device *netdev)
  261. {
  262. struct e1000_adapter *adapter = netdev_priv(netdev);
  263. return adapter->msg_enable;
  264. }
  265. static void e1000_set_msglevel(struct net_device *netdev, u32 data)
  266. {
  267. struct e1000_adapter *adapter = netdev_priv(netdev);
  268. adapter->msg_enable = data;
  269. }
  270. static int e1000_get_regs_len(struct net_device *netdev)
  271. {
  272. #define E1000_REGS_LEN 32
  273. return E1000_REGS_LEN * sizeof(u32);
  274. }
  275. static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
  276. void *p)
  277. {
  278. struct e1000_adapter *adapter = netdev_priv(netdev);
  279. struct e1000_hw *hw = &adapter->hw;
  280. u32 *regs_buff = p;
  281. u16 phy_data;
  282. memset(p, 0, E1000_REGS_LEN * sizeof(u32));
  283. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  284. regs_buff[0] = er32(CTRL);
  285. regs_buff[1] = er32(STATUS);
  286. regs_buff[2] = er32(RCTL);
  287. regs_buff[3] = er32(RDLEN);
  288. regs_buff[4] = er32(RDH);
  289. regs_buff[5] = er32(RDT);
  290. regs_buff[6] = er32(RDTR);
  291. regs_buff[7] = er32(TCTL);
  292. regs_buff[8] = er32(TDLEN);
  293. regs_buff[9] = er32(TDH);
  294. regs_buff[10] = er32(TDT);
  295. regs_buff[11] = er32(TIDV);
  296. regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
  297. if (hw->phy_type == e1000_phy_igp) {
  298. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  299. IGP01E1000_PHY_AGC_A);
  300. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  301. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  302. regs_buff[13] = (u32)phy_data; /* cable length */
  303. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  304. IGP01E1000_PHY_AGC_B);
  305. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  306. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  307. regs_buff[14] = (u32)phy_data; /* cable length */
  308. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  309. IGP01E1000_PHY_AGC_C);
  310. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  311. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  312. regs_buff[15] = (u32)phy_data; /* cable length */
  313. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  314. IGP01E1000_PHY_AGC_D);
  315. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  316. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  317. regs_buff[16] = (u32)phy_data; /* cable length */
  318. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  319. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  320. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  321. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  322. regs_buff[18] = (u32)phy_data; /* cable polarity */
  323. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  324. IGP01E1000_PHY_PCS_INIT_REG);
  325. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  326. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  327. regs_buff[19] = (u32)phy_data; /* cable polarity */
  328. regs_buff[20] = 0; /* polarity correction enabled (always) */
  329. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  330. regs_buff[23] = regs_buff[18]; /* mdix mode */
  331. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  332. } else {
  333. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  334. regs_buff[13] = (u32)phy_data; /* cable length */
  335. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  336. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  337. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  338. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  339. regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
  340. regs_buff[18] = regs_buff[13]; /* cable polarity */
  341. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  342. regs_buff[20] = regs_buff[17]; /* polarity correction */
  343. /* phy receive errors */
  344. regs_buff[22] = adapter->phy_stats.receive_errors;
  345. regs_buff[23] = regs_buff[13]; /* mdix mode */
  346. }
  347. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  348. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  349. regs_buff[24] = (u32)phy_data; /* phy local receiver status */
  350. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  351. if (hw->mac_type >= e1000_82540 &&
  352. hw->media_type == e1000_media_type_copper) {
  353. regs_buff[26] = er32(MANC);
  354. }
  355. }
  356. static int e1000_get_eeprom_len(struct net_device *netdev)
  357. {
  358. struct e1000_adapter *adapter = netdev_priv(netdev);
  359. struct e1000_hw *hw = &adapter->hw;
  360. return hw->eeprom.word_size * 2;
  361. }
  362. static int e1000_get_eeprom(struct net_device *netdev,
  363. struct ethtool_eeprom *eeprom, u8 *bytes)
  364. {
  365. struct e1000_adapter *adapter = netdev_priv(netdev);
  366. struct e1000_hw *hw = &adapter->hw;
  367. u16 *eeprom_buff;
  368. int first_word, last_word;
  369. int ret_val = 0;
  370. u16 i;
  371. if (eeprom->len == 0)
  372. return -EINVAL;
  373. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  374. first_word = eeprom->offset >> 1;
  375. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  376. eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
  377. GFP_KERNEL);
  378. if (!eeprom_buff)
  379. return -ENOMEM;
  380. if (hw->eeprom.type == e1000_eeprom_spi)
  381. ret_val = e1000_read_eeprom(hw, first_word,
  382. last_word - first_word + 1,
  383. eeprom_buff);
  384. else {
  385. for (i = 0; i < last_word - first_word + 1; i++) {
  386. ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  387. &eeprom_buff[i]);
  388. if (ret_val)
  389. break;
  390. }
  391. }
  392. /* Device's eeprom is always little-endian, word addressable */
  393. for (i = 0; i < last_word - first_word + 1; i++)
  394. le16_to_cpus(&eeprom_buff[i]);
  395. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
  396. eeprom->len);
  397. kfree(eeprom_buff);
  398. return ret_val;
  399. }
  400. static int e1000_set_eeprom(struct net_device *netdev,
  401. struct ethtool_eeprom *eeprom, u8 *bytes)
  402. {
  403. struct e1000_adapter *adapter = netdev_priv(netdev);
  404. struct e1000_hw *hw = &adapter->hw;
  405. u16 *eeprom_buff;
  406. void *ptr;
  407. int max_len, first_word, last_word, ret_val = 0;
  408. u16 i;
  409. if (eeprom->len == 0)
  410. return -EOPNOTSUPP;
  411. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  412. return -EFAULT;
  413. max_len = hw->eeprom.word_size * 2;
  414. first_word = eeprom->offset >> 1;
  415. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  416. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  417. if (!eeprom_buff)
  418. return -ENOMEM;
  419. ptr = (void *)eeprom_buff;
  420. if (eeprom->offset & 1) {
  421. /* need read/modify/write of first changed EEPROM word
  422. * only the second byte of the word is being modified
  423. */
  424. ret_val = e1000_read_eeprom(hw, first_word, 1,
  425. &eeprom_buff[0]);
  426. ptr++;
  427. }
  428. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  429. /* need read/modify/write of last changed EEPROM word
  430. * only the first byte of the word is being modified
  431. */
  432. ret_val = e1000_read_eeprom(hw, last_word, 1,
  433. &eeprom_buff[last_word - first_word]);
  434. }
  435. /* Device's eeprom is always little-endian, word addressable */
  436. for (i = 0; i < last_word - first_word + 1; i++)
  437. le16_to_cpus(&eeprom_buff[i]);
  438. memcpy(ptr, bytes, eeprom->len);
  439. for (i = 0; i < last_word - first_word + 1; i++)
  440. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  441. ret_val = e1000_write_eeprom(hw, first_word,
  442. last_word - first_word + 1, eeprom_buff);
  443. /* Update the checksum over the first part of the EEPROM if needed */
  444. if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
  445. e1000_update_eeprom_checksum(hw);
  446. kfree(eeprom_buff);
  447. return ret_val;
  448. }
  449. static void e1000_get_drvinfo(struct net_device *netdev,
  450. struct ethtool_drvinfo *drvinfo)
  451. {
  452. struct e1000_adapter *adapter = netdev_priv(netdev);
  453. strlcpy(drvinfo->driver, e1000_driver_name,
  454. sizeof(drvinfo->driver));
  455. strlcpy(drvinfo->version, e1000_driver_version,
  456. sizeof(drvinfo->version));
  457. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
  458. sizeof(drvinfo->bus_info));
  459. }
  460. static void e1000_get_ringparam(struct net_device *netdev,
  461. struct ethtool_ringparam *ring)
  462. {
  463. struct e1000_adapter *adapter = netdev_priv(netdev);
  464. struct e1000_hw *hw = &adapter->hw;
  465. e1000_mac_type mac_type = hw->mac_type;
  466. struct e1000_tx_ring *txdr = adapter->tx_ring;
  467. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  468. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  469. E1000_MAX_82544_RXD;
  470. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  471. E1000_MAX_82544_TXD;
  472. ring->rx_pending = rxdr->count;
  473. ring->tx_pending = txdr->count;
  474. }
  475. static int e1000_set_ringparam(struct net_device *netdev,
  476. struct ethtool_ringparam *ring)
  477. {
  478. struct e1000_adapter *adapter = netdev_priv(netdev);
  479. struct e1000_hw *hw = &adapter->hw;
  480. e1000_mac_type mac_type = hw->mac_type;
  481. struct e1000_tx_ring *txdr, *tx_old;
  482. struct e1000_rx_ring *rxdr, *rx_old;
  483. int i, err;
  484. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  485. return -EINVAL;
  486. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  487. msleep(1);
  488. if (netif_running(adapter->netdev))
  489. e1000_down(adapter);
  490. tx_old = adapter->tx_ring;
  491. rx_old = adapter->rx_ring;
  492. err = -ENOMEM;
  493. txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring),
  494. GFP_KERNEL);
  495. if (!txdr)
  496. goto err_alloc_tx;
  497. rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring),
  498. GFP_KERNEL);
  499. if (!rxdr)
  500. goto err_alloc_rx;
  501. adapter->tx_ring = txdr;
  502. adapter->rx_ring = rxdr;
  503. rxdr->count = max(ring->rx_pending, (u32)E1000_MIN_RXD);
  504. rxdr->count = min(rxdr->count, (u32)(mac_type < e1000_82544 ?
  505. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  506. rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  507. txdr->count = max(ring->tx_pending, (u32)E1000_MIN_TXD);
  508. txdr->count = min(txdr->count, (u32)(mac_type < e1000_82544 ?
  509. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  510. txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  511. for (i = 0; i < adapter->num_tx_queues; i++)
  512. txdr[i].count = txdr->count;
  513. for (i = 0; i < adapter->num_rx_queues; i++)
  514. rxdr[i].count = rxdr->count;
  515. err = 0;
  516. if (netif_running(adapter->netdev)) {
  517. /* Try to get new resources before deleting old */
  518. err = e1000_setup_all_rx_resources(adapter);
  519. if (err)
  520. goto err_setup_rx;
  521. err = e1000_setup_all_tx_resources(adapter);
  522. if (err)
  523. goto err_setup_tx;
  524. /* save the new, restore the old in order to free it,
  525. * then restore the new back again
  526. */
  527. adapter->rx_ring = rx_old;
  528. adapter->tx_ring = tx_old;
  529. e1000_free_all_rx_resources(adapter);
  530. e1000_free_all_tx_resources(adapter);
  531. adapter->rx_ring = rxdr;
  532. adapter->tx_ring = txdr;
  533. err = e1000_up(adapter);
  534. }
  535. kfree(tx_old);
  536. kfree(rx_old);
  537. clear_bit(__E1000_RESETTING, &adapter->flags);
  538. return err;
  539. err_setup_tx:
  540. e1000_free_all_rx_resources(adapter);
  541. err_setup_rx:
  542. adapter->rx_ring = rx_old;
  543. adapter->tx_ring = tx_old;
  544. kfree(rxdr);
  545. err_alloc_rx:
  546. kfree(txdr);
  547. err_alloc_tx:
  548. if (netif_running(adapter->netdev))
  549. e1000_up(adapter);
  550. clear_bit(__E1000_RESETTING, &adapter->flags);
  551. return err;
  552. }
  553. static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
  554. u32 mask, u32 write)
  555. {
  556. struct e1000_hw *hw = &adapter->hw;
  557. static const u32 test[] = {
  558. 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
  559. };
  560. u8 __iomem *address = hw->hw_addr + reg;
  561. u32 read;
  562. int i;
  563. for (i = 0; i < ARRAY_SIZE(test); i++) {
  564. writel(write & test[i], address);
  565. read = readl(address);
  566. if (read != (write & test[i] & mask)) {
  567. e_err(drv, "pattern test reg %04X failed: "
  568. "got 0x%08X expected 0x%08X\n",
  569. reg, read, (write & test[i] & mask));
  570. *data = reg;
  571. return true;
  572. }
  573. }
  574. return false;
  575. }
  576. static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
  577. u32 mask, u32 write)
  578. {
  579. struct e1000_hw *hw = &adapter->hw;
  580. u8 __iomem *address = hw->hw_addr + reg;
  581. u32 read;
  582. writel(write & mask, address);
  583. read = readl(address);
  584. if ((read & mask) != (write & mask)) {
  585. e_err(drv, "set/check reg %04X test failed: "
  586. "got 0x%08X expected 0x%08X\n",
  587. reg, (read & mask), (write & mask));
  588. *data = reg;
  589. return true;
  590. }
  591. return false;
  592. }
  593. #define REG_PATTERN_TEST(reg, mask, write) \
  594. do { \
  595. if (reg_pattern_test(adapter, data, \
  596. (hw->mac_type >= e1000_82543) \
  597. ? E1000_##reg : E1000_82542_##reg, \
  598. mask, write)) \
  599. return 1; \
  600. } while (0)
  601. #define REG_SET_AND_CHECK(reg, mask, write) \
  602. do { \
  603. if (reg_set_and_check(adapter, data, \
  604. (hw->mac_type >= e1000_82543) \
  605. ? E1000_##reg : E1000_82542_##reg, \
  606. mask, write)) \
  607. return 1; \
  608. } while (0)
  609. static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
  610. {
  611. u32 value, before, after;
  612. u32 i, toggle;
  613. struct e1000_hw *hw = &adapter->hw;
  614. /* The status register is Read Only, so a write should fail.
  615. * Some bits that get toggled are ignored.
  616. */
  617. /* there are several bits on newer hardware that are r/w */
  618. toggle = 0xFFFFF833;
  619. before = er32(STATUS);
  620. value = (er32(STATUS) & toggle);
  621. ew32(STATUS, toggle);
  622. after = er32(STATUS) & toggle;
  623. if (value != after) {
  624. e_err(drv, "failed STATUS register test got: "
  625. "0x%08X expected: 0x%08X\n", after, value);
  626. *data = 1;
  627. return 1;
  628. }
  629. /* restore previous status */
  630. ew32(STATUS, before);
  631. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  632. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  633. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  634. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  635. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  636. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  637. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  638. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  639. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  640. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  641. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  642. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  643. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  644. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  645. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  646. before = 0x06DFB3FE;
  647. REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
  648. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  649. if (hw->mac_type >= e1000_82543) {
  650. REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
  651. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  652. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  653. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  654. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  655. value = E1000_RAR_ENTRIES;
  656. for (i = 0; i < value; i++) {
  657. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2),
  658. 0x8003FFFF, 0xFFFFFFFF);
  659. }
  660. } else {
  661. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  662. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  663. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  664. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  665. }
  666. value = E1000_MC_TBL_SIZE;
  667. for (i = 0; i < value; i++)
  668. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  669. *data = 0;
  670. return 0;
  671. }
  672. static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
  673. {
  674. struct e1000_hw *hw = &adapter->hw;
  675. u16 temp;
  676. u16 checksum = 0;
  677. u16 i;
  678. *data = 0;
  679. /* Read and add up the contents of the EEPROM */
  680. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  681. if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
  682. *data = 1;
  683. break;
  684. }
  685. checksum += temp;
  686. }
  687. /* If Checksum is not Correct return error else test passed */
  688. if ((checksum != (u16)EEPROM_SUM) && !(*data))
  689. *data = 2;
  690. return *data;
  691. }
  692. static irqreturn_t e1000_test_intr(int irq, void *data)
  693. {
  694. struct net_device *netdev = (struct net_device *)data;
  695. struct e1000_adapter *adapter = netdev_priv(netdev);
  696. struct e1000_hw *hw = &adapter->hw;
  697. adapter->test_icr |= er32(ICR);
  698. return IRQ_HANDLED;
  699. }
  700. static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
  701. {
  702. struct net_device *netdev = adapter->netdev;
  703. u32 mask, i = 0;
  704. bool shared_int = true;
  705. u32 irq = adapter->pdev->irq;
  706. struct e1000_hw *hw = &adapter->hw;
  707. *data = 0;
  708. /* NOTE: we don't test MSI interrupts here, yet
  709. * Hook up test interrupt handler just for this test
  710. */
  711. if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
  712. netdev))
  713. shared_int = false;
  714. else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
  715. netdev->name, netdev)) {
  716. *data = 1;
  717. return -1;
  718. }
  719. e_info(hw, "testing %s interrupt\n", (shared_int ?
  720. "shared" : "unshared"));
  721. /* Disable all the interrupts */
  722. ew32(IMC, 0xFFFFFFFF);
  723. E1000_WRITE_FLUSH();
  724. msleep(10);
  725. /* Test each interrupt */
  726. for (; i < 10; i++) {
  727. /* Interrupt to test */
  728. mask = 1 << i;
  729. if (!shared_int) {
  730. /* Disable the interrupt to be reported in
  731. * the cause register and then force the same
  732. * interrupt and see if one gets posted. If
  733. * an interrupt was posted to the bus, the
  734. * test failed.
  735. */
  736. adapter->test_icr = 0;
  737. ew32(IMC, mask);
  738. ew32(ICS, mask);
  739. E1000_WRITE_FLUSH();
  740. msleep(10);
  741. if (adapter->test_icr & mask) {
  742. *data = 3;
  743. break;
  744. }
  745. }
  746. /* Enable the interrupt to be reported in
  747. * the cause register and then force the same
  748. * interrupt and see if one gets posted. If
  749. * an interrupt was not posted to the bus, the
  750. * test failed.
  751. */
  752. adapter->test_icr = 0;
  753. ew32(IMS, mask);
  754. ew32(ICS, mask);
  755. E1000_WRITE_FLUSH();
  756. msleep(10);
  757. if (!(adapter->test_icr & mask)) {
  758. *data = 4;
  759. break;
  760. }
  761. if (!shared_int) {
  762. /* Disable the other interrupts to be reported in
  763. * the cause register and then force the other
  764. * interrupts and see if any get posted. If
  765. * an interrupt was posted to the bus, the
  766. * test failed.
  767. */
  768. adapter->test_icr = 0;
  769. ew32(IMC, ~mask & 0x00007FFF);
  770. ew32(ICS, ~mask & 0x00007FFF);
  771. E1000_WRITE_FLUSH();
  772. msleep(10);
  773. if (adapter->test_icr) {
  774. *data = 5;
  775. break;
  776. }
  777. }
  778. }
  779. /* Disable all the interrupts */
  780. ew32(IMC, 0xFFFFFFFF);
  781. E1000_WRITE_FLUSH();
  782. msleep(10);
  783. /* Unhook test interrupt handler */
  784. free_irq(irq, netdev);
  785. return *data;
  786. }
  787. static void e1000_free_desc_rings(struct e1000_adapter *adapter)
  788. {
  789. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  790. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  791. struct pci_dev *pdev = adapter->pdev;
  792. int i;
  793. if (txdr->desc && txdr->buffer_info) {
  794. for (i = 0; i < txdr->count; i++) {
  795. if (txdr->buffer_info[i].dma)
  796. dma_unmap_single(&pdev->dev,
  797. txdr->buffer_info[i].dma,
  798. txdr->buffer_info[i].length,
  799. DMA_TO_DEVICE);
  800. if (txdr->buffer_info[i].skb)
  801. dev_kfree_skb(txdr->buffer_info[i].skb);
  802. }
  803. }
  804. if (rxdr->desc && rxdr->buffer_info) {
  805. for (i = 0; i < rxdr->count; i++) {
  806. if (rxdr->buffer_info[i].dma)
  807. dma_unmap_single(&pdev->dev,
  808. rxdr->buffer_info[i].dma,
  809. E1000_RXBUFFER_2048,
  810. DMA_FROM_DEVICE);
  811. kfree(rxdr->buffer_info[i].rxbuf.data);
  812. }
  813. }
  814. if (txdr->desc) {
  815. dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  816. txdr->dma);
  817. txdr->desc = NULL;
  818. }
  819. if (rxdr->desc) {
  820. dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
  821. rxdr->dma);
  822. rxdr->desc = NULL;
  823. }
  824. kfree(txdr->buffer_info);
  825. txdr->buffer_info = NULL;
  826. kfree(rxdr->buffer_info);
  827. rxdr->buffer_info = NULL;
  828. }
  829. static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
  830. {
  831. struct e1000_hw *hw = &adapter->hw;
  832. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  833. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  834. struct pci_dev *pdev = adapter->pdev;
  835. u32 rctl;
  836. int i, ret_val;
  837. /* Setup Tx descriptor ring and Tx buffers */
  838. if (!txdr->count)
  839. txdr->count = E1000_DEFAULT_TXD;
  840. txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_tx_buffer),
  841. GFP_KERNEL);
  842. if (!txdr->buffer_info) {
  843. ret_val = 1;
  844. goto err_nomem;
  845. }
  846. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  847. txdr->size = ALIGN(txdr->size, 4096);
  848. txdr->desc = dma_zalloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  849. GFP_KERNEL);
  850. if (!txdr->desc) {
  851. ret_val = 2;
  852. goto err_nomem;
  853. }
  854. txdr->next_to_use = txdr->next_to_clean = 0;
  855. ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
  856. ew32(TDBAH, ((u64)txdr->dma >> 32));
  857. ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
  858. ew32(TDH, 0);
  859. ew32(TDT, 0);
  860. ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
  861. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  862. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  863. for (i = 0; i < txdr->count; i++) {
  864. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  865. struct sk_buff *skb;
  866. unsigned int size = 1024;
  867. skb = alloc_skb(size, GFP_KERNEL);
  868. if (!skb) {
  869. ret_val = 3;
  870. goto err_nomem;
  871. }
  872. skb_put(skb, size);
  873. txdr->buffer_info[i].skb = skb;
  874. txdr->buffer_info[i].length = skb->len;
  875. txdr->buffer_info[i].dma =
  876. dma_map_single(&pdev->dev, skb->data, skb->len,
  877. DMA_TO_DEVICE);
  878. if (dma_mapping_error(&pdev->dev, txdr->buffer_info[i].dma)) {
  879. ret_val = 4;
  880. goto err_nomem;
  881. }
  882. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  883. tx_desc->lower.data = cpu_to_le32(skb->len);
  884. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  885. E1000_TXD_CMD_IFCS |
  886. E1000_TXD_CMD_RPS);
  887. tx_desc->upper.data = 0;
  888. }
  889. /* Setup Rx descriptor ring and Rx buffers */
  890. if (!rxdr->count)
  891. rxdr->count = E1000_DEFAULT_RXD;
  892. rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_rx_buffer),
  893. GFP_KERNEL);
  894. if (!rxdr->buffer_info) {
  895. ret_val = 5;
  896. goto err_nomem;
  897. }
  898. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  899. rxdr->desc = dma_zalloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  900. GFP_KERNEL);
  901. if (!rxdr->desc) {
  902. ret_val = 6;
  903. goto err_nomem;
  904. }
  905. rxdr->next_to_use = rxdr->next_to_clean = 0;
  906. rctl = er32(RCTL);
  907. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  908. ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
  909. ew32(RDBAH, ((u64)rxdr->dma >> 32));
  910. ew32(RDLEN, rxdr->size);
  911. ew32(RDH, 0);
  912. ew32(RDT, 0);
  913. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  914. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  915. (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
  916. ew32(RCTL, rctl);
  917. for (i = 0; i < rxdr->count; i++) {
  918. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  919. u8 *buf;
  920. buf = kzalloc(E1000_RXBUFFER_2048 + NET_SKB_PAD + NET_IP_ALIGN,
  921. GFP_KERNEL);
  922. if (!buf) {
  923. ret_val = 7;
  924. goto err_nomem;
  925. }
  926. rxdr->buffer_info[i].rxbuf.data = buf;
  927. rxdr->buffer_info[i].dma =
  928. dma_map_single(&pdev->dev,
  929. buf + NET_SKB_PAD + NET_IP_ALIGN,
  930. E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
  931. if (dma_mapping_error(&pdev->dev, rxdr->buffer_info[i].dma)) {
  932. ret_val = 8;
  933. goto err_nomem;
  934. }
  935. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  936. }
  937. return 0;
  938. err_nomem:
  939. e1000_free_desc_rings(adapter);
  940. return ret_val;
  941. }
  942. static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  943. {
  944. struct e1000_hw *hw = &adapter->hw;
  945. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  946. e1000_write_phy_reg(hw, 29, 0x001F);
  947. e1000_write_phy_reg(hw, 30, 0x8FFC);
  948. e1000_write_phy_reg(hw, 29, 0x001A);
  949. e1000_write_phy_reg(hw, 30, 0x8FF0);
  950. }
  951. static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  952. {
  953. struct e1000_hw *hw = &adapter->hw;
  954. u16 phy_reg;
  955. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  956. * Extended PHY Specific Control Register to 25MHz clock. This
  957. * value defaults back to a 2.5MHz clock when the PHY is reset.
  958. */
  959. e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  960. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  961. e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  962. /* In addition, because of the s/w reset above, we need to enable
  963. * CRS on TX. This must be set for both full and half duplex
  964. * operation.
  965. */
  966. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  967. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  968. e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  969. }
  970. static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  971. {
  972. struct e1000_hw *hw = &adapter->hw;
  973. u32 ctrl_reg;
  974. u16 phy_reg;
  975. /* Setup the Device Control Register for PHY loopback test. */
  976. ctrl_reg = er32(CTRL);
  977. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  978. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  979. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  980. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  981. E1000_CTRL_FD); /* Force Duplex to FULL */
  982. ew32(CTRL, ctrl_reg);
  983. /* Read the PHY Specific Control Register (0x10) */
  984. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  985. /* Clear Auto-Crossover bits in PHY Specific Control Register
  986. * (bits 6:5).
  987. */
  988. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  989. e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  990. /* Perform software reset on the PHY */
  991. e1000_phy_reset(hw);
  992. /* Have to setup TX_CLK and TX_CRS after software reset */
  993. e1000_phy_reset_clk_and_crs(adapter);
  994. e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
  995. /* Wait for reset to complete. */
  996. udelay(500);
  997. /* Have to setup TX_CLK and TX_CRS after software reset */
  998. e1000_phy_reset_clk_and_crs(adapter);
  999. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1000. e1000_phy_disable_receiver(adapter);
  1001. /* Set the loopback bit in the PHY control register. */
  1002. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1003. phy_reg |= MII_CR_LOOPBACK;
  1004. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1005. /* Setup TX_CLK and TX_CRS one more time. */
  1006. e1000_phy_reset_clk_and_crs(adapter);
  1007. /* Check Phy Configuration */
  1008. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1009. if (phy_reg != 0x4100)
  1010. return 9;
  1011. e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1012. if (phy_reg != 0x0070)
  1013. return 10;
  1014. e1000_read_phy_reg(hw, 29, &phy_reg);
  1015. if (phy_reg != 0x001A)
  1016. return 11;
  1017. return 0;
  1018. }
  1019. static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1020. {
  1021. struct e1000_hw *hw = &adapter->hw;
  1022. u32 ctrl_reg = 0;
  1023. u32 stat_reg = 0;
  1024. hw->autoneg = false;
  1025. if (hw->phy_type == e1000_phy_m88) {
  1026. /* Auto-MDI/MDIX Off */
  1027. e1000_write_phy_reg(hw,
  1028. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1029. /* reset to update Auto-MDI/MDIX */
  1030. e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
  1031. /* autoneg off */
  1032. e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
  1033. }
  1034. ctrl_reg = er32(CTRL);
  1035. /* force 1000, set loopback */
  1036. e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
  1037. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1038. ctrl_reg = er32(CTRL);
  1039. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1040. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1041. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1042. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1043. E1000_CTRL_FD); /* Force Duplex to FULL */
  1044. if (hw->media_type == e1000_media_type_copper &&
  1045. hw->phy_type == e1000_phy_m88)
  1046. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1047. else {
  1048. /* Set the ILOS bit on the fiber Nic is half
  1049. * duplex link is detected.
  1050. */
  1051. stat_reg = er32(STATUS);
  1052. if ((stat_reg & E1000_STATUS_FD) == 0)
  1053. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1054. }
  1055. ew32(CTRL, ctrl_reg);
  1056. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1057. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1058. */
  1059. if (hw->phy_type == e1000_phy_m88)
  1060. e1000_phy_disable_receiver(adapter);
  1061. udelay(500);
  1062. return 0;
  1063. }
  1064. static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1065. {
  1066. struct e1000_hw *hw = &adapter->hw;
  1067. u16 phy_reg = 0;
  1068. u16 count = 0;
  1069. switch (hw->mac_type) {
  1070. case e1000_82543:
  1071. if (hw->media_type == e1000_media_type_copper) {
  1072. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1073. * Some PHY registers get corrupted at random, so
  1074. * attempt this 10 times.
  1075. */
  1076. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1077. count++ < 10);
  1078. if (count < 11)
  1079. return 0;
  1080. }
  1081. break;
  1082. case e1000_82544:
  1083. case e1000_82540:
  1084. case e1000_82545:
  1085. case e1000_82545_rev_3:
  1086. case e1000_82546:
  1087. case e1000_82546_rev_3:
  1088. case e1000_82541:
  1089. case e1000_82541_rev_2:
  1090. case e1000_82547:
  1091. case e1000_82547_rev_2:
  1092. return e1000_integrated_phy_loopback(adapter);
  1093. default:
  1094. /* Default PHY loopback work is to read the MII
  1095. * control register and assert bit 14 (loopback mode).
  1096. */
  1097. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1098. phy_reg |= MII_CR_LOOPBACK;
  1099. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1100. return 0;
  1101. }
  1102. return 8;
  1103. }
  1104. static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1105. {
  1106. struct e1000_hw *hw = &adapter->hw;
  1107. u32 rctl;
  1108. if (hw->media_type == e1000_media_type_fiber ||
  1109. hw->media_type == e1000_media_type_internal_serdes) {
  1110. switch (hw->mac_type) {
  1111. case e1000_82545:
  1112. case e1000_82546:
  1113. case e1000_82545_rev_3:
  1114. case e1000_82546_rev_3:
  1115. return e1000_set_phy_loopback(adapter);
  1116. default:
  1117. rctl = er32(RCTL);
  1118. rctl |= E1000_RCTL_LBM_TCVR;
  1119. ew32(RCTL, rctl);
  1120. return 0;
  1121. }
  1122. } else if (hw->media_type == e1000_media_type_copper) {
  1123. return e1000_set_phy_loopback(adapter);
  1124. }
  1125. return 7;
  1126. }
  1127. static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1128. {
  1129. struct e1000_hw *hw = &adapter->hw;
  1130. u32 rctl;
  1131. u16 phy_reg;
  1132. rctl = er32(RCTL);
  1133. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1134. ew32(RCTL, rctl);
  1135. switch (hw->mac_type) {
  1136. case e1000_82545:
  1137. case e1000_82546:
  1138. case e1000_82545_rev_3:
  1139. case e1000_82546_rev_3:
  1140. default:
  1141. hw->autoneg = true;
  1142. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1143. if (phy_reg & MII_CR_LOOPBACK) {
  1144. phy_reg &= ~MII_CR_LOOPBACK;
  1145. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1146. e1000_phy_reset(hw);
  1147. }
  1148. break;
  1149. }
  1150. }
  1151. static void e1000_create_lbtest_frame(struct sk_buff *skb,
  1152. unsigned int frame_size)
  1153. {
  1154. memset(skb->data, 0xFF, frame_size);
  1155. frame_size &= ~1;
  1156. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1157. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1158. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1159. }
  1160. static int e1000_check_lbtest_frame(const unsigned char *data,
  1161. unsigned int frame_size)
  1162. {
  1163. frame_size &= ~1;
  1164. if (*(data + 3) == 0xFF) {
  1165. if ((*(data + frame_size / 2 + 10) == 0xBE) &&
  1166. (*(data + frame_size / 2 + 12) == 0xAF)) {
  1167. return 0;
  1168. }
  1169. }
  1170. return 13;
  1171. }
  1172. static int e1000_run_loopback_test(struct e1000_adapter *adapter)
  1173. {
  1174. struct e1000_hw *hw = &adapter->hw;
  1175. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1176. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1177. struct pci_dev *pdev = adapter->pdev;
  1178. int i, j, k, l, lc, good_cnt, ret_val = 0;
  1179. unsigned long time;
  1180. ew32(RDT, rxdr->count - 1);
  1181. /* Calculate the loop count based on the largest descriptor ring
  1182. * The idea is to wrap the largest ring a number of times using 64
  1183. * send/receive pairs during each loop
  1184. */
  1185. if (rxdr->count <= txdr->count)
  1186. lc = ((txdr->count / 64) * 2) + 1;
  1187. else
  1188. lc = ((rxdr->count / 64) * 2) + 1;
  1189. k = l = 0;
  1190. for (j = 0; j <= lc; j++) { /* loop count loop */
  1191. for (i = 0; i < 64; i++) { /* send the packets */
  1192. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1193. 1024);
  1194. dma_sync_single_for_device(&pdev->dev,
  1195. txdr->buffer_info[k].dma,
  1196. txdr->buffer_info[k].length,
  1197. DMA_TO_DEVICE);
  1198. if (unlikely(++k == txdr->count))
  1199. k = 0;
  1200. }
  1201. ew32(TDT, k);
  1202. E1000_WRITE_FLUSH();
  1203. msleep(200);
  1204. time = jiffies; /* set the start time for the receive */
  1205. good_cnt = 0;
  1206. do { /* receive the sent packets */
  1207. dma_sync_single_for_cpu(&pdev->dev,
  1208. rxdr->buffer_info[l].dma,
  1209. E1000_RXBUFFER_2048,
  1210. DMA_FROM_DEVICE);
  1211. ret_val = e1000_check_lbtest_frame(
  1212. rxdr->buffer_info[l].rxbuf.data +
  1213. NET_SKB_PAD + NET_IP_ALIGN,
  1214. 1024);
  1215. if (!ret_val)
  1216. good_cnt++;
  1217. if (unlikely(++l == rxdr->count))
  1218. l = 0;
  1219. /* time + 20 msecs (200 msecs on 2.4) is more than
  1220. * enough time to complete the receives, if it's
  1221. * exceeded, break and error off
  1222. */
  1223. } while (good_cnt < 64 && time_after(time + 20, jiffies));
  1224. if (good_cnt != 64) {
  1225. ret_val = 13; /* ret_val is the same as mis-compare */
  1226. break;
  1227. }
  1228. if (time_after_eq(jiffies, time + 2)) {
  1229. ret_val = 14; /* error code for time out error */
  1230. break;
  1231. }
  1232. } /* end loop count loop */
  1233. return ret_val;
  1234. }
  1235. static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
  1236. {
  1237. *data = e1000_setup_desc_rings(adapter);
  1238. if (*data)
  1239. goto out;
  1240. *data = e1000_setup_loopback_test(adapter);
  1241. if (*data)
  1242. goto err_loopback;
  1243. *data = e1000_run_loopback_test(adapter);
  1244. e1000_loopback_cleanup(adapter);
  1245. err_loopback:
  1246. e1000_free_desc_rings(adapter);
  1247. out:
  1248. return *data;
  1249. }
  1250. static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
  1251. {
  1252. struct e1000_hw *hw = &adapter->hw;
  1253. *data = 0;
  1254. if (hw->media_type == e1000_media_type_internal_serdes) {
  1255. int i = 0;
  1256. hw->serdes_has_link = false;
  1257. /* On some blade server designs, link establishment
  1258. * could take as long as 2-3 minutes
  1259. */
  1260. do {
  1261. e1000_check_for_link(hw);
  1262. if (hw->serdes_has_link)
  1263. return *data;
  1264. msleep(20);
  1265. } while (i++ < 3750);
  1266. *data = 1;
  1267. } else {
  1268. e1000_check_for_link(hw);
  1269. if (hw->autoneg) /* if auto_neg is set wait for it */
  1270. msleep(4000);
  1271. if (!(er32(STATUS) & E1000_STATUS_LU))
  1272. *data = 1;
  1273. }
  1274. return *data;
  1275. }
  1276. static int e1000_get_sset_count(struct net_device *netdev, int sset)
  1277. {
  1278. switch (sset) {
  1279. case ETH_SS_TEST:
  1280. return E1000_TEST_LEN;
  1281. case ETH_SS_STATS:
  1282. return E1000_STATS_LEN;
  1283. default:
  1284. return -EOPNOTSUPP;
  1285. }
  1286. }
  1287. static void e1000_diag_test(struct net_device *netdev,
  1288. struct ethtool_test *eth_test, u64 *data)
  1289. {
  1290. struct e1000_adapter *adapter = netdev_priv(netdev);
  1291. struct e1000_hw *hw = &adapter->hw;
  1292. bool if_running = netif_running(netdev);
  1293. set_bit(__E1000_TESTING, &adapter->flags);
  1294. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1295. /* Offline tests */
  1296. /* save speed, duplex, autoneg settings */
  1297. u16 autoneg_advertised = hw->autoneg_advertised;
  1298. u8 forced_speed_duplex = hw->forced_speed_duplex;
  1299. u8 autoneg = hw->autoneg;
  1300. e_info(hw, "offline testing starting\n");
  1301. /* Link test performed before hardware reset so autoneg doesn't
  1302. * interfere with test result
  1303. */
  1304. if (e1000_link_test(adapter, &data[4]))
  1305. eth_test->flags |= ETH_TEST_FL_FAILED;
  1306. if (if_running)
  1307. /* indicate we're in test mode */
  1308. e1000_close(netdev);
  1309. else
  1310. e1000_reset(adapter);
  1311. if (e1000_reg_test(adapter, &data[0]))
  1312. eth_test->flags |= ETH_TEST_FL_FAILED;
  1313. e1000_reset(adapter);
  1314. if (e1000_eeprom_test(adapter, &data[1]))
  1315. eth_test->flags |= ETH_TEST_FL_FAILED;
  1316. e1000_reset(adapter);
  1317. if (e1000_intr_test(adapter, &data[2]))
  1318. eth_test->flags |= ETH_TEST_FL_FAILED;
  1319. e1000_reset(adapter);
  1320. /* make sure the phy is powered up */
  1321. e1000_power_up_phy(adapter);
  1322. if (e1000_loopback_test(adapter, &data[3]))
  1323. eth_test->flags |= ETH_TEST_FL_FAILED;
  1324. /* restore speed, duplex, autoneg settings */
  1325. hw->autoneg_advertised = autoneg_advertised;
  1326. hw->forced_speed_duplex = forced_speed_duplex;
  1327. hw->autoneg = autoneg;
  1328. e1000_reset(adapter);
  1329. clear_bit(__E1000_TESTING, &adapter->flags);
  1330. if (if_running)
  1331. e1000_open(netdev);
  1332. } else {
  1333. e_info(hw, "online testing starting\n");
  1334. /* Online tests */
  1335. if (e1000_link_test(adapter, &data[4]))
  1336. eth_test->flags |= ETH_TEST_FL_FAILED;
  1337. /* Online tests aren't run; pass by default */
  1338. data[0] = 0;
  1339. data[1] = 0;
  1340. data[2] = 0;
  1341. data[3] = 0;
  1342. clear_bit(__E1000_TESTING, &adapter->flags);
  1343. }
  1344. msleep_interruptible(4 * 1000);
  1345. }
  1346. static int e1000_wol_exclusion(struct e1000_adapter *adapter,
  1347. struct ethtool_wolinfo *wol)
  1348. {
  1349. struct e1000_hw *hw = &adapter->hw;
  1350. int retval = 1; /* fail by default */
  1351. switch (hw->device_id) {
  1352. case E1000_DEV_ID_82542:
  1353. case E1000_DEV_ID_82543GC_FIBER:
  1354. case E1000_DEV_ID_82543GC_COPPER:
  1355. case E1000_DEV_ID_82544EI_FIBER:
  1356. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1357. case E1000_DEV_ID_82545EM_FIBER:
  1358. case E1000_DEV_ID_82545EM_COPPER:
  1359. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1360. case E1000_DEV_ID_82546GB_PCIE:
  1361. /* these don't support WoL at all */
  1362. wol->supported = 0;
  1363. break;
  1364. case E1000_DEV_ID_82546EB_FIBER:
  1365. case E1000_DEV_ID_82546GB_FIBER:
  1366. /* Wake events not supported on port B */
  1367. if (er32(STATUS) & E1000_STATUS_FUNC_1) {
  1368. wol->supported = 0;
  1369. break;
  1370. }
  1371. /* return success for non excluded adapter ports */
  1372. retval = 0;
  1373. break;
  1374. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1375. /* quad port adapters only support WoL on port A */
  1376. if (!adapter->quad_port_a) {
  1377. wol->supported = 0;
  1378. break;
  1379. }
  1380. /* return success for non excluded adapter ports */
  1381. retval = 0;
  1382. break;
  1383. default:
  1384. /* dual port cards only support WoL on port A from now on
  1385. * unless it was enabled in the eeprom for port B
  1386. * so exclude FUNC_1 ports from having WoL enabled
  1387. */
  1388. if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
  1389. !adapter->eeprom_wol) {
  1390. wol->supported = 0;
  1391. break;
  1392. }
  1393. retval = 0;
  1394. }
  1395. return retval;
  1396. }
  1397. static void e1000_get_wol(struct net_device *netdev,
  1398. struct ethtool_wolinfo *wol)
  1399. {
  1400. struct e1000_adapter *adapter = netdev_priv(netdev);
  1401. struct e1000_hw *hw = &adapter->hw;
  1402. wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
  1403. wol->wolopts = 0;
  1404. /* this function will set ->supported = 0 and return 1 if wol is not
  1405. * supported by this hardware
  1406. */
  1407. if (e1000_wol_exclusion(adapter, wol) ||
  1408. !device_can_wakeup(&adapter->pdev->dev))
  1409. return;
  1410. /* apply any specific unsupported masks here */
  1411. switch (hw->device_id) {
  1412. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1413. /* KSP3 does not support UCAST wake-ups */
  1414. wol->supported &= ~WAKE_UCAST;
  1415. if (adapter->wol & E1000_WUFC_EX)
  1416. e_err(drv, "Interface does not support directed "
  1417. "(unicast) frame wake-up packets\n");
  1418. break;
  1419. default:
  1420. break;
  1421. }
  1422. if (adapter->wol & E1000_WUFC_EX)
  1423. wol->wolopts |= WAKE_UCAST;
  1424. if (adapter->wol & E1000_WUFC_MC)
  1425. wol->wolopts |= WAKE_MCAST;
  1426. if (adapter->wol & E1000_WUFC_BC)
  1427. wol->wolopts |= WAKE_BCAST;
  1428. if (adapter->wol & E1000_WUFC_MAG)
  1429. wol->wolopts |= WAKE_MAGIC;
  1430. }
  1431. static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1432. {
  1433. struct e1000_adapter *adapter = netdev_priv(netdev);
  1434. struct e1000_hw *hw = &adapter->hw;
  1435. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1436. return -EOPNOTSUPP;
  1437. if (e1000_wol_exclusion(adapter, wol) ||
  1438. !device_can_wakeup(&adapter->pdev->dev))
  1439. return wol->wolopts ? -EOPNOTSUPP : 0;
  1440. switch (hw->device_id) {
  1441. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1442. if (wol->wolopts & WAKE_UCAST) {
  1443. e_err(drv, "Interface does not support directed "
  1444. "(unicast) frame wake-up packets\n");
  1445. return -EOPNOTSUPP;
  1446. }
  1447. break;
  1448. default:
  1449. break;
  1450. }
  1451. /* these settings will always override what we currently have */
  1452. adapter->wol = 0;
  1453. if (wol->wolopts & WAKE_UCAST)
  1454. adapter->wol |= E1000_WUFC_EX;
  1455. if (wol->wolopts & WAKE_MCAST)
  1456. adapter->wol |= E1000_WUFC_MC;
  1457. if (wol->wolopts & WAKE_BCAST)
  1458. adapter->wol |= E1000_WUFC_BC;
  1459. if (wol->wolopts & WAKE_MAGIC)
  1460. adapter->wol |= E1000_WUFC_MAG;
  1461. device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
  1462. return 0;
  1463. }
  1464. static int e1000_set_phys_id(struct net_device *netdev,
  1465. enum ethtool_phys_id_state state)
  1466. {
  1467. struct e1000_adapter *adapter = netdev_priv(netdev);
  1468. struct e1000_hw *hw = &adapter->hw;
  1469. switch (state) {
  1470. case ETHTOOL_ID_ACTIVE:
  1471. e1000_setup_led(hw);
  1472. return 2;
  1473. case ETHTOOL_ID_ON:
  1474. e1000_led_on(hw);
  1475. break;
  1476. case ETHTOOL_ID_OFF:
  1477. e1000_led_off(hw);
  1478. break;
  1479. case ETHTOOL_ID_INACTIVE:
  1480. e1000_cleanup_led(hw);
  1481. }
  1482. return 0;
  1483. }
  1484. static int e1000_get_coalesce(struct net_device *netdev,
  1485. struct ethtool_coalesce *ec)
  1486. {
  1487. struct e1000_adapter *adapter = netdev_priv(netdev);
  1488. if (adapter->hw.mac_type < e1000_82545)
  1489. return -EOPNOTSUPP;
  1490. if (adapter->itr_setting <= 4)
  1491. ec->rx_coalesce_usecs = adapter->itr_setting;
  1492. else
  1493. ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
  1494. return 0;
  1495. }
  1496. static int e1000_set_coalesce(struct net_device *netdev,
  1497. struct ethtool_coalesce *ec)
  1498. {
  1499. struct e1000_adapter *adapter = netdev_priv(netdev);
  1500. struct e1000_hw *hw = &adapter->hw;
  1501. if (hw->mac_type < e1000_82545)
  1502. return -EOPNOTSUPP;
  1503. if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
  1504. ((ec->rx_coalesce_usecs > 4) &&
  1505. (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
  1506. (ec->rx_coalesce_usecs == 2))
  1507. return -EINVAL;
  1508. if (ec->rx_coalesce_usecs == 4) {
  1509. adapter->itr = adapter->itr_setting = 4;
  1510. } else if (ec->rx_coalesce_usecs <= 3) {
  1511. adapter->itr = 20000;
  1512. adapter->itr_setting = ec->rx_coalesce_usecs;
  1513. } else {
  1514. adapter->itr = (1000000 / ec->rx_coalesce_usecs);
  1515. adapter->itr_setting = adapter->itr & ~3;
  1516. }
  1517. if (adapter->itr_setting != 0)
  1518. ew32(ITR, 1000000000 / (adapter->itr * 256));
  1519. else
  1520. ew32(ITR, 0);
  1521. return 0;
  1522. }
  1523. static int e1000_nway_reset(struct net_device *netdev)
  1524. {
  1525. struct e1000_adapter *adapter = netdev_priv(netdev);
  1526. if (netif_running(netdev))
  1527. e1000_reinit_locked(adapter);
  1528. return 0;
  1529. }
  1530. static void e1000_get_ethtool_stats(struct net_device *netdev,
  1531. struct ethtool_stats *stats, u64 *data)
  1532. {
  1533. struct e1000_adapter *adapter = netdev_priv(netdev);
  1534. int i;
  1535. const struct e1000_stats *stat = e1000_gstrings_stats;
  1536. e1000_update_stats(adapter);
  1537. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++, stat++) {
  1538. char *p;
  1539. switch (stat->type) {
  1540. case NETDEV_STATS:
  1541. p = (char *)netdev + stat->stat_offset;
  1542. break;
  1543. case E1000_STATS:
  1544. p = (char *)adapter + stat->stat_offset;
  1545. break;
  1546. default:
  1547. netdev_WARN_ONCE(netdev, "Invalid E1000 stat type: %u index %d\n",
  1548. stat->type, i);
  1549. continue;
  1550. }
  1551. if (stat->sizeof_stat == sizeof(u64))
  1552. data[i] = *(u64 *)p;
  1553. else
  1554. data[i] = *(u32 *)p;
  1555. }
  1556. /* BUG_ON(i != E1000_STATS_LEN); */
  1557. }
  1558. static void e1000_get_strings(struct net_device *netdev, u32 stringset,
  1559. u8 *data)
  1560. {
  1561. u8 *p = data;
  1562. int i;
  1563. switch (stringset) {
  1564. case ETH_SS_TEST:
  1565. memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
  1566. break;
  1567. case ETH_SS_STATS:
  1568. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1569. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1570. ETH_GSTRING_LEN);
  1571. p += ETH_GSTRING_LEN;
  1572. }
  1573. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1574. break;
  1575. }
  1576. }
  1577. static const struct ethtool_ops e1000_ethtool_ops = {
  1578. .get_drvinfo = e1000_get_drvinfo,
  1579. .get_regs_len = e1000_get_regs_len,
  1580. .get_regs = e1000_get_regs,
  1581. .get_wol = e1000_get_wol,
  1582. .set_wol = e1000_set_wol,
  1583. .get_msglevel = e1000_get_msglevel,
  1584. .set_msglevel = e1000_set_msglevel,
  1585. .nway_reset = e1000_nway_reset,
  1586. .get_link = e1000_get_link,
  1587. .get_eeprom_len = e1000_get_eeprom_len,
  1588. .get_eeprom = e1000_get_eeprom,
  1589. .set_eeprom = e1000_set_eeprom,
  1590. .get_ringparam = e1000_get_ringparam,
  1591. .set_ringparam = e1000_set_ringparam,
  1592. .get_pauseparam = e1000_get_pauseparam,
  1593. .set_pauseparam = e1000_set_pauseparam,
  1594. .self_test = e1000_diag_test,
  1595. .get_strings = e1000_get_strings,
  1596. .set_phys_id = e1000_set_phys_id,
  1597. .get_ethtool_stats = e1000_get_ethtool_stats,
  1598. .get_sset_count = e1000_get_sset_count,
  1599. .get_coalesce = e1000_get_coalesce,
  1600. .set_coalesce = e1000_set_coalesce,
  1601. .get_ts_info = ethtool_op_get_ts_info,
  1602. .get_link_ksettings = e1000_get_link_ksettings,
  1603. .set_link_ksettings = e1000_set_link_ksettings,
  1604. };
  1605. void e1000_set_ethtool_ops(struct net_device *netdev)
  1606. {
  1607. netdev->ethtool_ops = &e1000_ethtool_ops;
  1608. }