cpu.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/hardware.h>
  9. #include <asm/arch/spr_misc.h>
  10. int arch_cpu_init(void)
  11. {
  12. struct misc_regs *const misc_p =
  13. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  14. u32 periph1_clken, periph_clk_cfg;
  15. periph1_clken = readl(&misc_p->periph1_clken);
  16. #if defined(CONFIG_SPEAR3XX)
  17. periph1_clken |= MISC_GPT2ENB;
  18. #elif defined(CONFIG_SPEAR600)
  19. periph1_clken |= MISC_GPT3ENB;
  20. #endif
  21. #if defined(CONFIG_PL011_SERIAL)
  22. periph1_clken |= MISC_UART0ENB;
  23. periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
  24. periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
  25. periph_clk_cfg |= CONFIG_SPEAR_UART48M;
  26. writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
  27. #endif
  28. #if defined(CONFIG_ETH_DESIGNWARE)
  29. periph1_clken |= MISC_ETHENB;
  30. #endif
  31. #if defined(CONFIG_DW_UDC)
  32. periph1_clken |= MISC_USBDENB;
  33. #endif
  34. #if defined(CONFIG_SYS_I2C_DW)
  35. periph1_clken |= MISC_I2CENB;
  36. #endif
  37. #if defined(CONFIG_ST_SMI)
  38. periph1_clken |= MISC_SMIENB;
  39. #endif
  40. #if defined(CONFIG_NAND_FSMC)
  41. periph1_clken |= MISC_FSMCENB;
  42. #endif
  43. #if defined(CONFIG_USB_EHCI_SPEAR)
  44. periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
  45. #endif
  46. writel(periph1_clken, &misc_p->periph1_clken);
  47. return 0;
  48. }
  49. void enable_caches(void)
  50. {
  51. #ifndef CONFIG_SYS_ICACHE_OFF
  52. icache_enable();
  53. #endif
  54. #ifndef CONFIG_SYS_DCACHE_OFF
  55. dcache_enable();
  56. #endif
  57. }
  58. #ifdef CONFIG_DISPLAY_CPUINFO
  59. int print_cpuinfo(void)
  60. {
  61. #ifdef CONFIG_SPEAR300
  62. printf("CPU: SPEAr300\n");
  63. #elif defined(CONFIG_SPEAR310)
  64. printf("CPU: SPEAr310\n");
  65. #elif defined(CONFIG_SPEAR320)
  66. printf("CPU: SPEAr320\n");
  67. #elif defined(CONFIG_SPEAR600)
  68. printf("CPU: SPEAr600\n");
  69. #else
  70. #error CPU not supported in spear platform
  71. #endif
  72. return 0;
  73. }
  74. #endif
  75. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
  76. static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
  77. char *const argv[])
  78. {
  79. if (argc != 2)
  80. goto usage;
  81. if (strncmp(argv[1], "hw", 2) == 0) {
  82. /* 1-bit HW ECC */
  83. printf("Switching to 1-bit HW ECC\n");
  84. fsmc_nand_switch_ecc(1);
  85. } else if (strncmp(argv[1], "bch4", 2) == 0) {
  86. /* 4-bit SW ECC BCH4 */
  87. printf("Switching to 4-bit SW ECC (BCH4)\n");
  88. fsmc_nand_switch_ecc(4);
  89. } else {
  90. goto usage;
  91. }
  92. return 0;
  93. usage:
  94. printf("Usage: nandecc %s\n", cmdtp->usage);
  95. return 1;
  96. }
  97. U_BOOT_CMD(
  98. nandecc, 2, 0, do_switch_ecc,
  99. "switch NAND ECC calculation algorithm",
  100. "hw|bch4 - Switch between NAND hardware 1-bit HW and"
  101. " 4-bit SW BCH\n"
  102. );
  103. #endif