mpc8572_serdes.c 2.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010 Freescale Semiconductor, Inc.
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/immap_85xx.h>
  9. #include <asm/fsl_serdes.h>
  10. #define SRDS1_MAX_LANES 8
  11. static u32 serdes1_prtcl_map;
  12. static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  13. [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
  14. [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
  15. [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
  16. [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
  17. [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
  18. [0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
  19. [0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
  20. [0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
  21. [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
  22. };
  23. int is_serdes_configured(enum srds_prtcl prtcl)
  24. {
  25. if (!(serdes1_prtcl_map & (1 << NONE)))
  26. fsl_serdes_init();
  27. return (1 << prtcl) & serdes1_prtcl_map;
  28. }
  29. void fsl_serdes_init(void)
  30. {
  31. ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  32. u32 pordevsr = in_be32(&gur->pordevsr);
  33. u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  34. MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  35. int lane;
  36. if (serdes1_prtcl_map & (1 << NONE))
  37. return;
  38. debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  39. if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  40. printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  41. return;
  42. }
  43. for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  44. enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  45. serdes1_prtcl_map |= (1 << lane_prtcl);
  46. }
  47. if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
  48. serdes1_prtcl_map |= (1 << SGMII_TSEC1);
  49. if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
  50. serdes1_prtcl_map |= (1 << SGMII_TSEC2);
  51. if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
  52. serdes1_prtcl_map |= (1 << SGMII_TSEC3);
  53. if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
  54. serdes1_prtcl_map |= (1 << SGMII_TSEC4);
  55. /* Set the first bit to indicate serdes has been initialized */
  56. serdes1_prtcl_map |= (1 << NONE);
  57. }