car.S 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <config.h>
  6. #include <asm/pci.h>
  7. #include <asm/post.h>
  8. #include <asm/arch/quark.h>
  9. #include <asm/arch/msg_port.h>
  10. .globl car_init
  11. car_init:
  12. post_code(POST_CAR_START)
  13. /*
  14. * Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is
  15. * initialized by hardware. eSRAM is the ideal place to be used
  16. * for Cache-As-RAM (CAR) before system memory is available.
  17. *
  18. * Relocate this eSRAM to a suitable location in the physical
  19. * memory map and enable it.
  20. */
  21. /* Host Memory Bound Register P03h:R08h */
  22. mov $((MSG_PORT_HOST_BRIDGE << 16) | (HM_BOUND << 8)), %eax
  23. mov $(DRAM_BASE + DRAM_MAX_SIZE + ESRAM_SIZE), %edx
  24. lea 1f, %esp
  25. jmp msg_port_write
  26. 1:
  27. /* eSRAM Block Page Control Register P05h:R82h */
  28. mov $((MSG_PORT_MEM_MGR << 16) | (ESRAM_BLK_CTRL << 8)), %eax
  29. mov $(ESRAM_BLOCK_MODE | (CONFIG_ESRAM_BASE >> 24)), %edx
  30. lea 2f, %esp
  31. jmp msg_port_write
  32. 2:
  33. post_code(POST_CAR_CPU_CACHE)
  34. jmp car_init_ret
  35. msg_port_read:
  36. /*
  37. * Parameter:
  38. * eax[23:16] - Message Port ID
  39. * eax[15:08] - Register Address
  40. *
  41. * Return Value:
  42. * eax - Message Port Register value
  43. *
  44. * Return Address: esp
  45. */
  46. or $((MSG_OP_READ << 24) | MSG_BYTE_ENABLE), %eax
  47. mov %eax, %ebx
  48. /* Write MCR B0:D0:F0:RD0 */
  49. mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
  50. mov $PCI_REG_ADDR, %dx
  51. out %eax, %dx
  52. mov $PCI_REG_DATA, %dx
  53. mov %ebx, %eax
  54. out %eax, %dx
  55. /* Read MDR B0:D0:F0:RD4 */
  56. mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
  57. mov $PCI_REG_ADDR, %dx
  58. out %eax, %dx
  59. mov $PCI_REG_DATA, %dx
  60. in %dx, %eax
  61. jmp *%esp
  62. msg_port_write:
  63. /*
  64. * Parameter:
  65. * eax[23:16] - Message Port ID
  66. * eax[15:08] - Register Address
  67. * edx - Message Port Register value to write
  68. *
  69. * Return Address: esp
  70. */
  71. or $((MSG_OP_WRITE << 24) | MSG_BYTE_ENABLE), %eax
  72. mov %eax, %esi
  73. mov %edx, %edi
  74. /* Write MDR B0:D0:F0:RD4 */
  75. mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
  76. mov $PCI_REG_ADDR, %dx
  77. out %eax, %dx
  78. mov $PCI_REG_DATA, %dx
  79. mov %edi, %eax
  80. out %eax, %dx
  81. /* Write MCR B0:D0:F0:RD0 */
  82. mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
  83. mov $PCI_REG_ADDR, %dx
  84. out %eax, %dx
  85. mov $PCI_REG_DATA, %dx
  86. mov %esi, %eax
  87. out %eax, %dx
  88. jmp *%esp