southcluster.asl 5.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. Device (PCI0)
  6. {
  7. Name(_HID, EISAID("PNP0A08")) /* PCIe */
  8. Name(_CID, EISAID("PNP0A03")) /* PCI */
  9. Name(_ADR, 0)
  10. Name(_BBN, 0)
  11. Name(MCRS, ResourceTemplate()
  12. {
  13. /* Bus Numbers */
  14. WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
  15. 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
  16. /* IO Region 0 */
  17. WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  18. 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
  19. /* PCI Config Space */
  20. IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
  21. /* IO Region 1 */
  22. WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  23. 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
  24. /* VGA memory (0xa0000-0xbffff) */
  25. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  26. Cacheable, ReadWrite,
  27. 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
  28. 0x00020000, , , ASEG)
  29. /* OPROM reserved (0xc0000-0xc3fff) */
  30. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  31. Cacheable, ReadWrite,
  32. 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
  33. 0x00004000, , , OPR0)
  34. /* OPROM reserved (0xc4000-0xc7fff) */
  35. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  36. Cacheable, ReadWrite,
  37. 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
  38. 0x00004000, , , OPR1)
  39. /* OPROM reserved (0xc8000-0xcbfff) */
  40. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  41. Cacheable, ReadWrite,
  42. 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
  43. 0x00004000, , , OPR2)
  44. /* OPROM reserved (0xcc000-0xcffff) */
  45. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  46. Cacheable, ReadWrite,
  47. 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
  48. 0x00004000, , , OPR3)
  49. /* OPROM reserved (0xd0000-0xd3fff) */
  50. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  51. Cacheable, ReadWrite,
  52. 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
  53. 0x00004000, , , OPR4)
  54. /* OPROM reserved (0xd4000-0xd7fff) */
  55. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  56. Cacheable, ReadWrite,
  57. 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
  58. 0x00004000, , , OPR5)
  59. /* OPROM reserved (0xd8000-0xdbfff) */
  60. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  61. Cacheable, ReadWrite,
  62. 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
  63. 0x00004000, , , OPR6)
  64. /* OPROM reserved (0xdc000-0xdffff) */
  65. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  66. Cacheable, ReadWrite,
  67. 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
  68. 0x00004000, , , OPR7)
  69. /* BIOS Extension (0xe0000-0xe3fff) */
  70. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  71. Cacheable, ReadWrite,
  72. 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
  73. 0x00004000, , , ESG0)
  74. /* BIOS Extension (0xe4000-0xe7fff) */
  75. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  76. Cacheable, ReadWrite,
  77. 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
  78. 0x00004000, , , ESG1)
  79. /* BIOS Extension (0xe8000-0xebfff) */
  80. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  81. Cacheable, ReadWrite,
  82. 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
  83. 0x00004000, , , ESG2)
  84. /* BIOS Extension (0xec000-0xeffff) */
  85. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  86. Cacheable, ReadWrite,
  87. 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
  88. 0x00004000, , , ESG3)
  89. /* System BIOS (0xf0000-0xfffff) */
  90. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  91. Cacheable, ReadWrite,
  92. 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
  93. 0x00010000, , , FSEG)
  94. /* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */
  95. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  96. Cacheable, ReadWrite,
  97. 0x00000000, 0x00000000, 0x00000000, 0x00000000,
  98. 0x00000000, , , PMEM)
  99. })
  100. Method(_CRS, 0, Serialized)
  101. {
  102. /* Update PCI resource area */
  103. CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
  104. CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
  105. CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
  106. /*
  107. * Hardcode TOLM to 2GB for now (see DRAM_MAX_SIZE in quark.h)
  108. *
  109. * TODO: for generic usage, read TOLM value from register, or
  110. * from global NVS (not implemented by U-Boot yet).
  111. */
  112. Store(0x80000000, PMIN)
  113. Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX)
  114. Add(Subtract(PMAX, PMIN), 1, PLEN)
  115. Return (MCRS)
  116. }
  117. /* Device Resource Consumption */
  118. Device (PDRC)
  119. {
  120. Name(_HID, EISAID("PNP0C02"))
  121. Name(_UID, 1)
  122. Name(PDRS, ResourceTemplate() {
  123. Memory32Fixed(ReadWrite, CONFIG_ESRAM_BASE, 0x80000)
  124. Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
  125. Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
  126. IO(Decode16, SPI_DMA_BASE_ADDRESS, SPI_DMA_BASE_ADDRESS, 0x0010, SPI_DMA_BASE_SIZE)
  127. IO(Decode16, GPIO_BASE_ADDRESS, GPIO_BASE_ADDRESS, 0x0080, GPIO_BASE_SIZE)
  128. IO(Decode16, WDT_BASE_ADDRESS, WDT_BASE_ADDRESS, 0x0040, WDT_BASE_SIZE)
  129. })
  130. /* Current Resource Settings */
  131. Method(_CRS, 0, Serialized)
  132. {
  133. Return (PDRS)
  134. }
  135. }
  136. Method(_OSC, 4)
  137. {
  138. /* Check for proper GUID */
  139. If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
  140. /* Let OS control everything */
  141. Return (Arg3)
  142. } Else {
  143. /* Unrecognized UUID */
  144. CreateDWordField(Arg3, 0, CDW1)
  145. Or(CDW1, 4, CDW1)
  146. Return (Arg3)
  147. }
  148. }
  149. /* LPC Bridge 0:1f.0 */
  150. #include "lpc.asl"
  151. /* IRQ routing for each PCI device */
  152. #include <asm/acpi/irqroute.asl>
  153. }