processor.h 1.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2002
  4. * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
  5. */
  6. #ifndef __ASM_PROCESSOR_H_
  7. #define __ASM_PROCESSOR_H_ 1
  8. #define X86_GDT_ENTRY_SIZE 8
  9. #define X86_GDT_ENTRY_NULL 0
  10. #define X86_GDT_ENTRY_UNUSED 1
  11. #define X86_GDT_ENTRY_32BIT_CS 2
  12. #define X86_GDT_ENTRY_32BIT_DS 3
  13. #define X86_GDT_ENTRY_32BIT_FS 4
  14. #define X86_GDT_ENTRY_16BIT_CS 5
  15. #define X86_GDT_ENTRY_16BIT_DS 6
  16. #define X86_GDT_ENTRY_16BIT_FLAT_CS 7
  17. #define X86_GDT_ENTRY_16BIT_FLAT_DS 8
  18. #define X86_GDT_NUM_ENTRIES 9
  19. #define X86_GDT_SIZE (X86_GDT_NUM_ENTRIES * X86_GDT_ENTRY_SIZE)
  20. /* Length of the public header on Intel microcode blobs */
  21. #define UCODE_HEADER_LEN 0x30
  22. #ifndef __ASSEMBLY__
  23. /*
  24. * This register is documented in (for example) the Intel Atom Processor E3800
  25. * Product Family Datasheet in "PCU - Power Management Controller (PMC)".
  26. *
  27. * RST_CNT: Reset Control Register (RST_CNT) Offset cf9.
  28. *
  29. * The naming follows Intel's naming.
  30. */
  31. #define IO_PORT_RESET 0xcf9
  32. enum {
  33. SYS_RST = 1 << 1, /* 0 for soft reset, 1 for hard reset */
  34. RST_CPU = 1 << 2, /* initiate reset */
  35. FULL_RST = 1 << 3, /* full power cycle */
  36. };
  37. /**
  38. * x86_full_reset() - reset everything: perform a full power cycle
  39. */
  40. void x86_full_reset(void);
  41. static inline __attribute__((always_inline)) void cpu_hlt(void)
  42. {
  43. asm("hlt");
  44. }
  45. static inline ulong cpu_get_sp(void)
  46. {
  47. ulong result;
  48. asm volatile(
  49. "mov %%esp, %%eax"
  50. : "=a" (result));
  51. return result;
  52. }
  53. #endif /* __ASSEMBLY__ */
  54. #endif