atmel-at91.txt 7.1 KB

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  1. Atmel AT91 device tree bindings.
  2. ================================
  3. Boards with a SoC of the Atmel AT91 or SMART family shall have the following
  4. properties:
  5. Required root node properties:
  6. compatible: must be one of:
  7. * "atmel,at91rm9200"
  8. * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
  9. the specific SoC family or compatible:
  10. o "atmel,at91sam9260"
  11. o "atmel,at91sam9261"
  12. o "atmel,at91sam9263"
  13. o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
  14. SoC compatible:
  15. - "atmel,at91sam9g15"
  16. - "atmel,at91sam9g25"
  17. - "atmel,at91sam9g35"
  18. - "atmel,at91sam9x25"
  19. - "atmel,at91sam9x35"
  20. o "atmel,at91sam9g20"
  21. o "atmel,at91sam9g45"
  22. o "atmel,at91sam9n12"
  23. o "atmel,at91sam9rl"
  24. o "atmel,at91sam9xe"
  25. * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
  26. SoC family:
  27. o "atmel,sama5d2" shall be extended with the specific SoC compatible:
  28. - "atmel,sama5d27"
  29. o "atmel,sama5d3" shall be extended with the specific SoC compatible:
  30. - "atmel,sama5d31"
  31. - "atmel,sama5d33"
  32. - "atmel,sama5d34"
  33. - "atmel,sama5d35"
  34. - "atmel,sama5d36"
  35. o "atmel,sama5d4" shall be extended with the specific SoC compatible:
  36. - "atmel,sama5d41"
  37. - "atmel,sama5d42"
  38. - "atmel,sama5d43"
  39. - "atmel,sama5d44"
  40. * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
  41. SoC family:
  42. o "atmel,sams70" shall be extended with the specific MCU compatible:
  43. - "atmel,sams70j19"
  44. - "atmel,sams70j20"
  45. - "atmel,sams70j21"
  46. - "atmel,sams70n19"
  47. - "atmel,sams70n20"
  48. - "atmel,sams70n21"
  49. - "atmel,sams70q19"
  50. - "atmel,sams70q20"
  51. - "atmel,sams70q21"
  52. o "atmel,samv70" shall be extended with the specific MCU compatible:
  53. - "atmel,samv70j19"
  54. - "atmel,samv70j20"
  55. - "atmel,samv70n19"
  56. - "atmel,samv70n20"
  57. - "atmel,samv70q19"
  58. - "atmel,samv70q20"
  59. o "atmel,samv71" shall be extended with the specific MCU compatible:
  60. - "atmel,samv71j19"
  61. - "atmel,samv71j20"
  62. - "atmel,samv71j21"
  63. - "atmel,samv71n19"
  64. - "atmel,samv71n20"
  65. - "atmel,samv71n21"
  66. - "atmel,samv71q19"
  67. - "atmel,samv71q20"
  68. - "atmel,samv71q21"
  69. Chipid required properties:
  70. - compatible: Should be "atmel,sama5d2-chipid"
  71. - reg : Should contain registers location and length
  72. PIT Timer required properties:
  73. - compatible: Should be "atmel,at91sam9260-pit"
  74. - reg: Should contain registers location and length
  75. - interrupts: Should contain interrupt for the PIT which is the IRQ line
  76. shared across all System Controller members.
  77. System Timer (ST) required properties:
  78. - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
  79. - reg: Should contain registers location and length
  80. - interrupts: Should contain interrupt for the ST which is the IRQ line
  81. shared across all System Controller members.
  82. - clocks: phandle to input clock.
  83. Its subnodes can be:
  84. - watchdog: compatible should be "atmel,at91rm9200-wdt"
  85. RSTC Reset Controller required properties:
  86. - compatible: Should be "atmel,<chip>-rstc".
  87. <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
  88. - reg: Should contain registers location and length
  89. - clocks: phandle to input clock.
  90. Example:
  91. rstc@fffffd00 {
  92. compatible = "atmel,at91sam9260-rstc";
  93. reg = <0xfffffd00 0x10>;
  94. clocks = <&clk32k>;
  95. };
  96. RAMC SDRAM/DDR Controller required properties:
  97. - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
  98. "atmel,at91sam9260-sdramc",
  99. "atmel,at91sam9g45-ddramc",
  100. "atmel,sama5d3-ddramc",
  101. - reg: Should contain registers location and length
  102. Examples:
  103. ramc0: ramc@ffffe800 {
  104. compatible = "atmel,at91sam9g45-ddramc";
  105. reg = <0xffffe800 0x200>;
  106. };
  107. SHDWC Shutdown Controller
  108. required properties:
  109. - compatible: Should be "atmel,<chip>-shdwc".
  110. <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
  111. - reg: Should contain registers location and length
  112. - clocks: phandle to input clock.
  113. optional properties:
  114. - atmel,wakeup-mode: String, operation mode of the wakeup mode.
  115. Supported values are: "none", "high", "low", "any".
  116. - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
  117. optional at91sam9260 properties:
  118. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  119. optional at91sam9rl properties:
  120. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  121. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  122. optional at91sam9x5 properties:
  123. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  124. Example:
  125. shdwc@fffffd10 {
  126. compatible = "atmel,at91sam9260-shdwc";
  127. reg = <0xfffffd10 0x10>;
  128. clocks = <&clk32k>;
  129. };
  130. SHDWC SAMA5D2-Compatible Shutdown Controller
  131. 1) shdwc node
  132. required properties:
  133. - compatible: should be "atmel,sama5d2-shdwc".
  134. - reg: should contain registers location and length
  135. - clocks: phandle to input clock.
  136. - #address-cells: should be one. The cell is the wake-up input index.
  137. - #size-cells: should be zero.
  138. optional properties:
  139. - debounce-delay-us: minimum wake-up inputs debouncer period in
  140. microseconds. It's usually a board-related property.
  141. - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
  142. The node contains child nodes for each wake-up input that the platform uses.
  143. 2) input nodes
  144. Wake-up input nodes are usually described in the "board" part of the Device
  145. Tree. Note also that input 0 is linked to the wake-up pin and is frequently
  146. used.
  147. Required properties:
  148. - reg: should contain the wake-up input index [0 - 15].
  149. Optional properties:
  150. - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
  151. by the child, forces the wake-up of the core power supply on a high level.
  152. The default is to be active low.
  153. Example:
  154. On the SoC side:
  155. shdwc@f8048010 {
  156. compatible = "atmel,sama5d2-shdwc";
  157. reg = <0xf8048010 0x10>;
  158. clocks = <&clk32k>;
  159. #address-cells = <1>;
  160. #size-cells = <0>;
  161. atmel,wakeup-rtc-timer;
  162. };
  163. On the board side:
  164. shdwc@f8048010 {
  165. debounce-delay-us = <976>;
  166. input@0 {
  167. reg = <0>;
  168. };
  169. input@1 {
  170. reg = <1>;
  171. atmel,wakeup-active-high;
  172. };
  173. };
  174. Special Function Registers (SFR)
  175. Special Function Registers (SFR) manage specific aspects of the integrated
  176. memory, bridge implementations, processor and other functionality not controlled
  177. elsewhere.
  178. required properties:
  179. - compatible: Should be "atmel,<chip>-sfr", "syscon" or
  180. "atmel,<chip>-sfrbu", "syscon"
  181. <chip> can be "sama5d3", "sama5d4" or "sama5d2".
  182. - reg: Should contain registers location and length
  183. sfr@f0038000 {
  184. compatible = "atmel,sama5d3-sfr", "syscon";
  185. reg = <0xf0038000 0x60>;
  186. };
  187. Security Module (SECUMOD)
  188. The Security Module macrocell provides all necessary secure functions to avoid
  189. voltage, temperature, frequency and mechanical attacks on the chip. It also
  190. embeds secure memories that can be scrambled
  191. required properties:
  192. - compatible: Should be "atmel,<chip>-secumod", "syscon".
  193. <chip> can be "sama5d2".
  194. - reg: Should contain registers location and length
  195. secumod@fc040000 {
  196. compatible = "atmel,sama5d2-secumod", "syscon";
  197. reg = <0xfc040000 0x100>;
  198. };