stm32-dmamux.txt 1.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384
  1. STM32 DMA MUX (DMA request router)
  2. Required properties:
  3. - compatible: "st,stm32h7-dmamux"
  4. - reg: Memory map for accessing module
  5. - #dma-cells: Should be set to <3>.
  6. First parameter is request line number.
  7. Second is DMA channel configuration
  8. Third is Fifo threshold
  9. For more details about the three cells, please see
  10. stm32-dma.txt documentation binding file
  11. - dma-masters: Phandle pointing to the DMA controllers.
  12. Several controllers are allowed. Only "st,stm32-dma" DMA
  13. compatible are supported.
  14. Optional properties:
  15. - dma-channels : Number of DMA requests supported.
  16. - dma-requests : Number of DMAMUX requests supported.
  17. - resets: Reference to a reset controller asserting the DMA controller
  18. - clocks: Input clock of the DMAMUX instance.
  19. Example:
  20. /* DMA controller 1 */
  21. dma1: dma-controller@40020000 {
  22. compatible = "st,stm32-dma";
  23. reg = <0x40020000 0x400>;
  24. interrupts = <11>,
  25. <12>,
  26. <13>,
  27. <14>,
  28. <15>,
  29. <16>,
  30. <17>,
  31. <47>;
  32. clocks = <&timer_clk>;
  33. #dma-cells = <4>;
  34. st,mem2mem;
  35. resets = <&rcc 150>;
  36. dma-channels = <8>;
  37. dma-requests = <8>;
  38. };
  39. /* DMA controller 1 */
  40. dma2: dma@40020400 {
  41. compatible = "st,stm32-dma";
  42. reg = <0x40020400 0x400>;
  43. interrupts = <56>,
  44. <57>,
  45. <58>,
  46. <59>,
  47. <60>,
  48. <68>,
  49. <69>,
  50. <70>;
  51. clocks = <&timer_clk>;
  52. #dma-cells = <4>;
  53. st,mem2mem;
  54. resets = <&rcc 150>;
  55. dma-channels = <8>;
  56. dma-requests = <8>;
  57. };
  58. /* DMA mux */
  59. dmamux1: dma-router@40020800 {
  60. compatible = "st,stm32h7-dmamux";
  61. reg = <0x40020800 0x3c>;
  62. #dma-cells = <3>;
  63. dma-requests = <128>;
  64. dma-channels = <16>;
  65. dma-masters = <&dma1 &dma2>;
  66. clocks = <&timer_clk>;
  67. };
  68. /* DMA client */
  69. usart1: serial@40011000 {
  70. compatible = "st,stm32-usart", "st,stm32-uart";
  71. reg = <0x40011000 0x400>;
  72. interrupts = <37>;
  73. clocks = <&timer_clk>;
  74. dmas = <&dmamux1 41 0x414 0>,
  75. <&dmamux1 42 0x414 0>;
  76. dma-names = "rx", "tx";
  77. };