i2c-mux-gpmux.txt 3.3 KB

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  1. General Purpose I2C Bus Mux
  2. This binding describes an I2C bus multiplexer that uses a mux controller
  3. from the mux subsystem to route the I2C signals.
  4. .-----. .-----.
  5. | dev | | dev |
  6. .------------. '-----' '-----'
  7. | SoC | | |
  8. | | .--------+--------'
  9. | .------. | .------+ child bus A, on MUX value set to 0
  10. | | I2C |-|--| Mux |
  11. | '------' | '--+---+ child bus B, on MUX value set to 1
  12. | .------. | | '----------+--------+--------.
  13. | | MUX- | | | | | |
  14. | | Ctrl |-|-----+ .-----. .-----. .-----.
  15. | '------' | | dev | | dev | | dev |
  16. '------------' '-----' '-----' '-----'
  17. Required properties:
  18. - compatible: i2c-mux
  19. - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
  20. port is connected to.
  21. - mux-controls: The phandle of the mux controller to use for operating the
  22. mux.
  23. * Standard I2C mux properties. See i2c-mux.txt in this directory.
  24. * I2C child bus nodes. See i2c-mux.txt in this directory. The sub-bus number
  25. is also the mux-controller state described in ../mux/mux-controller.txt
  26. Optional properties:
  27. - mux-locked: If present, explicitly allow unrelated I2C transactions on the
  28. parent I2C adapter at these times:
  29. + during setup of the multiplexer
  30. + between setup of the multiplexer and the child bus I2C transaction
  31. + between the child bus I2C transaction and releasing of the multiplexer
  32. + during releasing of the multiplexer
  33. However, I2C transactions to devices behind all I2C multiplexers connected
  34. to the same parent adapter that this multiplexer is connected to are blocked
  35. for the full duration of the complete multiplexed I2C transaction (i.e.
  36. including the times covered by the above list).
  37. If mux-locked is not present, the multiplexer is assumed to be parent-locked.
  38. This means that no unrelated I2C transactions are allowed on the parent I2C
  39. adapter for the complete multiplexed I2C transaction.
  40. The properties of mux-locked and parent-locked multiplexers are discussed
  41. in more detail in Documentation/i2c/i2c-topology.
  42. For each i2c child node, an I2C child bus will be created. They will
  43. be numbered based on their order in the device tree.
  44. Whenever an access is made to a device on a child bus, the value set
  45. in the relevant node's reg property will be set as the state in the
  46. mux controller.
  47. Example:
  48. mux: mux-controller {
  49. compatible = "gpio-mux";
  50. #mux-control-cells = <0>;
  51. mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
  52. <&pioA 1 GPIO_ACTIVE_HIGH>;
  53. };
  54. i2c-mux {
  55. compatible = "i2c-mux";
  56. mux-locked;
  57. i2c-parent = <&i2c1>;
  58. mux-controls = <&mux>;
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. i2c@1 {
  62. reg = <1>;
  63. #address-cells = <1>;
  64. #size-cells = <0>;
  65. ssd1307: oled@3c {
  66. compatible = "solomon,ssd1307fb-i2c";
  67. reg = <0x3c>;
  68. pwms = <&pwm 4 3000>;
  69. reset-gpios = <&gpio2 7 1>;
  70. reset-active-low;
  71. };
  72. };
  73. i2c@3 {
  74. reg = <3>;
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. pca9555: pca9555@20 {
  78. compatible = "nxp,pca9555";
  79. gpio-controller;
  80. #gpio-cells = <2>;
  81. reg = <0x20>;
  82. };
  83. };
  84. };