marvell,odmi-controller.txt 1.4 KB

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  1. * Marvell ODMI for MSI support
  2. Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller
  3. which can be used by on-board peripheral for MSI interrupts.
  4. Required properties:
  5. - compatible : The value here should contain:
  6. "marvell,ap806-odmi-controller", "marvell,odmi-controller".
  7. - interrupt,controller : Identifies the node as an interrupt controller.
  8. - msi-controller : Identifies the node as an MSI controller.
  9. - marvell,odmi-frames : Number of ODMI frames available. Each frame
  10. provides a number of events.
  11. - reg : List of register definitions, one for each
  12. ODMI frame.
  13. - marvell,spi-base : List of GIC base SPI interrupts, one for each
  14. ODMI frame. Those SPI interrupts are 0-based,
  15. i.e marvell,spi-base = <128> will use SPI #96.
  16. See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
  17. for details about the GIC Device Tree binding.
  18. Example:
  19. odmi: odmi@300000 {
  20. compatible = "marvell,ap806-odmi-controller",
  21. "marvell,odmi-controller";
  22. interrupt-controller;
  23. msi-controller;
  24. marvell,odmi-frames = <4>;
  25. reg = <0x300000 0x4000>,
  26. <0x304000 0x4000>,
  27. <0x308000 0x4000>,
  28. <0x30C000 0x4000>;
  29. marvell,spi-base = <128>, <136>, <144>, <152>;
  30. };