samsung,exynos5433-lpass.txt 2.0 KB

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  1. Samsung Exynos SoC Low Power Audio Subsystem (LPASS)
  2. Required properties:
  3. - compatible : "samsung,exynos5433-lpass"
  4. - reg : should contain the LPASS top SFR region location
  5. and size
  6. - clock-names : should contain following required clocks: "sfr0_ctrl"
  7. - clocks : should contain clock specifiers of all clocks, which
  8. input names have been specified in clock-names
  9. property, in same order.
  10. - #address-cells : should be 1
  11. - #size-cells : should be 1
  12. - ranges : must be present
  13. Each IP block of the Low Power Audio Subsystem should be specified as
  14. an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes:
  15. UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
  16. Bindings of the sub-nodes are described in:
  17. ../serial/samsung_uart.txt
  18. ../sound/samsung-i2s.txt
  19. ../dma/arm-pl330.txt
  20. Example:
  21. audio-subsystem {
  22. compatible = "samsung,exynos5433-lpass";
  23. reg = <0x11400000 0x100>, <0x11500000 0x08>;
  24. clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
  25. clock-names = "sfr0_ctrl";
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. ranges;
  29. adma: adma@11420000 {
  30. compatible = "arm,pl330", "arm,primecell";
  31. reg = <0x11420000 0x1000>;
  32. interrupts = <0 73 0>;
  33. clocks = <&cmu_aud CLK_ACLK_DMAC>;
  34. clock-names = "apb_pclk";
  35. #dma-cells = <1>;
  36. #dma-channels = <8>;
  37. #dma-requests = <32>;
  38. };
  39. i2s0: i2s0@11440000 {
  40. compatible = "samsung,exynos7-i2s";
  41. reg = <0x11440000 0x100>;
  42. dmas = <&adma 0 &adma 2>;
  43. dma-names = "tx", "rx";
  44. interrupts = <0 70 0>;
  45. clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
  46. <&cmu_aud CLK_SCLK_AUD_I2S>,
  47. <&cmu_aud CLK_SCLK_I2S_BCLK>;
  48. clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&i2s0_bus>;
  51. };
  52. serial_3: serial@11460000 {
  53. compatible = "samsung,exynos5433-uart";
  54. reg = <0x11460000 0x100>;
  55. interrupts = <0 67 0>;
  56. clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
  57. <&cmu_aud CLK_SCLK_AUD_UART>;
  58. clock-names = "uart", "clk_uart_baud0";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&uart_aud_bus>;
  61. };
  62. };