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- MMIO register bitfield-based multiplexer controller bindings
- Define register bitfields to be used to control multiplexers. The parent
- device tree node must be a syscon node to provide register access.
- Required properties:
- - compatible : "mmio-mux"
- - #mux-control-cells : <1>
- - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
- pairs, each describing a single mux control.
- * Standard mux-controller bindings as decribed in mux-controller.txt
- Optional properties:
- - idle-states : if present, the state the muxes will have when idle. The
- special state MUX_IDLE_AS_IS is the default.
- The multiplexer state of each multiplexer is defined as the value of the
- bitfield described by the corresponding register offset and bitfield mask pair
- in the mux-reg-masks array, accessed through the parent syscon.
- Example:
- syscon {
- compatible = "syscon";
- mux: mux-controller {
- compatible = "mmio-mux";
- #mux-control-cells = <1>;
- mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
- <0x3 0x40>, /* 1: reg 0x3, bit 6 */
- idle-states = <MUX_IDLE_AS_IS>, <0>;
- };
- };
- video-mux {
- compatible = "video-mux";
- mux-controls = <&mux 0>;
- ports {
- /* inputs 0..3 */
- port@0 {
- reg = <0>;
- };
- port@1 {
- reg = <1>;
- };
- port@2 {
- reg = <2>;
- };
- port@3 {
- reg = <3>;
- };
- /* output */
- port@4 {
- reg = <4>;
- };
- };
- };
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