snps,dw-apb-ssi.txt 1.0 KB

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  1. Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
  2. Required properties:
  3. - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
  4. "jaguar2"
  5. - reg : The register base for the controller. For "mscc,<soc>-spi", a second
  6. register set is required (named ICPU_CFG:SPI_MST)
  7. - interrupts : One interrupt, used by the controller.
  8. - #address-cells : <1>, as required by generic SPI binding.
  9. - #size-cells : <0>, also as required by generic SPI binding.
  10. Optional properties:
  11. - cs-gpios : Specifies the gpio pis to be used for chipselects.
  12. - num-cs : The number of chipselects. If omitted, this will default to 4.
  13. - reg-io-width : The I/O register width (in bytes) implemented by this
  14. device. Supported values are 2 or 4 (the default).
  15. Child nodes as per the generic SPI binding.
  16. Example:
  17. spi@fff00000 {
  18. compatible = "snps,dw-apb-ssi";
  19. reg = <0xfff00000 0x1000>;
  20. interrupts = <0 154 4>;
  21. #address-cells = <1>;
  22. #size-cells = <0>;
  23. num-cs = <2>;
  24. cs-gpios = <&gpio0 13 0>,
  25. <&gpio0 14 0>;
  26. };