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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * arch/ia64/kernel/entry.S
  4. *
  5. * Kernel entry points.
  6. *
  7. * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
  8. * David Mosberger-Tang <davidm@hpl.hp.com>
  9. * Copyright (C) 1999, 2002-2003
  10. * Asit Mallick <Asit.K.Mallick@intel.com>
  11. * Don Dugger <Don.Dugger@intel.com>
  12. * Suresh Siddha <suresh.b.siddha@intel.com>
  13. * Fenghua Yu <fenghua.yu@intel.com>
  14. * Copyright (C) 1999 VA Linux Systems
  15. * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
  16. */
  17. /*
  18. * ia64_switch_to now places correct virtual mapping in in TR2 for
  19. * kernel stack. This allows us to handle interrupts without changing
  20. * to physical mode.
  21. *
  22. * Jonathan Nicklin <nicklin@missioncriticallinux.com>
  23. * Patrick O'Rourke <orourke@missioncriticallinux.com>
  24. * 11/07/2000
  25. */
  26. /*
  27. * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
  28. * VA Linux Systems Japan K.K.
  29. * pv_ops.
  30. */
  31. /*
  32. * Global (preserved) predicate usage on syscall entry/exit path:
  33. *
  34. * pKStk: See entry.h.
  35. * pUStk: See entry.h.
  36. * pSys: See entry.h.
  37. * pNonSys: !pSys
  38. */
  39. #include <asm/asmmacro.h>
  40. #include <asm/cache.h>
  41. #include <asm/errno.h>
  42. #include <asm/kregs.h>
  43. #include <asm/asm-offsets.h>
  44. #include <asm/pgtable.h>
  45. #include <asm/percpu.h>
  46. #include <asm/processor.h>
  47. #include <asm/thread_info.h>
  48. #include <asm/unistd.h>
  49. #include <asm/ftrace.h>
  50. #include <asm/export.h>
  51. #include "minstate.h"
  52. /*
  53. * execve() is special because in case of success, we need to
  54. * setup a null register window frame.
  55. */
  56. ENTRY(ia64_execve)
  57. /*
  58. * Allocate 8 input registers since ptrace() may clobber them
  59. */
  60. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
  61. alloc loc1=ar.pfs,8,2,3,0
  62. mov loc0=rp
  63. .body
  64. mov out0=in0 // filename
  65. ;; // stop bit between alloc and call
  66. mov out1=in1 // argv
  67. mov out2=in2 // envp
  68. br.call.sptk.many rp=sys_execve
  69. .ret0:
  70. cmp4.ge p6,p7=r8,r0
  71. mov ar.pfs=loc1 // restore ar.pfs
  72. sxt4 r8=r8 // return 64-bit result
  73. ;;
  74. stf.spill [sp]=f0
  75. mov rp=loc0
  76. (p6) mov ar.pfs=r0 // clear ar.pfs on success
  77. (p7) br.ret.sptk.many rp
  78. /*
  79. * In theory, we'd have to zap this state only to prevent leaking of
  80. * security sensitive state (e.g., if current->mm->dumpable is zero). However,
  81. * this executes in less than 20 cycles even on Itanium, so it's not worth
  82. * optimizing for...).
  83. */
  84. mov ar.unat=0; mov ar.lc=0
  85. mov r4=0; mov f2=f0; mov b1=r0
  86. mov r5=0; mov f3=f0; mov b2=r0
  87. mov r6=0; mov f4=f0; mov b3=r0
  88. mov r7=0; mov f5=f0; mov b4=r0
  89. ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
  90. ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
  91. ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
  92. ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
  93. ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
  94. ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
  95. ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
  96. br.ret.sptk.many rp
  97. END(ia64_execve)
  98. /*
  99. * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
  100. * u64 tls)
  101. */
  102. GLOBAL_ENTRY(sys_clone2)
  103. /*
  104. * Allocate 8 input registers since ptrace() may clobber them
  105. */
  106. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
  107. alloc r16=ar.pfs,8,2,6,0
  108. DO_SAVE_SWITCH_STACK
  109. adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
  110. mov loc0=rp
  111. mov loc1=r16 // save ar.pfs across do_fork
  112. .body
  113. mov out1=in1
  114. mov out2=in2
  115. tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
  116. mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
  117. ;;
  118. (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
  119. mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
  120. mov out0=in0 // out0 = clone_flags
  121. br.call.sptk.many rp=do_fork
  122. .ret1: .restore sp
  123. adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
  124. mov ar.pfs=loc1
  125. mov rp=loc0
  126. br.ret.sptk.many rp
  127. END(sys_clone2)
  128. /*
  129. * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
  130. * Deprecated. Use sys_clone2() instead.
  131. */
  132. GLOBAL_ENTRY(sys_clone)
  133. /*
  134. * Allocate 8 input registers since ptrace() may clobber them
  135. */
  136. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
  137. alloc r16=ar.pfs,8,2,6,0
  138. DO_SAVE_SWITCH_STACK
  139. adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
  140. mov loc0=rp
  141. mov loc1=r16 // save ar.pfs across do_fork
  142. .body
  143. mov out1=in1
  144. mov out2=16 // stacksize (compensates for 16-byte scratch area)
  145. tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
  146. mov out3=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
  147. ;;
  148. (p6) st8 [r2]=in4 // store TLS in r13 (tp)
  149. mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
  150. mov out0=in0 // out0 = clone_flags
  151. br.call.sptk.many rp=do_fork
  152. .ret2: .restore sp
  153. adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
  154. mov ar.pfs=loc1
  155. mov rp=loc0
  156. br.ret.sptk.many rp
  157. END(sys_clone)
  158. /*
  159. * prev_task <- ia64_switch_to(struct task_struct *next)
  160. * With Ingo's new scheduler, interrupts are disabled when this routine gets
  161. * called. The code starting at .map relies on this. The rest of the code
  162. * doesn't care about the interrupt masking status.
  163. */
  164. GLOBAL_ENTRY(ia64_switch_to)
  165. .prologue
  166. alloc r16=ar.pfs,1,0,0,0
  167. DO_SAVE_SWITCH_STACK
  168. .body
  169. adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
  170. movl r25=init_task
  171. mov r27=IA64_KR(CURRENT_STACK)
  172. adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
  173. dep r20=0,in0,61,3 // physical address of "next"
  174. ;;
  175. st8 [r22]=sp // save kernel stack pointer of old task
  176. shr.u r26=r20,IA64_GRANULE_SHIFT
  177. cmp.eq p7,p6=r25,in0
  178. ;;
  179. /*
  180. * If we've already mapped this task's page, we can skip doing it again.
  181. */
  182. (p6) cmp.eq p7,p6=r26,r27
  183. (p6) br.cond.dpnt .map
  184. ;;
  185. .done:
  186. ld8 sp=[r21] // load kernel stack pointer of new task
  187. MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
  188. mov r8=r13 // return pointer to previously running task
  189. mov r13=in0 // set "current" pointer
  190. ;;
  191. DO_LOAD_SWITCH_STACK
  192. #ifdef CONFIG_SMP
  193. sync.i // ensure "fc"s done by this CPU are visible on other CPUs
  194. #endif
  195. br.ret.sptk.many rp // boogie on out in new context
  196. .map:
  197. RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
  198. movl r25=PAGE_KERNEL
  199. ;;
  200. srlz.d
  201. or r23=r25,r20 // construct PA | page properties
  202. mov r25=IA64_GRANULE_SHIFT<<2
  203. ;;
  204. MOV_TO_ITIR(p0, r25, r8)
  205. MOV_TO_IFA(in0, r8) // VA of next task...
  206. ;;
  207. mov r25=IA64_TR_CURRENT_STACK
  208. MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
  209. ;;
  210. itr.d dtr[r25]=r23 // wire in new mapping...
  211. SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
  212. br.cond.sptk .done
  213. END(ia64_switch_to)
  214. /*
  215. * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
  216. * means that we may get an interrupt with "sp" pointing to the new kernel stack while
  217. * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
  218. * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
  219. * problem. Also, we don't need to specify unwind information for preserved registers
  220. * that are not modified in save_switch_stack as the right unwind information is already
  221. * specified at the call-site of save_switch_stack.
  222. */
  223. /*
  224. * save_switch_stack:
  225. * - r16 holds ar.pfs
  226. * - b7 holds address to return to
  227. * - rp (b0) holds return address to save
  228. */
  229. GLOBAL_ENTRY(save_switch_stack)
  230. .prologue
  231. .altrp b7
  232. flushrs // flush dirty regs to backing store (must be first in insn group)
  233. .save @priunat,r17
  234. mov r17=ar.unat // preserve caller's
  235. .body
  236. #ifdef CONFIG_ITANIUM
  237. adds r2=16+128,sp
  238. adds r3=16+64,sp
  239. adds r14=SW(R4)+16,sp
  240. ;;
  241. st8.spill [r14]=r4,16 // spill r4
  242. lfetch.fault.excl.nt1 [r3],128
  243. ;;
  244. lfetch.fault.excl.nt1 [r2],128
  245. lfetch.fault.excl.nt1 [r3],128
  246. ;;
  247. lfetch.fault.excl [r2]
  248. lfetch.fault.excl [r3]
  249. adds r15=SW(R5)+16,sp
  250. #else
  251. add r2=16+3*128,sp
  252. add r3=16,sp
  253. add r14=SW(R4)+16,sp
  254. ;;
  255. st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
  256. lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
  257. ;;
  258. lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
  259. lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
  260. ;;
  261. lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
  262. lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
  263. adds r15=SW(R5)+16,sp
  264. #endif
  265. ;;
  266. st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
  267. mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
  268. add r2=SW(F2)+16,sp // r2 = &sw->f2
  269. ;;
  270. st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
  271. mov.m r18=ar.fpsr // preserve fpsr
  272. add r3=SW(F3)+16,sp // r3 = &sw->f3
  273. ;;
  274. stf.spill [r2]=f2,32
  275. mov.m r19=ar.rnat
  276. mov r21=b0
  277. stf.spill [r3]=f3,32
  278. st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
  279. mov r22=b1
  280. ;;
  281. // since we're done with the spills, read and save ar.unat:
  282. mov.m r29=ar.unat
  283. mov.m r20=ar.bspstore
  284. mov r23=b2
  285. stf.spill [r2]=f4,32
  286. stf.spill [r3]=f5,32
  287. mov r24=b3
  288. ;;
  289. st8 [r14]=r21,SW(B1)-SW(B0) // save b0
  290. st8 [r15]=r23,SW(B3)-SW(B2) // save b2
  291. mov r25=b4
  292. mov r26=b5
  293. ;;
  294. st8 [r14]=r22,SW(B4)-SW(B1) // save b1
  295. st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
  296. mov r21=ar.lc // I-unit
  297. stf.spill [r2]=f12,32
  298. stf.spill [r3]=f13,32
  299. ;;
  300. st8 [r14]=r25,SW(B5)-SW(B4) // save b4
  301. st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
  302. stf.spill [r2]=f14,32
  303. stf.spill [r3]=f15,32
  304. ;;
  305. st8 [r14]=r26 // save b5
  306. st8 [r15]=r21 // save ar.lc
  307. stf.spill [r2]=f16,32
  308. stf.spill [r3]=f17,32
  309. ;;
  310. stf.spill [r2]=f18,32
  311. stf.spill [r3]=f19,32
  312. ;;
  313. stf.spill [r2]=f20,32
  314. stf.spill [r3]=f21,32
  315. ;;
  316. stf.spill [r2]=f22,32
  317. stf.spill [r3]=f23,32
  318. ;;
  319. stf.spill [r2]=f24,32
  320. stf.spill [r3]=f25,32
  321. ;;
  322. stf.spill [r2]=f26,32
  323. stf.spill [r3]=f27,32
  324. ;;
  325. stf.spill [r2]=f28,32
  326. stf.spill [r3]=f29,32
  327. ;;
  328. stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
  329. stf.spill [r3]=f31,SW(PR)-SW(F31)
  330. add r14=SW(CALLER_UNAT)+16,sp
  331. ;;
  332. st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
  333. st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
  334. mov r21=pr
  335. ;;
  336. st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
  337. st8 [r3]=r21 // save predicate registers
  338. ;;
  339. st8 [r2]=r20 // save ar.bspstore
  340. st8 [r14]=r18 // save fpsr
  341. mov ar.rsc=3 // put RSE back into eager mode, pl 0
  342. br.cond.sptk.many b7
  343. END(save_switch_stack)
  344. /*
  345. * load_switch_stack:
  346. * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
  347. * - b7 holds address to return to
  348. * - must not touch r8-r11
  349. */
  350. GLOBAL_ENTRY(load_switch_stack)
  351. .prologue
  352. .altrp b7
  353. .body
  354. lfetch.fault.nt1 [sp]
  355. adds r2=SW(AR_BSPSTORE)+16,sp
  356. adds r3=SW(AR_UNAT)+16,sp
  357. mov ar.rsc=0 // put RSE into enforced lazy mode
  358. adds r14=SW(CALLER_UNAT)+16,sp
  359. adds r15=SW(AR_FPSR)+16,sp
  360. ;;
  361. ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
  362. ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
  363. ;;
  364. ld8 r21=[r2],16 // restore b0
  365. ld8 r22=[r3],16 // restore b1
  366. ;;
  367. ld8 r23=[r2],16 // restore b2
  368. ld8 r24=[r3],16 // restore b3
  369. ;;
  370. ld8 r25=[r2],16 // restore b4
  371. ld8 r26=[r3],16 // restore b5
  372. ;;
  373. ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
  374. ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
  375. ;;
  376. ld8 r28=[r2] // restore pr
  377. ld8 r30=[r3] // restore rnat
  378. ;;
  379. ld8 r18=[r14],16 // restore caller's unat
  380. ld8 r19=[r15],24 // restore fpsr
  381. ;;
  382. ldf.fill f2=[r14],32
  383. ldf.fill f3=[r15],32
  384. ;;
  385. ldf.fill f4=[r14],32
  386. ldf.fill f5=[r15],32
  387. ;;
  388. ldf.fill f12=[r14],32
  389. ldf.fill f13=[r15],32
  390. ;;
  391. ldf.fill f14=[r14],32
  392. ldf.fill f15=[r15],32
  393. ;;
  394. ldf.fill f16=[r14],32
  395. ldf.fill f17=[r15],32
  396. ;;
  397. ldf.fill f18=[r14],32
  398. ldf.fill f19=[r15],32
  399. mov b0=r21
  400. ;;
  401. ldf.fill f20=[r14],32
  402. ldf.fill f21=[r15],32
  403. mov b1=r22
  404. ;;
  405. ldf.fill f22=[r14],32
  406. ldf.fill f23=[r15],32
  407. mov b2=r23
  408. ;;
  409. mov ar.bspstore=r27
  410. mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
  411. mov b3=r24
  412. ;;
  413. ldf.fill f24=[r14],32
  414. ldf.fill f25=[r15],32
  415. mov b4=r25
  416. ;;
  417. ldf.fill f26=[r14],32
  418. ldf.fill f27=[r15],32
  419. mov b5=r26
  420. ;;
  421. ldf.fill f28=[r14],32
  422. ldf.fill f29=[r15],32
  423. mov ar.pfs=r16
  424. ;;
  425. ldf.fill f30=[r14],32
  426. ldf.fill f31=[r15],24
  427. mov ar.lc=r17
  428. ;;
  429. ld8.fill r4=[r14],16
  430. ld8.fill r5=[r15],16
  431. mov pr=r28,-1
  432. ;;
  433. ld8.fill r6=[r14],16
  434. ld8.fill r7=[r15],16
  435. mov ar.unat=r18 // restore caller's unat
  436. mov ar.rnat=r30 // must restore after bspstore but before rsc!
  437. mov ar.fpsr=r19 // restore fpsr
  438. mov ar.rsc=3 // put RSE back into eager mode, pl 0
  439. br.cond.sptk.many b7
  440. END(load_switch_stack)
  441. /*
  442. * Invoke a system call, but do some tracing before and after the call.
  443. * We MUST preserve the current register frame throughout this routine
  444. * because some system calls (such as ia64_execve) directly
  445. * manipulate ar.pfs.
  446. */
  447. GLOBAL_ENTRY(ia64_trace_syscall)
  448. PT_REGS_UNWIND_INFO(0)
  449. /*
  450. * We need to preserve the scratch registers f6-f11 in case the system
  451. * call is sigreturn.
  452. */
  453. adds r16=PT(F6)+16,sp
  454. adds r17=PT(F7)+16,sp
  455. ;;
  456. stf.spill [r16]=f6,32
  457. stf.spill [r17]=f7,32
  458. ;;
  459. stf.spill [r16]=f8,32
  460. stf.spill [r17]=f9,32
  461. ;;
  462. stf.spill [r16]=f10
  463. stf.spill [r17]=f11
  464. br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
  465. cmp.lt p6,p0=r8,r0 // check tracehook
  466. adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
  467. adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
  468. mov r10=0
  469. (p6) br.cond.sptk strace_error // syscall failed ->
  470. adds r16=PT(F6)+16,sp
  471. adds r17=PT(F7)+16,sp
  472. ;;
  473. ldf.fill f6=[r16],32
  474. ldf.fill f7=[r17],32
  475. ;;
  476. ldf.fill f8=[r16],32
  477. ldf.fill f9=[r17],32
  478. ;;
  479. ldf.fill f10=[r16]
  480. ldf.fill f11=[r17]
  481. // the syscall number may have changed, so re-load it and re-calculate the
  482. // syscall entry-point:
  483. adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
  484. ;;
  485. ld8 r15=[r15]
  486. mov r3=NR_syscalls - 1
  487. ;;
  488. adds r15=-1024,r15
  489. movl r16=sys_call_table
  490. ;;
  491. shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
  492. cmp.leu p6,p7=r15,r3
  493. ;;
  494. (p6) ld8 r20=[r20] // load address of syscall entry point
  495. (p7) movl r20=sys_ni_syscall
  496. ;;
  497. mov b6=r20
  498. br.call.sptk.many rp=b6 // do the syscall
  499. .strace_check_retval:
  500. cmp.lt p6,p0=r8,r0 // syscall failed?
  501. adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
  502. adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
  503. mov r10=0
  504. (p6) br.cond.sptk strace_error // syscall failed ->
  505. ;; // avoid RAW on r10
  506. .strace_save_retval:
  507. .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
  508. .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
  509. br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
  510. .ret3:
  511. (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
  512. (pUStk) rsm psr.i // disable interrupts
  513. br.cond.sptk ia64_work_pending_syscall_end
  514. strace_error:
  515. ld8 r3=[r2] // load pt_regs.r8
  516. sub r9=0,r8 // negate return value to get errno value
  517. ;;
  518. cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
  519. adds r3=16,r2 // r3=&pt_regs.r10
  520. ;;
  521. (p6) mov r10=-1
  522. (p6) mov r8=r9
  523. br.cond.sptk .strace_save_retval
  524. END(ia64_trace_syscall)
  525. /*
  526. * When traced and returning from sigreturn, we invoke syscall_trace but then
  527. * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
  528. */
  529. GLOBAL_ENTRY(ia64_strace_leave_kernel)
  530. PT_REGS_UNWIND_INFO(0)
  531. { /*
  532. * Some versions of gas generate bad unwind info if the first instruction of a
  533. * procedure doesn't go into the first slot of a bundle. This is a workaround.
  534. */
  535. nop.m 0
  536. nop.i 0
  537. br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
  538. }
  539. .ret4: br.cond.sptk ia64_leave_kernel
  540. END(ia64_strace_leave_kernel)
  541. ENTRY(call_payload)
  542. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
  543. /* call the kernel_thread payload; fn is in r4, arg - in r5 */
  544. alloc loc1=ar.pfs,0,3,1,0
  545. mov loc0=rp
  546. mov loc2=gp
  547. mov out0=r5 // arg
  548. ld8 r14 = [r4], 8 // fn.address
  549. ;;
  550. mov b6 = r14
  551. ld8 gp = [r4] // fn.gp
  552. ;;
  553. br.call.sptk.many rp=b6 // fn(arg)
  554. .ret12: mov gp=loc2
  555. mov rp=loc0
  556. mov ar.pfs=loc1
  557. /* ... and if it has returned, we are going to userland */
  558. cmp.ne pKStk,pUStk=r0,r0
  559. br.ret.sptk.many rp
  560. END(call_payload)
  561. GLOBAL_ENTRY(ia64_ret_from_clone)
  562. PT_REGS_UNWIND_INFO(0)
  563. { /*
  564. * Some versions of gas generate bad unwind info if the first instruction of a
  565. * procedure doesn't go into the first slot of a bundle. This is a workaround.
  566. */
  567. nop.m 0
  568. nop.i 0
  569. /*
  570. * We need to call schedule_tail() to complete the scheduling process.
  571. * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
  572. * address of the previously executing task.
  573. */
  574. br.call.sptk.many rp=ia64_invoke_schedule_tail
  575. }
  576. .ret8:
  577. (pKStk) br.call.sptk.many rp=call_payload
  578. adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
  579. ;;
  580. ld4 r2=[r2]
  581. ;;
  582. mov r8=0
  583. and r2=_TIF_SYSCALL_TRACEAUDIT,r2
  584. ;;
  585. cmp.ne p6,p0=r2,r0
  586. (p6) br.cond.spnt .strace_check_retval
  587. ;; // added stop bits to prevent r8 dependency
  588. END(ia64_ret_from_clone)
  589. // fall through
  590. GLOBAL_ENTRY(ia64_ret_from_syscall)
  591. PT_REGS_UNWIND_INFO(0)
  592. cmp.ge p6,p7=r8,r0 // syscall executed successfully?
  593. adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
  594. mov r10=r0 // clear error indication in r10
  595. (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
  596. END(ia64_ret_from_syscall)
  597. // fall through
  598. /*
  599. * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
  600. * need to switch to bank 0 and doesn't restore the scratch registers.
  601. * To avoid leaking kernel bits, the scratch registers are set to
  602. * the following known-to-be-safe values:
  603. *
  604. * r1: restored (global pointer)
  605. * r2: cleared
  606. * r3: 1 (when returning to user-level)
  607. * r8-r11: restored (syscall return value(s))
  608. * r12: restored (user-level stack pointer)
  609. * r13: restored (user-level thread pointer)
  610. * r14: set to __kernel_syscall_via_epc
  611. * r15: restored (syscall #)
  612. * r16-r17: cleared
  613. * r18: user-level b6
  614. * r19: cleared
  615. * r20: user-level ar.fpsr
  616. * r21: user-level b0
  617. * r22: cleared
  618. * r23: user-level ar.bspstore
  619. * r24: user-level ar.rnat
  620. * r25: user-level ar.unat
  621. * r26: user-level ar.pfs
  622. * r27: user-level ar.rsc
  623. * r28: user-level ip
  624. * r29: user-level psr
  625. * r30: user-level cfm
  626. * r31: user-level pr
  627. * f6-f11: cleared
  628. * pr: restored (user-level pr)
  629. * b0: restored (user-level rp)
  630. * b6: restored
  631. * b7: set to __kernel_syscall_via_epc
  632. * ar.unat: restored (user-level ar.unat)
  633. * ar.pfs: restored (user-level ar.pfs)
  634. * ar.rsc: restored (user-level ar.rsc)
  635. * ar.rnat: restored (user-level ar.rnat)
  636. * ar.bspstore: restored (user-level ar.bspstore)
  637. * ar.fpsr: restored (user-level ar.fpsr)
  638. * ar.ccv: cleared
  639. * ar.csd: cleared
  640. * ar.ssd: cleared
  641. */
  642. GLOBAL_ENTRY(ia64_leave_syscall)
  643. PT_REGS_UNWIND_INFO(0)
  644. /*
  645. * work.need_resched etc. mustn't get changed by this CPU before it returns to
  646. * user- or fsys-mode, hence we disable interrupts early on.
  647. *
  648. * p6 controls whether current_thread_info()->flags needs to be check for
  649. * extra work. We always check for extra work when returning to user-level.
  650. * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
  651. * is 0. After extra work processing has been completed, execution
  652. * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
  653. * needs to be redone.
  654. */
  655. #ifdef CONFIG_PREEMPT
  656. RSM_PSR_I(p0, r2, r18) // disable interrupts
  657. cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
  658. (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
  659. ;;
  660. .pred.rel.mutex pUStk,pKStk
  661. (pKStk) ld4 r21=[r20] // r21 <- preempt_count
  662. (pUStk) mov r21=0 // r21 <- 0
  663. ;;
  664. cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
  665. #else /* !CONFIG_PREEMPT */
  666. RSM_PSR_I(pUStk, r2, r18)
  667. cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
  668. (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
  669. #endif
  670. .global ia64_work_processed_syscall;
  671. ia64_work_processed_syscall:
  672. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  673. adds r2=PT(LOADRS)+16,r12
  674. MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
  675. adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
  676. ;;
  677. (p6) ld4 r31=[r18] // load current_thread_info()->flags
  678. ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
  679. adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
  680. ;;
  681. #else
  682. adds r2=PT(LOADRS)+16,r12
  683. adds r3=PT(AR_BSPSTORE)+16,r12
  684. adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
  685. ;;
  686. (p6) ld4 r31=[r18] // load current_thread_info()->flags
  687. ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
  688. nop.i 0
  689. ;;
  690. #endif
  691. mov r16=ar.bsp // M2 get existing backing store pointer
  692. ld8 r18=[r2],PT(R9)-PT(B6) // load b6
  693. (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
  694. ;;
  695. ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
  696. (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
  697. (p6) br.cond.spnt .work_pending_syscall
  698. ;;
  699. // start restoring the state saved on the kernel stack (struct pt_regs):
  700. ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
  701. ld8 r11=[r3],PT(CR_IIP)-PT(R11)
  702. (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
  703. ;;
  704. invala // M0|1 invalidate ALAT
  705. RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
  706. cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
  707. ld8 r29=[r2],16 // M0|1 load cr.ipsr
  708. ld8 r28=[r3],16 // M0|1 load cr.iip
  709. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  710. (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
  711. ;;
  712. ld8 r30=[r2],16 // M0|1 load cr.ifs
  713. ld8 r25=[r3],16 // M0|1 load ar.unat
  714. (pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
  715. ;;
  716. #else
  717. mov r22=r0 // A clear r22
  718. ;;
  719. ld8 r30=[r2],16 // M0|1 load cr.ifs
  720. ld8 r25=[r3],16 // M0|1 load ar.unat
  721. (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
  722. ;;
  723. #endif
  724. ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
  725. MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
  726. nop 0
  727. ;;
  728. ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
  729. ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
  730. mov f6=f0 // F clear f6
  731. ;;
  732. ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
  733. ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
  734. mov f7=f0 // F clear f7
  735. ;;
  736. ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
  737. ld8.fill r1=[r3],16 // M0|1 load r1
  738. (pUStk) mov r17=1 // A
  739. ;;
  740. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  741. (pUStk) st1 [r15]=r17 // M2|3
  742. #else
  743. (pUStk) st1 [r14]=r17 // M2|3
  744. #endif
  745. ld8.fill r13=[r3],16 // M0|1
  746. mov f8=f0 // F clear f8
  747. ;;
  748. ld8.fill r12=[r2] // M0|1 restore r12 (sp)
  749. ld8.fill r15=[r3] // M0|1 restore r15
  750. mov b6=r18 // I0 restore b6
  751. LOAD_PHYS_STACK_REG_SIZE(r17)
  752. mov f9=f0 // F clear f9
  753. (pKStk) br.cond.dpnt.many skip_rbs_switch // B
  754. srlz.d // M0 ensure interruption collection is off (for cover)
  755. shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
  756. COVER // B add current frame into dirty partition & set cr.ifs
  757. ;;
  758. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  759. mov r19=ar.bsp // M2 get new backing store pointer
  760. st8 [r14]=r22 // M save time at leave
  761. mov f10=f0 // F clear f10
  762. mov r22=r0 // A clear r22
  763. movl r14=__kernel_syscall_via_epc // X
  764. ;;
  765. #else
  766. mov r19=ar.bsp // M2 get new backing store pointer
  767. mov f10=f0 // F clear f10
  768. nop.m 0
  769. movl r14=__kernel_syscall_via_epc // X
  770. ;;
  771. #endif
  772. mov.m ar.csd=r0 // M2 clear ar.csd
  773. mov.m ar.ccv=r0 // M2 clear ar.ccv
  774. mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
  775. mov.m ar.ssd=r0 // M2 clear ar.ssd
  776. mov f11=f0 // F clear f11
  777. br.cond.sptk.many rbs_switch // B
  778. END(ia64_leave_syscall)
  779. GLOBAL_ENTRY(ia64_leave_kernel)
  780. PT_REGS_UNWIND_INFO(0)
  781. /*
  782. * work.need_resched etc. mustn't get changed by this CPU before it returns to
  783. * user- or fsys-mode, hence we disable interrupts early on.
  784. *
  785. * p6 controls whether current_thread_info()->flags needs to be check for
  786. * extra work. We always check for extra work when returning to user-level.
  787. * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
  788. * is 0. After extra work processing has been completed, execution
  789. * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
  790. * needs to be redone.
  791. */
  792. #ifdef CONFIG_PREEMPT
  793. RSM_PSR_I(p0, r17, r31) // disable interrupts
  794. cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
  795. (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
  796. ;;
  797. .pred.rel.mutex pUStk,pKStk
  798. (pKStk) ld4 r21=[r20] // r21 <- preempt_count
  799. (pUStk) mov r21=0 // r21 <- 0
  800. ;;
  801. cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
  802. #else
  803. RSM_PSR_I(pUStk, r17, r31)
  804. cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
  805. (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
  806. #endif
  807. .work_processed_kernel:
  808. adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
  809. ;;
  810. (p6) ld4 r31=[r17] // load current_thread_info()->flags
  811. adds r21=PT(PR)+16,r12
  812. ;;
  813. lfetch [r21],PT(CR_IPSR)-PT(PR)
  814. adds r2=PT(B6)+16,r12
  815. adds r3=PT(R16)+16,r12
  816. ;;
  817. lfetch [r21]
  818. ld8 r28=[r2],8 // load b6
  819. adds r29=PT(R24)+16,r12
  820. ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
  821. adds r30=PT(AR_CCV)+16,r12
  822. (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
  823. ;;
  824. ld8.fill r24=[r29]
  825. ld8 r15=[r30] // load ar.ccv
  826. (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
  827. ;;
  828. ld8 r29=[r2],16 // load b7
  829. ld8 r30=[r3],16 // load ar.csd
  830. (p6) br.cond.spnt .work_pending
  831. ;;
  832. ld8 r31=[r2],16 // load ar.ssd
  833. ld8.fill r8=[r3],16
  834. ;;
  835. ld8.fill r9=[r2],16
  836. ld8.fill r10=[r3],PT(R17)-PT(R10)
  837. ;;
  838. ld8.fill r11=[r2],PT(R18)-PT(R11)
  839. ld8.fill r17=[r3],16
  840. ;;
  841. ld8.fill r18=[r2],16
  842. ld8.fill r19=[r3],16
  843. ;;
  844. ld8.fill r20=[r2],16
  845. ld8.fill r21=[r3],16
  846. mov ar.csd=r30
  847. mov ar.ssd=r31
  848. ;;
  849. RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
  850. invala // invalidate ALAT
  851. ;;
  852. ld8.fill r22=[r2],24
  853. ld8.fill r23=[r3],24
  854. mov b6=r28
  855. ;;
  856. ld8.fill r25=[r2],16
  857. ld8.fill r26=[r3],16
  858. mov b7=r29
  859. ;;
  860. ld8.fill r27=[r2],16
  861. ld8.fill r28=[r3],16
  862. ;;
  863. ld8.fill r29=[r2],16
  864. ld8.fill r30=[r3],24
  865. ;;
  866. ld8.fill r31=[r2],PT(F9)-PT(R31)
  867. adds r3=PT(F10)-PT(F6),r3
  868. ;;
  869. ldf.fill f9=[r2],PT(F6)-PT(F9)
  870. ldf.fill f10=[r3],PT(F8)-PT(F10)
  871. ;;
  872. ldf.fill f6=[r2],PT(F7)-PT(F6)
  873. ;;
  874. ldf.fill f7=[r2],PT(F11)-PT(F7)
  875. ldf.fill f8=[r3],32
  876. ;;
  877. srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
  878. mov ar.ccv=r15
  879. ;;
  880. ldf.fill f11=[r2]
  881. BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
  882. ;;
  883. (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
  884. adds r16=PT(CR_IPSR)+16,r12
  885. adds r17=PT(CR_IIP)+16,r12
  886. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  887. .pred.rel.mutex pUStk,pKStk
  888. MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
  889. MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
  890. nop.i 0
  891. ;;
  892. #else
  893. MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
  894. nop.i 0
  895. nop.i 0
  896. ;;
  897. #endif
  898. ld8 r29=[r16],16 // load cr.ipsr
  899. ld8 r28=[r17],16 // load cr.iip
  900. ;;
  901. ld8 r30=[r16],16 // load cr.ifs
  902. ld8 r25=[r17],16 // load ar.unat
  903. ;;
  904. ld8 r26=[r16],16 // load ar.pfs
  905. ld8 r27=[r17],16 // load ar.rsc
  906. cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
  907. ;;
  908. ld8 r24=[r16],16 // load ar.rnat (may be garbage)
  909. ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
  910. ;;
  911. ld8 r31=[r16],16 // load predicates
  912. ld8 r21=[r17],16 // load b0
  913. ;;
  914. ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
  915. ld8.fill r1=[r17],16 // load r1
  916. ;;
  917. ld8.fill r12=[r16],16
  918. ld8.fill r13=[r17],16
  919. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  920. (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
  921. #else
  922. (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
  923. #endif
  924. ;;
  925. ld8 r20=[r16],16 // ar.fpsr
  926. ld8.fill r15=[r17],16
  927. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  928. (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
  929. #endif
  930. ;;
  931. ld8.fill r14=[r16],16
  932. ld8.fill r2=[r17]
  933. (pUStk) mov r17=1
  934. ;;
  935. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  936. // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
  937. // mib : mov add br -> mib : ld8 add br
  938. // bbb_ : br nop cover;; mbb_ : mov br cover;;
  939. //
  940. // no one require bsp in r16 if (pKStk) branch is selected.
  941. (pUStk) st8 [r3]=r22 // save time at leave
  942. (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
  943. shr.u r18=r19,16 // get byte size of existing "dirty" partition
  944. ;;
  945. ld8.fill r3=[r16] // deferred
  946. LOAD_PHYS_STACK_REG_SIZE(r17)
  947. (pKStk) br.cond.dpnt skip_rbs_switch
  948. mov r16=ar.bsp // get existing backing store pointer
  949. #else
  950. ld8.fill r3=[r16]
  951. (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
  952. shr.u r18=r19,16 // get byte size of existing "dirty" partition
  953. ;;
  954. mov r16=ar.bsp // get existing backing store pointer
  955. LOAD_PHYS_STACK_REG_SIZE(r17)
  956. (pKStk) br.cond.dpnt skip_rbs_switch
  957. #endif
  958. /*
  959. * Restore user backing store.
  960. *
  961. * NOTE: alloc, loadrs, and cover can't be predicated.
  962. */
  963. (pNonSys) br.cond.dpnt dont_preserve_current_frame
  964. COVER // add current frame into dirty partition and set cr.ifs
  965. ;;
  966. mov r19=ar.bsp // get new backing store pointer
  967. rbs_switch:
  968. sub r16=r16,r18 // krbs = old bsp - size of dirty partition
  969. cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
  970. ;;
  971. sub r19=r19,r16 // calculate total byte size of dirty partition
  972. add r18=64,r18 // don't force in0-in7 into memory...
  973. ;;
  974. shl r19=r19,16 // shift size of dirty partition into loadrs position
  975. ;;
  976. dont_preserve_current_frame:
  977. /*
  978. * To prevent leaking bits between the kernel and user-space,
  979. * we must clear the stacked registers in the "invalid" partition here.
  980. * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
  981. * 5 registers/cycle on McKinley).
  982. */
  983. # define pRecurse p6
  984. # define pReturn p7
  985. #ifdef CONFIG_ITANIUM
  986. # define Nregs 10
  987. #else
  988. # define Nregs 14
  989. #endif
  990. alloc loc0=ar.pfs,2,Nregs-2,2,0
  991. shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
  992. sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
  993. ;;
  994. mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
  995. shladd in0=loc1,3,r17
  996. mov in1=0
  997. ;;
  998. TEXT_ALIGN(32)
  999. rse_clear_invalid:
  1000. #ifdef CONFIG_ITANIUM
  1001. // cycle 0
  1002. { .mii
  1003. alloc loc0=ar.pfs,2,Nregs-2,2,0
  1004. cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
  1005. add out0=-Nregs*8,in0
  1006. }{ .mfb
  1007. add out1=1,in1 // increment recursion count
  1008. nop.f 0
  1009. nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
  1010. ;;
  1011. }{ .mfi // cycle 1
  1012. mov loc1=0
  1013. nop.f 0
  1014. mov loc2=0
  1015. }{ .mib
  1016. mov loc3=0
  1017. mov loc4=0
  1018. (pRecurse) br.call.sptk.many b0=rse_clear_invalid
  1019. }{ .mfi // cycle 2
  1020. mov loc5=0
  1021. nop.f 0
  1022. cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
  1023. }{ .mib
  1024. mov loc6=0
  1025. mov loc7=0
  1026. (pReturn) br.ret.sptk.many b0
  1027. }
  1028. #else /* !CONFIG_ITANIUM */
  1029. alloc loc0=ar.pfs,2,Nregs-2,2,0
  1030. cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
  1031. add out0=-Nregs*8,in0
  1032. add out1=1,in1 // increment recursion count
  1033. mov loc1=0
  1034. mov loc2=0
  1035. ;;
  1036. mov loc3=0
  1037. mov loc4=0
  1038. mov loc5=0
  1039. mov loc6=0
  1040. mov loc7=0
  1041. (pRecurse) br.call.dptk.few b0=rse_clear_invalid
  1042. ;;
  1043. mov loc8=0
  1044. mov loc9=0
  1045. cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
  1046. mov loc10=0
  1047. mov loc11=0
  1048. (pReturn) br.ret.dptk.many b0
  1049. #endif /* !CONFIG_ITANIUM */
  1050. # undef pRecurse
  1051. # undef pReturn
  1052. ;;
  1053. alloc r17=ar.pfs,0,0,0,0 // drop current register frame
  1054. ;;
  1055. loadrs
  1056. ;;
  1057. skip_rbs_switch:
  1058. mov ar.unat=r25 // M2
  1059. (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
  1060. (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
  1061. ;;
  1062. (pUStk) mov ar.bspstore=r23 // M2
  1063. (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
  1064. (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
  1065. ;;
  1066. MOV_TO_IPSR(p0, r29, r25) // M2
  1067. mov ar.pfs=r26 // I0
  1068. (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
  1069. MOV_TO_IFS(p9, r30, r25)// M2
  1070. mov b0=r21 // I0
  1071. (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
  1072. mov ar.fpsr=r20 // M2
  1073. MOV_TO_IIP(r28, r25) // M2
  1074. nop 0
  1075. ;;
  1076. (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
  1077. nop 0
  1078. (pLvSys)mov r2=r0
  1079. mov ar.rsc=r27 // M2
  1080. mov pr=r31,-1 // I0
  1081. RFI // B
  1082. /*
  1083. * On entry:
  1084. * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
  1085. * r31 = current->thread_info->flags
  1086. * On exit:
  1087. * p6 = TRUE if work-pending-check needs to be redone
  1088. *
  1089. * Interrupts are disabled on entry, reenabled depend on work, and
  1090. * disabled on exit.
  1091. */
  1092. .work_pending_syscall:
  1093. add r2=-8,r2
  1094. add r3=-8,r3
  1095. ;;
  1096. st8 [r2]=r8
  1097. st8 [r3]=r10
  1098. .work_pending:
  1099. tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
  1100. (p6) br.cond.sptk.few .notify
  1101. br.call.spnt.many rp=preempt_schedule_irq
  1102. .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
  1103. (pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
  1104. br.cond.sptk.many .work_processed_kernel
  1105. .notify:
  1106. (pUStk) br.call.spnt.many rp=notify_resume_user
  1107. .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
  1108. (pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
  1109. br.cond.sptk.many .work_processed_kernel
  1110. .global ia64_work_pending_syscall_end;
  1111. ia64_work_pending_syscall_end:
  1112. adds r2=PT(R8)+16,r12
  1113. adds r3=PT(R10)+16,r12
  1114. ;;
  1115. ld8 r8=[r2]
  1116. ld8 r10=[r3]
  1117. br.cond.sptk.many ia64_work_processed_syscall
  1118. END(ia64_leave_kernel)
  1119. ENTRY(handle_syscall_error)
  1120. /*
  1121. * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
  1122. * lead us to mistake a negative return value as a failed syscall. Those syscall
  1123. * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
  1124. * pt_regs.r8 is zero, we assume that the call completed successfully.
  1125. */
  1126. PT_REGS_UNWIND_INFO(0)
  1127. ld8 r3=[r2] // load pt_regs.r8
  1128. ;;
  1129. cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
  1130. ;;
  1131. (p7) mov r10=-1
  1132. (p7) sub r8=0,r8 // negate return value to get errno
  1133. br.cond.sptk ia64_leave_syscall
  1134. END(handle_syscall_error)
  1135. /*
  1136. * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
  1137. * in case a system call gets restarted.
  1138. */
  1139. GLOBAL_ENTRY(ia64_invoke_schedule_tail)
  1140. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
  1141. alloc loc1=ar.pfs,8,2,1,0
  1142. mov loc0=rp
  1143. mov out0=r8 // Address of previous task
  1144. ;;
  1145. br.call.sptk.many rp=schedule_tail
  1146. .ret11: mov ar.pfs=loc1
  1147. mov rp=loc0
  1148. br.ret.sptk.many rp
  1149. END(ia64_invoke_schedule_tail)
  1150. /*
  1151. * Setup stack and call do_notify_resume_user(), keeping interrupts
  1152. * disabled.
  1153. *
  1154. * Note that pSys and pNonSys need to be set up by the caller.
  1155. * We declare 8 input registers so the system call args get preserved,
  1156. * in case we need to restart a system call.
  1157. */
  1158. GLOBAL_ENTRY(notify_resume_user)
  1159. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
  1160. alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
  1161. mov r9=ar.unat
  1162. mov loc0=rp // save return address
  1163. mov out0=0 // there is no "oldset"
  1164. adds out1=8,sp // out1=&sigscratch->ar_pfs
  1165. (pSys) mov out2=1 // out2==1 => we're in a syscall
  1166. ;;
  1167. (pNonSys) mov out2=0 // out2==0 => not a syscall
  1168. .fframe 16
  1169. .spillsp ar.unat, 16
  1170. st8 [sp]=r9,-16 // allocate space for ar.unat and save it
  1171. st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
  1172. .body
  1173. br.call.sptk.many rp=do_notify_resume_user
  1174. .ret15: .restore sp
  1175. adds sp=16,sp // pop scratch stack space
  1176. ;;
  1177. ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
  1178. mov rp=loc0
  1179. ;;
  1180. mov ar.unat=r9
  1181. mov ar.pfs=loc1
  1182. br.ret.sptk.many rp
  1183. END(notify_resume_user)
  1184. ENTRY(sys_rt_sigreturn)
  1185. PT_REGS_UNWIND_INFO(0)
  1186. /*
  1187. * Allocate 8 input registers since ptrace() may clobber them
  1188. */
  1189. alloc r2=ar.pfs,8,0,1,0
  1190. .prologue
  1191. PT_REGS_SAVES(16)
  1192. adds sp=-16,sp
  1193. .body
  1194. cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
  1195. ;;
  1196. /*
  1197. * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
  1198. * syscall-entry path does not save them we save them here instead. Note: we
  1199. * don't need to save any other registers that are not saved by the stream-lined
  1200. * syscall path, because restore_sigcontext() restores them.
  1201. */
  1202. adds r16=PT(F6)+32,sp
  1203. adds r17=PT(F7)+32,sp
  1204. ;;
  1205. stf.spill [r16]=f6,32
  1206. stf.spill [r17]=f7,32
  1207. ;;
  1208. stf.spill [r16]=f8,32
  1209. stf.spill [r17]=f9,32
  1210. ;;
  1211. stf.spill [r16]=f10
  1212. stf.spill [r17]=f11
  1213. adds out0=16,sp // out0 = &sigscratch
  1214. br.call.sptk.many rp=ia64_rt_sigreturn
  1215. .ret19: .restore sp,0
  1216. adds sp=16,sp
  1217. ;;
  1218. ld8 r9=[sp] // load new ar.unat
  1219. mov.sptk b7=r8,ia64_leave_kernel
  1220. ;;
  1221. mov ar.unat=r9
  1222. br.many b7
  1223. END(sys_rt_sigreturn)
  1224. GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
  1225. .prologue
  1226. /*
  1227. * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
  1228. */
  1229. mov r16=r0
  1230. DO_SAVE_SWITCH_STACK
  1231. br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
  1232. .ret21: .body
  1233. DO_LOAD_SWITCH_STACK
  1234. br.cond.sptk.many rp // goes to ia64_leave_kernel
  1235. END(ia64_prepare_handle_unaligned)
  1236. //
  1237. // unw_init_running(void (*callback)(info, arg), void *arg)
  1238. //
  1239. # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
  1240. GLOBAL_ENTRY(unw_init_running)
  1241. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
  1242. alloc loc1=ar.pfs,2,3,3,0
  1243. ;;
  1244. ld8 loc2=[in0],8
  1245. mov loc0=rp
  1246. mov r16=loc1
  1247. DO_SAVE_SWITCH_STACK
  1248. .body
  1249. .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
  1250. .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
  1251. SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
  1252. adds sp=-EXTRA_FRAME_SIZE,sp
  1253. .body
  1254. ;;
  1255. adds out0=16,sp // &info
  1256. mov out1=r13 // current
  1257. adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
  1258. br.call.sptk.many rp=unw_init_frame_info
  1259. 1: adds out0=16,sp // &info
  1260. mov b6=loc2
  1261. mov loc2=gp // save gp across indirect function call
  1262. ;;
  1263. ld8 gp=[in0]
  1264. mov out1=in1 // arg
  1265. br.call.sptk.many rp=b6 // invoke the callback function
  1266. 1: mov gp=loc2 // restore gp
  1267. // For now, we don't allow changing registers from within
  1268. // unw_init_running; if we ever want to allow that, we'd
  1269. // have to do a load_switch_stack here:
  1270. .restore sp
  1271. adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
  1272. mov ar.pfs=loc1
  1273. mov rp=loc0
  1274. br.ret.sptk.many rp
  1275. END(unw_init_running)
  1276. EXPORT_SYMBOL(unw_init_running)
  1277. #ifdef CONFIG_FUNCTION_TRACER
  1278. #ifdef CONFIG_DYNAMIC_FTRACE
  1279. GLOBAL_ENTRY(_mcount)
  1280. br ftrace_stub
  1281. END(_mcount)
  1282. EXPORT_SYMBOL(_mcount)
  1283. .here:
  1284. br.ret.sptk.many b0
  1285. GLOBAL_ENTRY(ftrace_caller)
  1286. alloc out0 = ar.pfs, 8, 0, 4, 0
  1287. mov out3 = r0
  1288. ;;
  1289. mov out2 = b0
  1290. add r3 = 0x20, r3
  1291. mov out1 = r1;
  1292. br.call.sptk.many b0 = ftrace_patch_gp
  1293. //this might be called from module, so we must patch gp
  1294. ftrace_patch_gp:
  1295. movl gp=__gp
  1296. mov b0 = r3
  1297. ;;
  1298. .global ftrace_call;
  1299. ftrace_call:
  1300. {
  1301. .mlx
  1302. nop.m 0x0
  1303. movl r3 = .here;;
  1304. }
  1305. alloc loc0 = ar.pfs, 4, 4, 2, 0
  1306. ;;
  1307. mov loc1 = b0
  1308. mov out0 = b0
  1309. mov loc2 = r8
  1310. mov loc3 = r15
  1311. ;;
  1312. adds out0 = -MCOUNT_INSN_SIZE, out0
  1313. mov out1 = in2
  1314. mov b6 = r3
  1315. br.call.sptk.many b0 = b6
  1316. ;;
  1317. mov ar.pfs = loc0
  1318. mov b0 = loc1
  1319. mov r8 = loc2
  1320. mov r15 = loc3
  1321. br ftrace_stub
  1322. ;;
  1323. END(ftrace_caller)
  1324. #else
  1325. GLOBAL_ENTRY(_mcount)
  1326. movl r2 = ftrace_stub
  1327. movl r3 = ftrace_trace_function;;
  1328. ld8 r3 = [r3];;
  1329. ld8 r3 = [r3];;
  1330. cmp.eq p7,p0 = r2, r3
  1331. (p7) br.sptk.many ftrace_stub
  1332. ;;
  1333. alloc loc0 = ar.pfs, 4, 4, 2, 0
  1334. ;;
  1335. mov loc1 = b0
  1336. mov out0 = b0
  1337. mov loc2 = r8
  1338. mov loc3 = r15
  1339. ;;
  1340. adds out0 = -MCOUNT_INSN_SIZE, out0
  1341. mov out1 = in2
  1342. mov b6 = r3
  1343. br.call.sptk.many b0 = b6
  1344. ;;
  1345. mov ar.pfs = loc0
  1346. mov b0 = loc1
  1347. mov r8 = loc2
  1348. mov r15 = loc3
  1349. br ftrace_stub
  1350. ;;
  1351. END(_mcount)
  1352. #endif
  1353. GLOBAL_ENTRY(ftrace_stub)
  1354. mov r3 = b0
  1355. movl r2 = _mcount_ret_helper
  1356. ;;
  1357. mov b6 = r2
  1358. mov b7 = r3
  1359. br.ret.sptk.many b6
  1360. _mcount_ret_helper:
  1361. mov b0 = r42
  1362. mov r1 = r41
  1363. mov ar.pfs = r40
  1364. br b7
  1365. END(ftrace_stub)
  1366. #endif /* CONFIG_FUNCTION_TRACER */
  1367. .rodata
  1368. .align 8
  1369. .globl sys_call_table
  1370. sys_call_table:
  1371. data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
  1372. data8 sys_exit // 1025
  1373. data8 sys_read
  1374. data8 sys_write
  1375. data8 sys_open
  1376. data8 sys_close
  1377. data8 sys_creat // 1030
  1378. data8 sys_link
  1379. data8 sys_unlink
  1380. data8 ia64_execve
  1381. data8 sys_chdir
  1382. data8 sys_fchdir // 1035
  1383. data8 sys_utimes
  1384. data8 sys_mknod
  1385. data8 sys_chmod
  1386. data8 sys_chown
  1387. data8 sys_lseek // 1040
  1388. data8 sys_getpid
  1389. data8 sys_getppid
  1390. data8 sys_mount
  1391. data8 sys_umount
  1392. data8 sys_setuid // 1045
  1393. data8 sys_getuid
  1394. data8 sys_geteuid
  1395. data8 sys_ptrace
  1396. data8 sys_access
  1397. data8 sys_sync // 1050
  1398. data8 sys_fsync
  1399. data8 sys_fdatasync
  1400. data8 sys_kill
  1401. data8 sys_rename
  1402. data8 sys_mkdir // 1055
  1403. data8 sys_rmdir
  1404. data8 sys_dup
  1405. data8 sys_ia64_pipe
  1406. data8 sys_times
  1407. data8 ia64_brk // 1060
  1408. data8 sys_setgid
  1409. data8 sys_getgid
  1410. data8 sys_getegid
  1411. data8 sys_acct
  1412. data8 sys_ioctl // 1065
  1413. data8 sys_fcntl
  1414. data8 sys_umask
  1415. data8 sys_chroot
  1416. data8 sys_ustat
  1417. data8 sys_dup2 // 1070
  1418. data8 sys_setreuid
  1419. data8 sys_setregid
  1420. data8 sys_getresuid
  1421. data8 sys_setresuid
  1422. data8 sys_getresgid // 1075
  1423. data8 sys_setresgid
  1424. data8 sys_getgroups
  1425. data8 sys_setgroups
  1426. data8 sys_getpgid
  1427. data8 sys_setpgid // 1080
  1428. data8 sys_setsid
  1429. data8 sys_getsid
  1430. data8 sys_sethostname
  1431. data8 sys_setrlimit
  1432. data8 sys_getrlimit // 1085
  1433. data8 sys_getrusage
  1434. data8 sys_gettimeofday
  1435. data8 sys_settimeofday
  1436. data8 sys_select
  1437. data8 sys_poll // 1090
  1438. data8 sys_symlink
  1439. data8 sys_readlink
  1440. data8 sys_uselib
  1441. data8 sys_swapon
  1442. data8 sys_swapoff // 1095
  1443. data8 sys_reboot
  1444. data8 sys_truncate
  1445. data8 sys_ftruncate
  1446. data8 sys_fchmod
  1447. data8 sys_fchown // 1100
  1448. data8 ia64_getpriority
  1449. data8 sys_setpriority
  1450. data8 sys_statfs
  1451. data8 sys_fstatfs
  1452. data8 sys_gettid // 1105
  1453. data8 sys_semget
  1454. data8 sys_semop
  1455. data8 sys_semctl
  1456. data8 sys_msgget
  1457. data8 sys_msgsnd // 1110
  1458. data8 sys_msgrcv
  1459. data8 sys_msgctl
  1460. data8 sys_shmget
  1461. data8 sys_shmat
  1462. data8 sys_shmdt // 1115
  1463. data8 sys_shmctl
  1464. data8 sys_syslog
  1465. data8 sys_setitimer
  1466. data8 sys_getitimer
  1467. data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
  1468. data8 sys_ni_syscall /* was: ia64_oldlstat */
  1469. data8 sys_ni_syscall /* was: ia64_oldfstat */
  1470. data8 sys_vhangup
  1471. data8 sys_lchown
  1472. data8 sys_remap_file_pages // 1125
  1473. data8 sys_wait4
  1474. data8 sys_sysinfo
  1475. data8 sys_clone
  1476. data8 sys_setdomainname
  1477. data8 sys_newuname // 1130
  1478. data8 sys_adjtimex
  1479. data8 sys_ni_syscall /* was: ia64_create_module */
  1480. data8 sys_init_module
  1481. data8 sys_delete_module
  1482. data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
  1483. data8 sys_ni_syscall /* was: sys_query_module */
  1484. data8 sys_quotactl
  1485. data8 sys_bdflush
  1486. data8 sys_sysfs
  1487. data8 sys_personality // 1140
  1488. data8 sys_ni_syscall // sys_afs_syscall
  1489. data8 sys_setfsuid
  1490. data8 sys_setfsgid
  1491. data8 sys_getdents
  1492. data8 sys_flock // 1145
  1493. data8 sys_readv
  1494. data8 sys_writev
  1495. data8 sys_pread64
  1496. data8 sys_pwrite64
  1497. data8 sys_sysctl // 1150
  1498. data8 sys_mmap
  1499. data8 sys_munmap
  1500. data8 sys_mlock
  1501. data8 sys_mlockall
  1502. data8 sys_mprotect // 1155
  1503. data8 ia64_mremap
  1504. data8 sys_msync
  1505. data8 sys_munlock
  1506. data8 sys_munlockall
  1507. data8 sys_sched_getparam // 1160
  1508. data8 sys_sched_setparam
  1509. data8 sys_sched_getscheduler
  1510. data8 sys_sched_setscheduler
  1511. data8 sys_sched_yield
  1512. data8 sys_sched_get_priority_max // 1165
  1513. data8 sys_sched_get_priority_min
  1514. data8 sys_sched_rr_get_interval
  1515. data8 sys_nanosleep
  1516. data8 sys_ni_syscall // old nfsservctl
  1517. data8 sys_prctl // 1170
  1518. data8 sys_getpagesize
  1519. data8 sys_mmap2
  1520. data8 sys_pciconfig_read
  1521. data8 sys_pciconfig_write
  1522. data8 sys_perfmonctl // 1175
  1523. data8 sys_sigaltstack
  1524. data8 sys_rt_sigaction
  1525. data8 sys_rt_sigpending
  1526. data8 sys_rt_sigprocmask
  1527. data8 sys_rt_sigqueueinfo // 1180
  1528. data8 sys_rt_sigreturn
  1529. data8 sys_rt_sigsuspend
  1530. data8 sys_rt_sigtimedwait
  1531. data8 sys_getcwd
  1532. data8 sys_capget // 1185
  1533. data8 sys_capset
  1534. data8 sys_sendfile64
  1535. data8 sys_ni_syscall // sys_getpmsg (STREAMS)
  1536. data8 sys_ni_syscall // sys_putpmsg (STREAMS)
  1537. data8 sys_socket // 1190
  1538. data8 sys_bind
  1539. data8 sys_connect
  1540. data8 sys_listen
  1541. data8 sys_accept
  1542. data8 sys_getsockname // 1195
  1543. data8 sys_getpeername
  1544. data8 sys_socketpair
  1545. data8 sys_send
  1546. data8 sys_sendto
  1547. data8 sys_recv // 1200
  1548. data8 sys_recvfrom
  1549. data8 sys_shutdown
  1550. data8 sys_setsockopt
  1551. data8 sys_getsockopt
  1552. data8 sys_sendmsg // 1205
  1553. data8 sys_recvmsg
  1554. data8 sys_pivot_root
  1555. data8 sys_mincore
  1556. data8 sys_madvise
  1557. data8 sys_newstat // 1210
  1558. data8 sys_newlstat
  1559. data8 sys_newfstat
  1560. data8 sys_clone2
  1561. data8 sys_getdents64
  1562. data8 sys_getunwind // 1215
  1563. data8 sys_readahead
  1564. data8 sys_setxattr
  1565. data8 sys_lsetxattr
  1566. data8 sys_fsetxattr
  1567. data8 sys_getxattr // 1220
  1568. data8 sys_lgetxattr
  1569. data8 sys_fgetxattr
  1570. data8 sys_listxattr
  1571. data8 sys_llistxattr
  1572. data8 sys_flistxattr // 1225
  1573. data8 sys_removexattr
  1574. data8 sys_lremovexattr
  1575. data8 sys_fremovexattr
  1576. data8 sys_tkill
  1577. data8 sys_futex // 1230
  1578. data8 sys_sched_setaffinity
  1579. data8 sys_sched_getaffinity
  1580. data8 sys_set_tid_address
  1581. data8 sys_fadvise64_64
  1582. data8 sys_tgkill // 1235
  1583. data8 sys_exit_group
  1584. data8 sys_lookup_dcookie
  1585. data8 sys_io_setup
  1586. data8 sys_io_destroy
  1587. data8 sys_io_getevents // 1240
  1588. data8 sys_io_submit
  1589. data8 sys_io_cancel
  1590. data8 sys_epoll_create
  1591. data8 sys_epoll_ctl
  1592. data8 sys_epoll_wait // 1245
  1593. data8 sys_restart_syscall
  1594. data8 sys_semtimedop
  1595. data8 sys_timer_create
  1596. data8 sys_timer_settime
  1597. data8 sys_timer_gettime // 1250
  1598. data8 sys_timer_getoverrun
  1599. data8 sys_timer_delete
  1600. data8 sys_clock_settime
  1601. data8 sys_clock_gettime
  1602. data8 sys_clock_getres // 1255
  1603. data8 sys_clock_nanosleep
  1604. data8 sys_fstatfs64
  1605. data8 sys_statfs64
  1606. data8 sys_mbind
  1607. data8 sys_get_mempolicy // 1260
  1608. data8 sys_set_mempolicy
  1609. data8 sys_mq_open
  1610. data8 sys_mq_unlink
  1611. data8 sys_mq_timedsend
  1612. data8 sys_mq_timedreceive // 1265
  1613. data8 sys_mq_notify
  1614. data8 sys_mq_getsetattr
  1615. data8 sys_kexec_load
  1616. data8 sys_ni_syscall // reserved for vserver
  1617. data8 sys_waitid // 1270
  1618. data8 sys_add_key
  1619. data8 sys_request_key
  1620. data8 sys_keyctl
  1621. data8 sys_ioprio_set
  1622. data8 sys_ioprio_get // 1275
  1623. data8 sys_move_pages
  1624. data8 sys_inotify_init
  1625. data8 sys_inotify_add_watch
  1626. data8 sys_inotify_rm_watch
  1627. data8 sys_migrate_pages // 1280
  1628. data8 sys_openat
  1629. data8 sys_mkdirat
  1630. data8 sys_mknodat
  1631. data8 sys_fchownat
  1632. data8 sys_futimesat // 1285
  1633. data8 sys_newfstatat
  1634. data8 sys_unlinkat
  1635. data8 sys_renameat
  1636. data8 sys_linkat
  1637. data8 sys_symlinkat // 1290
  1638. data8 sys_readlinkat
  1639. data8 sys_fchmodat
  1640. data8 sys_faccessat
  1641. data8 sys_pselect6
  1642. data8 sys_ppoll // 1295
  1643. data8 sys_unshare
  1644. data8 sys_splice
  1645. data8 sys_set_robust_list
  1646. data8 sys_get_robust_list
  1647. data8 sys_sync_file_range // 1300
  1648. data8 sys_tee
  1649. data8 sys_vmsplice
  1650. data8 sys_fallocate
  1651. data8 sys_getcpu
  1652. data8 sys_epoll_pwait // 1305
  1653. data8 sys_utimensat
  1654. data8 sys_signalfd
  1655. data8 sys_ni_syscall
  1656. data8 sys_eventfd
  1657. data8 sys_timerfd_create // 1310
  1658. data8 sys_timerfd_settime
  1659. data8 sys_timerfd_gettime
  1660. data8 sys_signalfd4
  1661. data8 sys_eventfd2
  1662. data8 sys_epoll_create1 // 1315
  1663. data8 sys_dup3
  1664. data8 sys_pipe2
  1665. data8 sys_inotify_init1
  1666. data8 sys_preadv
  1667. data8 sys_pwritev // 1320
  1668. data8 sys_rt_tgsigqueueinfo
  1669. data8 sys_recvmmsg
  1670. data8 sys_fanotify_init
  1671. data8 sys_fanotify_mark
  1672. data8 sys_prlimit64 // 1325
  1673. data8 sys_name_to_handle_at
  1674. data8 sys_open_by_handle_at
  1675. data8 sys_clock_adjtime
  1676. data8 sys_syncfs
  1677. data8 sys_setns // 1330
  1678. data8 sys_sendmmsg
  1679. data8 sys_process_vm_readv
  1680. data8 sys_process_vm_writev
  1681. data8 sys_accept4
  1682. data8 sys_finit_module // 1335
  1683. data8 sys_sched_setattr
  1684. data8 sys_sched_getattr
  1685. data8 sys_renameat2
  1686. data8 sys_getrandom
  1687. data8 sys_memfd_create // 1340
  1688. data8 sys_bpf
  1689. data8 sys_execveat
  1690. data8 sys_userfaultfd
  1691. data8 sys_membarrier
  1692. data8 sys_kcmp // 1345
  1693. data8 sys_mlock2
  1694. data8 sys_copy_file_range
  1695. data8 sys_preadv2
  1696. data8 sys_pwritev2
  1697. .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls