process.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Architecture-specific setup.
  4. *
  5. * Copyright (C) 1998-2003 Hewlett-Packard Co
  6. * David Mosberger-Tang <davidm@hpl.hp.com>
  7. * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  8. *
  9. * 2005-10-07 Keith Owens <kaos@sgi.com>
  10. * Add notify_die() hooks.
  11. */
  12. #include <linux/cpu.h>
  13. #include <linux/pm.h>
  14. #include <linux/elf.h>
  15. #include <linux/errno.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mm.h>
  18. #include <linux/slab.h>
  19. #include <linux/module.h>
  20. #include <linux/notifier.h>
  21. #include <linux/personality.h>
  22. #include <linux/sched.h>
  23. #include <linux/sched/debug.h>
  24. #include <linux/sched/hotplug.h>
  25. #include <linux/sched/task.h>
  26. #include <linux/sched/task_stack.h>
  27. #include <linux/stddef.h>
  28. #include <linux/thread_info.h>
  29. #include <linux/unistd.h>
  30. #include <linux/efi.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/delay.h>
  33. #include <linux/kdebug.h>
  34. #include <linux/utsname.h>
  35. #include <linux/tracehook.h>
  36. #include <linux/rcupdate.h>
  37. #include <asm/cpu.h>
  38. #include <asm/delay.h>
  39. #include <asm/elf.h>
  40. #include <asm/irq.h>
  41. #include <asm/kexec.h>
  42. #include <asm/pgalloc.h>
  43. #include <asm/processor.h>
  44. #include <asm/sal.h>
  45. #include <asm/switch_to.h>
  46. #include <asm/tlbflush.h>
  47. #include <linux/uaccess.h>
  48. #include <asm/unwind.h>
  49. #include <asm/user.h>
  50. #include "entry.h"
  51. #ifdef CONFIG_PERFMON
  52. # include <asm/perfmon.h>
  53. #endif
  54. #include "sigframe.h"
  55. void (*ia64_mark_idle)(int);
  56. unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
  57. EXPORT_SYMBOL(boot_option_idle_override);
  58. void (*pm_power_off) (void);
  59. EXPORT_SYMBOL(pm_power_off);
  60. void
  61. ia64_do_show_stack (struct unw_frame_info *info, void *arg)
  62. {
  63. unsigned long ip, sp, bsp;
  64. printk("\nCall Trace:\n");
  65. do {
  66. unw_get_ip(info, &ip);
  67. if (ip == 0)
  68. break;
  69. unw_get_sp(info, &sp);
  70. unw_get_bsp(info, &bsp);
  71. printk(" [<%016lx>] %pS\n"
  72. " sp=%016lx bsp=%016lx\n",
  73. ip, (void *)ip, sp, bsp);
  74. } while (unw_unwind(info) >= 0);
  75. }
  76. void
  77. show_stack (struct task_struct *task, unsigned long *sp)
  78. {
  79. if (!task)
  80. unw_init_running(ia64_do_show_stack, NULL);
  81. else {
  82. struct unw_frame_info info;
  83. unw_init_from_blocked_task(&info, task);
  84. ia64_do_show_stack(&info, NULL);
  85. }
  86. }
  87. void
  88. show_regs (struct pt_regs *regs)
  89. {
  90. unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
  91. print_modules();
  92. printk("\n");
  93. show_regs_print_info(KERN_DEFAULT);
  94. printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
  95. regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
  96. init_utsname()->release);
  97. printk("ip is at %pS\n", (void *)ip);
  98. printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
  99. regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
  100. printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
  101. regs->ar_rnat, regs->ar_bspstore, regs->pr);
  102. printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
  103. regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
  104. printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
  105. printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
  106. printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
  107. regs->f6.u.bits[1], regs->f6.u.bits[0],
  108. regs->f7.u.bits[1], regs->f7.u.bits[0]);
  109. printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
  110. regs->f8.u.bits[1], regs->f8.u.bits[0],
  111. regs->f9.u.bits[1], regs->f9.u.bits[0]);
  112. printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
  113. regs->f10.u.bits[1], regs->f10.u.bits[0],
  114. regs->f11.u.bits[1], regs->f11.u.bits[0]);
  115. printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
  116. printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
  117. printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
  118. printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
  119. printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
  120. printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
  121. printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
  122. printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
  123. printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
  124. if (user_mode(regs)) {
  125. /* print the stacked registers */
  126. unsigned long val, *bsp, ndirty;
  127. int i, sof, is_nat = 0;
  128. sof = regs->cr_ifs & 0x7f; /* size of frame */
  129. ndirty = (regs->loadrs >> 19);
  130. bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
  131. for (i = 0; i < sof; ++i) {
  132. get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
  133. printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
  134. ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
  135. }
  136. } else
  137. show_stack(NULL, NULL);
  138. }
  139. /* local support for deprecated console_print */
  140. void
  141. console_print(const char *s)
  142. {
  143. printk(KERN_EMERG "%s", s);
  144. }
  145. void
  146. do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)
  147. {
  148. if (fsys_mode(current, &scr->pt)) {
  149. /*
  150. * defer signal-handling etc. until we return to
  151. * privilege-level 0.
  152. */
  153. if (!ia64_psr(&scr->pt)->lp)
  154. ia64_psr(&scr->pt)->lp = 1;
  155. return;
  156. }
  157. #ifdef CONFIG_PERFMON
  158. if (current->thread.pfm_needs_checking)
  159. /*
  160. * Note: pfm_handle_work() allow us to call it with interrupts
  161. * disabled, and may enable interrupts within the function.
  162. */
  163. pfm_handle_work();
  164. #endif
  165. /* deal with pending signal delivery */
  166. if (test_thread_flag(TIF_SIGPENDING)) {
  167. local_irq_enable(); /* force interrupt enable */
  168. ia64_do_signal(scr, in_syscall);
  169. }
  170. if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) {
  171. local_irq_enable(); /* force interrupt enable */
  172. tracehook_notify_resume(&scr->pt);
  173. }
  174. /* copy user rbs to kernel rbs */
  175. if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) {
  176. local_irq_enable(); /* force interrupt enable */
  177. ia64_sync_krbs();
  178. }
  179. local_irq_disable(); /* force interrupt disable */
  180. }
  181. static int __init nohalt_setup(char * str)
  182. {
  183. cpu_idle_poll_ctrl(true);
  184. return 1;
  185. }
  186. __setup("nohalt", nohalt_setup);
  187. #ifdef CONFIG_HOTPLUG_CPU
  188. /* We don't actually take CPU down, just spin without interrupts. */
  189. static inline void play_dead(void)
  190. {
  191. unsigned int this_cpu = smp_processor_id();
  192. /* Ack it */
  193. __this_cpu_write(cpu_state, CPU_DEAD);
  194. max_xtp();
  195. local_irq_disable();
  196. idle_task_exit();
  197. ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
  198. /*
  199. * The above is a point of no-return, the processor is
  200. * expected to be in SAL loop now.
  201. */
  202. BUG();
  203. }
  204. #else
  205. static inline void play_dead(void)
  206. {
  207. BUG();
  208. }
  209. #endif /* CONFIG_HOTPLUG_CPU */
  210. void arch_cpu_idle_dead(void)
  211. {
  212. play_dead();
  213. }
  214. void arch_cpu_idle(void)
  215. {
  216. void (*mark_idle)(int) = ia64_mark_idle;
  217. #ifdef CONFIG_SMP
  218. min_xtp();
  219. #endif
  220. rmb();
  221. if (mark_idle)
  222. (*mark_idle)(1);
  223. safe_halt();
  224. if (mark_idle)
  225. (*mark_idle)(0);
  226. #ifdef CONFIG_SMP
  227. normal_xtp();
  228. #endif
  229. }
  230. void
  231. ia64_save_extra (struct task_struct *task)
  232. {
  233. #ifdef CONFIG_PERFMON
  234. unsigned long info;
  235. #endif
  236. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  237. ia64_save_debug_regs(&task->thread.dbr[0]);
  238. #ifdef CONFIG_PERFMON
  239. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  240. pfm_save_regs(task);
  241. info = __this_cpu_read(pfm_syst_info);
  242. if (info & PFM_CPUINFO_SYST_WIDE)
  243. pfm_syst_wide_update_task(task, info, 0);
  244. #endif
  245. }
  246. void
  247. ia64_load_extra (struct task_struct *task)
  248. {
  249. #ifdef CONFIG_PERFMON
  250. unsigned long info;
  251. #endif
  252. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  253. ia64_load_debug_regs(&task->thread.dbr[0]);
  254. #ifdef CONFIG_PERFMON
  255. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  256. pfm_load_regs(task);
  257. info = __this_cpu_read(pfm_syst_info);
  258. if (info & PFM_CPUINFO_SYST_WIDE)
  259. pfm_syst_wide_update_task(task, info, 1);
  260. #endif
  261. }
  262. /*
  263. * Copy the state of an ia-64 thread.
  264. *
  265. * We get here through the following call chain:
  266. *
  267. * from user-level: from kernel:
  268. *
  269. * <clone syscall> <some kernel call frames>
  270. * sys_clone :
  271. * do_fork do_fork
  272. * copy_thread copy_thread
  273. *
  274. * This means that the stack layout is as follows:
  275. *
  276. * +---------------------+ (highest addr)
  277. * | struct pt_regs |
  278. * +---------------------+
  279. * | struct switch_stack |
  280. * +---------------------+
  281. * | |
  282. * | memory stack |
  283. * | | <-- sp (lowest addr)
  284. * +---------------------+
  285. *
  286. * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
  287. * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
  288. * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
  289. * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
  290. * the stack is page aligned and the page size is at least 4KB, this is always the case,
  291. * so there is nothing to worry about.
  292. */
  293. int
  294. copy_thread(unsigned long clone_flags,
  295. unsigned long user_stack_base, unsigned long user_stack_size,
  296. struct task_struct *p)
  297. {
  298. extern char ia64_ret_from_clone;
  299. struct switch_stack *child_stack, *stack;
  300. unsigned long rbs, child_rbs, rbs_size;
  301. struct pt_regs *child_ptregs;
  302. struct pt_regs *regs = current_pt_regs();
  303. int retval = 0;
  304. child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
  305. child_stack = (struct switch_stack *) child_ptregs - 1;
  306. rbs = (unsigned long) current + IA64_RBS_OFFSET;
  307. child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
  308. /* copy parts of thread_struct: */
  309. p->thread.ksp = (unsigned long) child_stack - 16;
  310. /*
  311. * NOTE: The calling convention considers all floating point
  312. * registers in the high partition (fph) to be scratch. Since
  313. * the only way to get to this point is through a system call,
  314. * we know that the values in fph are all dead. Hence, there
  315. * is no need to inherit the fph state from the parent to the
  316. * child and all we have to do is to make sure that
  317. * IA64_THREAD_FPH_VALID is cleared in the child.
  318. *
  319. * XXX We could push this optimization a bit further by
  320. * clearing IA64_THREAD_FPH_VALID on ANY system call.
  321. * However, it's not clear this is worth doing. Also, it
  322. * would be a slight deviation from the normal Linux system
  323. * call behavior where scratch registers are preserved across
  324. * system calls (unless used by the system call itself).
  325. */
  326. # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
  327. | IA64_THREAD_PM_VALID)
  328. # define THREAD_FLAGS_TO_SET 0
  329. p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
  330. | THREAD_FLAGS_TO_SET);
  331. ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
  332. if (unlikely(p->flags & PF_KTHREAD)) {
  333. if (unlikely(!user_stack_base)) {
  334. /* fork_idle() called us */
  335. return 0;
  336. }
  337. memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack));
  338. child_stack->r4 = user_stack_base; /* payload */
  339. child_stack->r5 = user_stack_size; /* argument */
  340. /*
  341. * Preserve PSR bits, except for bits 32-34 and 37-45,
  342. * which we can't read.
  343. */
  344. child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
  345. /* mark as valid, empty frame */
  346. child_ptregs->cr_ifs = 1UL << 63;
  347. child_stack->ar_fpsr = child_ptregs->ar_fpsr
  348. = ia64_getreg(_IA64_REG_AR_FPSR);
  349. child_stack->pr = (1 << PRED_KERNEL_STACK);
  350. child_stack->ar_bspstore = child_rbs;
  351. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  352. /* stop some PSR bits from being inherited.
  353. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  354. * therefore we must specify them explicitly here and not include them in
  355. * IA64_PSR_BITS_TO_CLEAR.
  356. */
  357. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  358. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  359. return 0;
  360. }
  361. stack = ((struct switch_stack *) regs) - 1;
  362. /* copy parent's switch_stack & pt_regs to child: */
  363. memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
  364. /* copy the parent's register backing store to the child: */
  365. rbs_size = stack->ar_bspstore - rbs;
  366. memcpy((void *) child_rbs, (void *) rbs, rbs_size);
  367. if (clone_flags & CLONE_SETTLS)
  368. child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
  369. if (user_stack_base) {
  370. child_ptregs->r12 = user_stack_base + user_stack_size - 16;
  371. child_ptregs->ar_bspstore = user_stack_base;
  372. child_ptregs->ar_rnat = 0;
  373. child_ptregs->loadrs = 0;
  374. }
  375. child_stack->ar_bspstore = child_rbs + rbs_size;
  376. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  377. /* stop some PSR bits from being inherited.
  378. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  379. * therefore we must specify them explicitly here and not include them in
  380. * IA64_PSR_BITS_TO_CLEAR.
  381. */
  382. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  383. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  384. #ifdef CONFIG_PERFMON
  385. if (current->thread.pfm_context)
  386. pfm_inherit(p, child_ptregs);
  387. #endif
  388. return retval;
  389. }
  390. static void
  391. do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
  392. {
  393. unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
  394. unsigned long uninitialized_var(ip); /* GCC be quiet */
  395. elf_greg_t *dst = arg;
  396. struct pt_regs *pt;
  397. char nat;
  398. int i;
  399. memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
  400. if (unw_unwind_to_user(info) < 0)
  401. return;
  402. unw_get_sp(info, &sp);
  403. pt = (struct pt_regs *) (sp + 16);
  404. urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
  405. if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
  406. return;
  407. ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
  408. &ar_rnat);
  409. /*
  410. * coredump format:
  411. * r0-r31
  412. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  413. * predicate registers (p0-p63)
  414. * b0-b7
  415. * ip cfm user-mask
  416. * ar.rsc ar.bsp ar.bspstore ar.rnat
  417. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  418. */
  419. /* r0 is zero */
  420. for (i = 1, mask = (1UL << i); i < 32; ++i) {
  421. unw_get_gr(info, i, &dst[i], &nat);
  422. if (nat)
  423. nat_bits |= mask;
  424. mask <<= 1;
  425. }
  426. dst[32] = nat_bits;
  427. unw_get_pr(info, &dst[33]);
  428. for (i = 0; i < 8; ++i)
  429. unw_get_br(info, i, &dst[34 + i]);
  430. unw_get_rp(info, &ip);
  431. dst[42] = ip + ia64_psr(pt)->ri;
  432. dst[43] = cfm;
  433. dst[44] = pt->cr_ipsr & IA64_PSR_UM;
  434. unw_get_ar(info, UNW_AR_RSC, &dst[45]);
  435. /*
  436. * For bsp and bspstore, unw_get_ar() would return the kernel
  437. * addresses, but we need the user-level addresses instead:
  438. */
  439. dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
  440. dst[47] = pt->ar_bspstore;
  441. dst[48] = ar_rnat;
  442. unw_get_ar(info, UNW_AR_CCV, &dst[49]);
  443. unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
  444. unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
  445. dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
  446. unw_get_ar(info, UNW_AR_LC, &dst[53]);
  447. unw_get_ar(info, UNW_AR_EC, &dst[54]);
  448. unw_get_ar(info, UNW_AR_CSD, &dst[55]);
  449. unw_get_ar(info, UNW_AR_SSD, &dst[56]);
  450. }
  451. void
  452. do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
  453. {
  454. elf_fpreg_t *dst = arg;
  455. int i;
  456. memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
  457. if (unw_unwind_to_user(info) < 0)
  458. return;
  459. /* f0 is 0.0, f1 is 1.0 */
  460. for (i = 2; i < 32; ++i)
  461. unw_get_fr(info, i, dst + i);
  462. ia64_flush_fph(task);
  463. if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
  464. memcpy(dst + 32, task->thread.fph, 96*16);
  465. }
  466. void
  467. do_copy_regs (struct unw_frame_info *info, void *arg)
  468. {
  469. do_copy_task_regs(current, info, arg);
  470. }
  471. void
  472. do_dump_fpu (struct unw_frame_info *info, void *arg)
  473. {
  474. do_dump_task_fpu(current, info, arg);
  475. }
  476. void
  477. ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
  478. {
  479. unw_init_running(do_copy_regs, dst);
  480. }
  481. int
  482. dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
  483. {
  484. unw_init_running(do_dump_fpu, dst);
  485. return 1; /* f0-f31 are always valid so we always return 1 */
  486. }
  487. /*
  488. * Flush thread state. This is called when a thread does an execve().
  489. */
  490. void
  491. flush_thread (void)
  492. {
  493. /* drop floating-point and debug-register state if it exists: */
  494. current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
  495. ia64_drop_fpu(current);
  496. }
  497. /*
  498. * Clean up state associated with a thread. This is called when
  499. * the thread calls exit().
  500. */
  501. void
  502. exit_thread (struct task_struct *tsk)
  503. {
  504. ia64_drop_fpu(tsk);
  505. #ifdef CONFIG_PERFMON
  506. /* if needed, stop monitoring and flush state to perfmon context */
  507. if (tsk->thread.pfm_context)
  508. pfm_exit_thread(tsk);
  509. /* free debug register resources */
  510. if (tsk->thread.flags & IA64_THREAD_DBG_VALID)
  511. pfm_release_debug_registers(tsk);
  512. #endif
  513. }
  514. unsigned long
  515. get_wchan (struct task_struct *p)
  516. {
  517. struct unw_frame_info info;
  518. unsigned long ip;
  519. int count = 0;
  520. if (!p || p == current || p->state == TASK_RUNNING)
  521. return 0;
  522. /*
  523. * Note: p may not be a blocked task (it could be current or
  524. * another process running on some other CPU. Rather than
  525. * trying to determine if p is really blocked, we just assume
  526. * it's blocked and rely on the unwind routines to fail
  527. * gracefully if the process wasn't really blocked after all.
  528. * --davidm 99/12/15
  529. */
  530. unw_init_from_blocked_task(&info, p);
  531. do {
  532. if (p->state == TASK_RUNNING)
  533. return 0;
  534. if (unw_unwind(&info) < 0)
  535. return 0;
  536. unw_get_ip(&info, &ip);
  537. if (!in_sched_functions(ip))
  538. return ip;
  539. } while (count++ < 16);
  540. return 0;
  541. }
  542. void
  543. cpu_halt (void)
  544. {
  545. pal_power_mgmt_info_u_t power_info[8];
  546. unsigned long min_power;
  547. int i, min_power_state;
  548. if (ia64_pal_halt_info(power_info) != 0)
  549. return;
  550. min_power_state = 0;
  551. min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
  552. for (i = 1; i < 8; ++i)
  553. if (power_info[i].pal_power_mgmt_info_s.im
  554. && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
  555. min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
  556. min_power_state = i;
  557. }
  558. while (1)
  559. ia64_pal_halt(min_power_state);
  560. }
  561. void machine_shutdown(void)
  562. {
  563. #ifdef CONFIG_HOTPLUG_CPU
  564. int cpu;
  565. for_each_online_cpu(cpu) {
  566. if (cpu != smp_processor_id())
  567. cpu_down(cpu);
  568. }
  569. #endif
  570. #ifdef CONFIG_KEXEC
  571. kexec_disable_iosapic();
  572. #endif
  573. }
  574. void
  575. machine_restart (char *restart_cmd)
  576. {
  577. (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
  578. efi_reboot(REBOOT_WARM, NULL);
  579. }
  580. void
  581. machine_halt (void)
  582. {
  583. (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
  584. cpu_halt();
  585. }
  586. void
  587. machine_power_off (void)
  588. {
  589. if (pm_power_off)
  590. pm_power_off();
  591. machine_halt();
  592. }