ptrace.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Kernel support for the ptrace() and syscall tracing interfaces.
  4. *
  5. * Copyright (C) 1999-2005 Hewlett-Packard Co
  6. * David Mosberger-Tang <davidm@hpl.hp.com>
  7. * Copyright (C) 2006 Intel Co
  8. * 2006-08-12 - IA64 Native Utrace implementation support added by
  9. * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  10. *
  11. * Derived from the x86 and Alpha versions.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/sched/task.h>
  16. #include <linux/sched/task_stack.h>
  17. #include <linux/mm.h>
  18. #include <linux/errno.h>
  19. #include <linux/ptrace.h>
  20. #include <linux/user.h>
  21. #include <linux/security.h>
  22. #include <linux/audit.h>
  23. #include <linux/signal.h>
  24. #include <linux/regset.h>
  25. #include <linux/elf.h>
  26. #include <linux/tracehook.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/processor.h>
  29. #include <asm/ptrace_offsets.h>
  30. #include <asm/rse.h>
  31. #include <linux/uaccess.h>
  32. #include <asm/unwind.h>
  33. #ifdef CONFIG_PERFMON
  34. #include <asm/perfmon.h>
  35. #endif
  36. #include "entry.h"
  37. /*
  38. * Bits in the PSR that we allow ptrace() to change:
  39. * be, up, ac, mfl, mfh (the user mask; five bits total)
  40. * db (debug breakpoint fault; one bit)
  41. * id (instruction debug fault disable; one bit)
  42. * dd (data debug fault disable; one bit)
  43. * ri (restart instruction; two bits)
  44. * is (instruction set; one bit)
  45. */
  46. #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
  47. | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
  48. #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
  49. #define PFM_MASK MASK(38)
  50. #define PTRACE_DEBUG 0
  51. #if PTRACE_DEBUG
  52. # define dprintk(format...) printk(format)
  53. # define inline
  54. #else
  55. # define dprintk(format...)
  56. #endif
  57. /* Return TRUE if PT was created due to kernel-entry via a system-call. */
  58. static inline int
  59. in_syscall (struct pt_regs *pt)
  60. {
  61. return (long) pt->cr_ifs >= 0;
  62. }
  63. /*
  64. * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
  65. * bitset where bit i is set iff the NaT bit of register i is set.
  66. */
  67. unsigned long
  68. ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
  69. {
  70. # define GET_BITS(first, last, unat) \
  71. ({ \
  72. unsigned long bit = ia64_unat_pos(&pt->r##first); \
  73. unsigned long nbits = (last - first + 1); \
  74. unsigned long mask = MASK(nbits) << first; \
  75. unsigned long dist; \
  76. if (bit < first) \
  77. dist = 64 + bit - first; \
  78. else \
  79. dist = bit - first; \
  80. ia64_rotr(unat, dist) & mask; \
  81. })
  82. unsigned long val;
  83. /*
  84. * Registers that are stored consecutively in struct pt_regs
  85. * can be handled in parallel. If the register order in
  86. * struct_pt_regs changes, this code MUST be updated.
  87. */
  88. val = GET_BITS( 1, 1, scratch_unat);
  89. val |= GET_BITS( 2, 3, scratch_unat);
  90. val |= GET_BITS(12, 13, scratch_unat);
  91. val |= GET_BITS(14, 14, scratch_unat);
  92. val |= GET_BITS(15, 15, scratch_unat);
  93. val |= GET_BITS( 8, 11, scratch_unat);
  94. val |= GET_BITS(16, 31, scratch_unat);
  95. return val;
  96. # undef GET_BITS
  97. }
  98. /*
  99. * Set the NaT bits for the scratch registers according to NAT and
  100. * return the resulting unat (assuming the scratch registers are
  101. * stored in PT).
  102. */
  103. unsigned long
  104. ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
  105. {
  106. # define PUT_BITS(first, last, nat) \
  107. ({ \
  108. unsigned long bit = ia64_unat_pos(&pt->r##first); \
  109. unsigned long nbits = (last - first + 1); \
  110. unsigned long mask = MASK(nbits) << first; \
  111. long dist; \
  112. if (bit < first) \
  113. dist = 64 + bit - first; \
  114. else \
  115. dist = bit - first; \
  116. ia64_rotl(nat & mask, dist); \
  117. })
  118. unsigned long scratch_unat;
  119. /*
  120. * Registers that are stored consecutively in struct pt_regs
  121. * can be handled in parallel. If the register order in
  122. * struct_pt_regs changes, this code MUST be updated.
  123. */
  124. scratch_unat = PUT_BITS( 1, 1, nat);
  125. scratch_unat |= PUT_BITS( 2, 3, nat);
  126. scratch_unat |= PUT_BITS(12, 13, nat);
  127. scratch_unat |= PUT_BITS(14, 14, nat);
  128. scratch_unat |= PUT_BITS(15, 15, nat);
  129. scratch_unat |= PUT_BITS( 8, 11, nat);
  130. scratch_unat |= PUT_BITS(16, 31, nat);
  131. return scratch_unat;
  132. # undef PUT_BITS
  133. }
  134. #define IA64_MLX_TEMPLATE 0x2
  135. #define IA64_MOVL_OPCODE 6
  136. void
  137. ia64_increment_ip (struct pt_regs *regs)
  138. {
  139. unsigned long w0, ri = ia64_psr(regs)->ri + 1;
  140. if (ri > 2) {
  141. ri = 0;
  142. regs->cr_iip += 16;
  143. } else if (ri == 2) {
  144. get_user(w0, (char __user *) regs->cr_iip + 0);
  145. if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
  146. /*
  147. * rfi'ing to slot 2 of an MLX bundle causes
  148. * an illegal operation fault. We don't want
  149. * that to happen...
  150. */
  151. ri = 0;
  152. regs->cr_iip += 16;
  153. }
  154. }
  155. ia64_psr(regs)->ri = ri;
  156. }
  157. void
  158. ia64_decrement_ip (struct pt_regs *regs)
  159. {
  160. unsigned long w0, ri = ia64_psr(regs)->ri - 1;
  161. if (ia64_psr(regs)->ri == 0) {
  162. regs->cr_iip -= 16;
  163. ri = 2;
  164. get_user(w0, (char __user *) regs->cr_iip + 0);
  165. if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
  166. /*
  167. * rfi'ing to slot 2 of an MLX bundle causes
  168. * an illegal operation fault. We don't want
  169. * that to happen...
  170. */
  171. ri = 1;
  172. }
  173. }
  174. ia64_psr(regs)->ri = ri;
  175. }
  176. /*
  177. * This routine is used to read an rnat bits that are stored on the
  178. * kernel backing store. Since, in general, the alignment of the user
  179. * and kernel are different, this is not completely trivial. In
  180. * essence, we need to construct the user RNAT based on up to two
  181. * kernel RNAT values and/or the RNAT value saved in the child's
  182. * pt_regs.
  183. *
  184. * user rbs
  185. *
  186. * +--------+ <-- lowest address
  187. * | slot62 |
  188. * +--------+
  189. * | rnat | 0x....1f8
  190. * +--------+
  191. * | slot00 | \
  192. * +--------+ |
  193. * | slot01 | > child_regs->ar_rnat
  194. * +--------+ |
  195. * | slot02 | / kernel rbs
  196. * +--------+ +--------+
  197. * <- child_regs->ar_bspstore | slot61 | <-- krbs
  198. * +- - - - + +--------+
  199. * | slot62 |
  200. * +- - - - + +--------+
  201. * | rnat |
  202. * +- - - - + +--------+
  203. * vrnat | slot00 |
  204. * +- - - - + +--------+
  205. * = =
  206. * +--------+
  207. * | slot00 | \
  208. * +--------+ |
  209. * | slot01 | > child_stack->ar_rnat
  210. * +--------+ |
  211. * | slot02 | /
  212. * +--------+
  213. * <--- child_stack->ar_bspstore
  214. *
  215. * The way to think of this code is as follows: bit 0 in the user rnat
  216. * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
  217. * value. The kernel rnat value holding this bit is stored in
  218. * variable rnat0. rnat1 is loaded with the kernel rnat value that
  219. * form the upper bits of the user rnat value.
  220. *
  221. * Boundary cases:
  222. *
  223. * o when reading the rnat "below" the first rnat slot on the kernel
  224. * backing store, rnat0/rnat1 are set to 0 and the low order bits are
  225. * merged in from pt->ar_rnat.
  226. *
  227. * o when reading the rnat "above" the last rnat slot on the kernel
  228. * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
  229. */
  230. static unsigned long
  231. get_rnat (struct task_struct *task, struct switch_stack *sw,
  232. unsigned long *krbs, unsigned long *urnat_addr,
  233. unsigned long *urbs_end)
  234. {
  235. unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
  236. unsigned long umask = 0, mask, m;
  237. unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
  238. long num_regs, nbits;
  239. struct pt_regs *pt;
  240. pt = task_pt_regs(task);
  241. kbsp = (unsigned long *) sw->ar_bspstore;
  242. ubspstore = (unsigned long *) pt->ar_bspstore;
  243. if (urbs_end < urnat_addr)
  244. nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
  245. else
  246. nbits = 63;
  247. mask = MASK(nbits);
  248. /*
  249. * First, figure out which bit number slot 0 in user-land maps
  250. * to in the kernel rnat. Do this by figuring out how many
  251. * register slots we're beyond the user's backingstore and
  252. * then computing the equivalent address in kernel space.
  253. */
  254. num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
  255. slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
  256. shift = ia64_rse_slot_num(slot0_kaddr);
  257. rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
  258. rnat0_kaddr = rnat1_kaddr - 64;
  259. if (ubspstore + 63 > urnat_addr) {
  260. /* some bits need to be merged in from pt->ar_rnat */
  261. umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
  262. urnat = (pt->ar_rnat & umask);
  263. mask &= ~umask;
  264. if (!mask)
  265. return urnat;
  266. }
  267. m = mask << shift;
  268. if (rnat0_kaddr >= kbsp)
  269. rnat0 = sw->ar_rnat;
  270. else if (rnat0_kaddr > krbs)
  271. rnat0 = *rnat0_kaddr;
  272. urnat |= (rnat0 & m) >> shift;
  273. m = mask >> (63 - shift);
  274. if (rnat1_kaddr >= kbsp)
  275. rnat1 = sw->ar_rnat;
  276. else if (rnat1_kaddr > krbs)
  277. rnat1 = *rnat1_kaddr;
  278. urnat |= (rnat1 & m) << (63 - shift);
  279. return urnat;
  280. }
  281. /*
  282. * The reverse of get_rnat.
  283. */
  284. static void
  285. put_rnat (struct task_struct *task, struct switch_stack *sw,
  286. unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
  287. unsigned long *urbs_end)
  288. {
  289. unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
  290. unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
  291. long num_regs, nbits;
  292. struct pt_regs *pt;
  293. unsigned long cfm, *urbs_kargs;
  294. pt = task_pt_regs(task);
  295. kbsp = (unsigned long *) sw->ar_bspstore;
  296. ubspstore = (unsigned long *) pt->ar_bspstore;
  297. urbs_kargs = urbs_end;
  298. if (in_syscall(pt)) {
  299. /*
  300. * If entered via syscall, don't allow user to set rnat bits
  301. * for syscall args.
  302. */
  303. cfm = pt->cr_ifs;
  304. urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
  305. }
  306. if (urbs_kargs >= urnat_addr)
  307. nbits = 63;
  308. else {
  309. if ((urnat_addr - 63) >= urbs_kargs)
  310. return;
  311. nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
  312. }
  313. mask = MASK(nbits);
  314. /*
  315. * First, figure out which bit number slot 0 in user-land maps
  316. * to in the kernel rnat. Do this by figuring out how many
  317. * register slots we're beyond the user's backingstore and
  318. * then computing the equivalent address in kernel space.
  319. */
  320. num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
  321. slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
  322. shift = ia64_rse_slot_num(slot0_kaddr);
  323. rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
  324. rnat0_kaddr = rnat1_kaddr - 64;
  325. if (ubspstore + 63 > urnat_addr) {
  326. /* some bits need to be place in pt->ar_rnat: */
  327. umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
  328. pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
  329. mask &= ~umask;
  330. if (!mask)
  331. return;
  332. }
  333. /*
  334. * Note: Section 11.1 of the EAS guarantees that bit 63 of an
  335. * rnat slot is ignored. so we don't have to clear it here.
  336. */
  337. rnat0 = (urnat << shift);
  338. m = mask << shift;
  339. if (rnat0_kaddr >= kbsp)
  340. sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
  341. else if (rnat0_kaddr > krbs)
  342. *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
  343. rnat1 = (urnat >> (63 - shift));
  344. m = mask >> (63 - shift);
  345. if (rnat1_kaddr >= kbsp)
  346. sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
  347. else if (rnat1_kaddr > krbs)
  348. *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
  349. }
  350. static inline int
  351. on_kernel_rbs (unsigned long addr, unsigned long bspstore,
  352. unsigned long urbs_end)
  353. {
  354. unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
  355. urbs_end);
  356. return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
  357. }
  358. /*
  359. * Read a word from the user-level backing store of task CHILD. ADDR
  360. * is the user-level address to read the word from, VAL a pointer to
  361. * the return value, and USER_BSP gives the end of the user-level
  362. * backing store (i.e., it's the address that would be in ar.bsp after
  363. * the user executed a "cover" instruction).
  364. *
  365. * This routine takes care of accessing the kernel register backing
  366. * store for those registers that got spilled there. It also takes
  367. * care of calculating the appropriate RNaT collection words.
  368. */
  369. long
  370. ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
  371. unsigned long user_rbs_end, unsigned long addr, long *val)
  372. {
  373. unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
  374. struct pt_regs *child_regs;
  375. size_t copied;
  376. long ret;
  377. urbs_end = (long *) user_rbs_end;
  378. laddr = (unsigned long *) addr;
  379. child_regs = task_pt_regs(child);
  380. bspstore = (unsigned long *) child_regs->ar_bspstore;
  381. krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
  382. if (on_kernel_rbs(addr, (unsigned long) bspstore,
  383. (unsigned long) urbs_end))
  384. {
  385. /*
  386. * Attempt to read the RBS in an area that's actually
  387. * on the kernel RBS => read the corresponding bits in
  388. * the kernel RBS.
  389. */
  390. rnat_addr = ia64_rse_rnat_addr(laddr);
  391. ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
  392. if (laddr == rnat_addr) {
  393. /* return NaT collection word itself */
  394. *val = ret;
  395. return 0;
  396. }
  397. if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
  398. /*
  399. * It is implementation dependent whether the
  400. * data portion of a NaT value gets saved on a
  401. * st8.spill or RSE spill (e.g., see EAS 2.6,
  402. * 4.4.4.6 Register Spill and Fill). To get
  403. * consistent behavior across all possible
  404. * IA-64 implementations, we return zero in
  405. * this case.
  406. */
  407. *val = 0;
  408. return 0;
  409. }
  410. if (laddr < urbs_end) {
  411. /*
  412. * The desired word is on the kernel RBS and
  413. * is not a NaT.
  414. */
  415. regnum = ia64_rse_num_regs(bspstore, laddr);
  416. *val = *ia64_rse_skip_regs(krbs, regnum);
  417. return 0;
  418. }
  419. }
  420. copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE);
  421. if (copied != sizeof(ret))
  422. return -EIO;
  423. *val = ret;
  424. return 0;
  425. }
  426. long
  427. ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
  428. unsigned long user_rbs_end, unsigned long addr, long val)
  429. {
  430. unsigned long *bspstore, *krbs, regnum, *laddr;
  431. unsigned long *urbs_end = (long *) user_rbs_end;
  432. struct pt_regs *child_regs;
  433. laddr = (unsigned long *) addr;
  434. child_regs = task_pt_regs(child);
  435. bspstore = (unsigned long *) child_regs->ar_bspstore;
  436. krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
  437. if (on_kernel_rbs(addr, (unsigned long) bspstore,
  438. (unsigned long) urbs_end))
  439. {
  440. /*
  441. * Attempt to write the RBS in an area that's actually
  442. * on the kernel RBS => write the corresponding bits
  443. * in the kernel RBS.
  444. */
  445. if (ia64_rse_is_rnat_slot(laddr))
  446. put_rnat(child, child_stack, krbs, laddr, val,
  447. urbs_end);
  448. else {
  449. if (laddr < urbs_end) {
  450. regnum = ia64_rse_num_regs(bspstore, laddr);
  451. *ia64_rse_skip_regs(krbs, regnum) = val;
  452. }
  453. }
  454. } else if (access_process_vm(child, addr, &val, sizeof(val),
  455. FOLL_FORCE | FOLL_WRITE)
  456. != sizeof(val))
  457. return -EIO;
  458. return 0;
  459. }
  460. /*
  461. * Calculate the address of the end of the user-level register backing
  462. * store. This is the address that would have been stored in ar.bsp
  463. * if the user had executed a "cover" instruction right before
  464. * entering the kernel. If CFMP is not NULL, it is used to return the
  465. * "current frame mask" that was active at the time the kernel was
  466. * entered.
  467. */
  468. unsigned long
  469. ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
  470. unsigned long *cfmp)
  471. {
  472. unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
  473. long ndirty;
  474. krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
  475. bspstore = (unsigned long *) pt->ar_bspstore;
  476. ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
  477. if (in_syscall(pt))
  478. ndirty += (cfm & 0x7f);
  479. else
  480. cfm &= ~(1UL << 63); /* clear valid bit */
  481. if (cfmp)
  482. *cfmp = cfm;
  483. return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
  484. }
  485. /*
  486. * Synchronize (i.e, write) the RSE backing store living in kernel
  487. * space to the VM of the CHILD task. SW and PT are the pointers to
  488. * the switch_stack and pt_regs structures, respectively.
  489. * USER_RBS_END is the user-level address at which the backing store
  490. * ends.
  491. */
  492. long
  493. ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
  494. unsigned long user_rbs_start, unsigned long user_rbs_end)
  495. {
  496. unsigned long addr, val;
  497. long ret;
  498. /* now copy word for word from kernel rbs to user rbs: */
  499. for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
  500. ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
  501. if (ret < 0)
  502. return ret;
  503. if (access_process_vm(child, addr, &val, sizeof(val),
  504. FOLL_FORCE | FOLL_WRITE)
  505. != sizeof(val))
  506. return -EIO;
  507. }
  508. return 0;
  509. }
  510. static long
  511. ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
  512. unsigned long user_rbs_start, unsigned long user_rbs_end)
  513. {
  514. unsigned long addr, val;
  515. long ret;
  516. /* now copy word for word from user rbs to kernel rbs: */
  517. for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
  518. if (access_process_vm(child, addr, &val, sizeof(val),
  519. FOLL_FORCE)
  520. != sizeof(val))
  521. return -EIO;
  522. ret = ia64_poke(child, sw, user_rbs_end, addr, val);
  523. if (ret < 0)
  524. return ret;
  525. }
  526. return 0;
  527. }
  528. typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
  529. unsigned long, unsigned long);
  530. static void do_sync_rbs(struct unw_frame_info *info, void *arg)
  531. {
  532. struct pt_regs *pt;
  533. unsigned long urbs_end;
  534. syncfunc_t fn = arg;
  535. if (unw_unwind_to_user(info) < 0)
  536. return;
  537. pt = task_pt_regs(info->task);
  538. urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
  539. fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
  540. }
  541. /*
  542. * when a thread is stopped (ptraced), debugger might change thread's user
  543. * stack (change memory directly), and we must avoid the RSE stored in kernel
  544. * to override user stack (user space's RSE is newer than kernel's in the
  545. * case). To workaround the issue, we copy kernel RSE to user RSE before the
  546. * task is stopped, so user RSE has updated data. we then copy user RSE to
  547. * kernel after the task is resummed from traced stop and kernel will use the
  548. * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
  549. * synchronize user RSE to kernel.
  550. */
  551. void ia64_ptrace_stop(void)
  552. {
  553. if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
  554. return;
  555. set_notify_resume(current);
  556. unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
  557. }
  558. /*
  559. * This is called to read back the register backing store.
  560. */
  561. void ia64_sync_krbs(void)
  562. {
  563. clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
  564. unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
  565. }
  566. /*
  567. * After PTRACE_ATTACH, a thread's register backing store area in user
  568. * space is assumed to contain correct data whenever the thread is
  569. * stopped. arch_ptrace_stop takes care of this on tracing stops.
  570. * But if the child was already stopped for job control when we attach
  571. * to it, then it might not ever get into ptrace_stop by the time we
  572. * want to examine the user memory containing the RBS.
  573. */
  574. void
  575. ptrace_attach_sync_user_rbs (struct task_struct *child)
  576. {
  577. int stopped = 0;
  578. struct unw_frame_info info;
  579. /*
  580. * If the child is in TASK_STOPPED, we need to change that to
  581. * TASK_TRACED momentarily while we operate on it. This ensures
  582. * that the child won't be woken up and return to user mode while
  583. * we are doing the sync. (It can only be woken up for SIGKILL.)
  584. */
  585. read_lock(&tasklist_lock);
  586. if (child->sighand) {
  587. spin_lock_irq(&child->sighand->siglock);
  588. if (child->state == TASK_STOPPED &&
  589. !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) {
  590. set_notify_resume(child);
  591. child->state = TASK_TRACED;
  592. stopped = 1;
  593. }
  594. spin_unlock_irq(&child->sighand->siglock);
  595. }
  596. read_unlock(&tasklist_lock);
  597. if (!stopped)
  598. return;
  599. unw_init_from_blocked_task(&info, child);
  600. do_sync_rbs(&info, ia64_sync_user_rbs);
  601. /*
  602. * Now move the child back into TASK_STOPPED if it should be in a
  603. * job control stop, so that SIGCONT can be used to wake it up.
  604. */
  605. read_lock(&tasklist_lock);
  606. if (child->sighand) {
  607. spin_lock_irq(&child->sighand->siglock);
  608. if (child->state == TASK_TRACED &&
  609. (child->signal->flags & SIGNAL_STOP_STOPPED)) {
  610. child->state = TASK_STOPPED;
  611. }
  612. spin_unlock_irq(&child->sighand->siglock);
  613. }
  614. read_unlock(&tasklist_lock);
  615. }
  616. /*
  617. * Write f32-f127 back to task->thread.fph if it has been modified.
  618. */
  619. inline void
  620. ia64_flush_fph (struct task_struct *task)
  621. {
  622. struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
  623. /*
  624. * Prevent migrating this task while
  625. * we're fiddling with the FPU state
  626. */
  627. preempt_disable();
  628. if (ia64_is_local_fpu_owner(task) && psr->mfh) {
  629. psr->mfh = 0;
  630. task->thread.flags |= IA64_THREAD_FPH_VALID;
  631. ia64_save_fpu(&task->thread.fph[0]);
  632. }
  633. preempt_enable();
  634. }
  635. /*
  636. * Sync the fph state of the task so that it can be manipulated
  637. * through thread.fph. If necessary, f32-f127 are written back to
  638. * thread.fph or, if the fph state hasn't been used before, thread.fph
  639. * is cleared to zeroes. Also, access to f32-f127 is disabled to
  640. * ensure that the task picks up the state from thread.fph when it
  641. * executes again.
  642. */
  643. void
  644. ia64_sync_fph (struct task_struct *task)
  645. {
  646. struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
  647. ia64_flush_fph(task);
  648. if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
  649. task->thread.flags |= IA64_THREAD_FPH_VALID;
  650. memset(&task->thread.fph, 0, sizeof(task->thread.fph));
  651. }
  652. ia64_drop_fpu(task);
  653. psr->dfh = 1;
  654. }
  655. /*
  656. * Change the machine-state of CHILD such that it will return via the normal
  657. * kernel exit-path, rather than the syscall-exit path.
  658. */
  659. static void
  660. convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
  661. unsigned long cfm)
  662. {
  663. struct unw_frame_info info, prev_info;
  664. unsigned long ip, sp, pr;
  665. unw_init_from_blocked_task(&info, child);
  666. while (1) {
  667. prev_info = info;
  668. if (unw_unwind(&info) < 0)
  669. return;
  670. unw_get_sp(&info, &sp);
  671. if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
  672. < IA64_PT_REGS_SIZE) {
  673. dprintk("ptrace.%s: ran off the top of the kernel "
  674. "stack\n", __func__);
  675. return;
  676. }
  677. if (unw_get_pr (&prev_info, &pr) < 0) {
  678. unw_get_rp(&prev_info, &ip);
  679. dprintk("ptrace.%s: failed to read "
  680. "predicate register (ip=0x%lx)\n",
  681. __func__, ip);
  682. return;
  683. }
  684. if (unw_is_intr_frame(&info)
  685. && (pr & (1UL << PRED_USER_STACK)))
  686. break;
  687. }
  688. /*
  689. * Note: at the time of this call, the target task is blocked
  690. * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
  691. * (aka, "pLvSys") we redirect execution from
  692. * .work_pending_syscall_end to .work_processed_kernel.
  693. */
  694. unw_get_pr(&prev_info, &pr);
  695. pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
  696. pr |= (1UL << PRED_NON_SYSCALL);
  697. unw_set_pr(&prev_info, pr);
  698. pt->cr_ifs = (1UL << 63) | cfm;
  699. /*
  700. * Clear the memory that is NOT written on syscall-entry to
  701. * ensure we do not leak kernel-state to user when execution
  702. * resumes.
  703. */
  704. pt->r2 = 0;
  705. pt->r3 = 0;
  706. pt->r14 = 0;
  707. memset(&pt->r16, 0, 16*8); /* clear r16-r31 */
  708. memset(&pt->f6, 0, 6*16); /* clear f6-f11 */
  709. pt->b7 = 0;
  710. pt->ar_ccv = 0;
  711. pt->ar_csd = 0;
  712. pt->ar_ssd = 0;
  713. }
  714. static int
  715. access_nat_bits (struct task_struct *child, struct pt_regs *pt,
  716. struct unw_frame_info *info,
  717. unsigned long *data, int write_access)
  718. {
  719. unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
  720. char nat = 0;
  721. if (write_access) {
  722. nat_bits = *data;
  723. scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
  724. if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
  725. dprintk("ptrace: failed to set ar.unat\n");
  726. return -1;
  727. }
  728. for (regnum = 4; regnum <= 7; ++regnum) {
  729. unw_get_gr(info, regnum, &dummy, &nat);
  730. unw_set_gr(info, regnum, dummy,
  731. (nat_bits >> regnum) & 1);
  732. }
  733. } else {
  734. if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
  735. dprintk("ptrace: failed to read ar.unat\n");
  736. return -1;
  737. }
  738. nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
  739. for (regnum = 4; regnum <= 7; ++regnum) {
  740. unw_get_gr(info, regnum, &dummy, &nat);
  741. nat_bits |= (nat != 0) << regnum;
  742. }
  743. *data = nat_bits;
  744. }
  745. return 0;
  746. }
  747. static int
  748. access_uarea (struct task_struct *child, unsigned long addr,
  749. unsigned long *data, int write_access);
  750. static long
  751. ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
  752. {
  753. unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
  754. struct unw_frame_info info;
  755. struct ia64_fpreg fpval;
  756. struct switch_stack *sw;
  757. struct pt_regs *pt;
  758. long ret, retval = 0;
  759. char nat = 0;
  760. int i;
  761. if (!access_ok(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)))
  762. return -EIO;
  763. pt = task_pt_regs(child);
  764. sw = (struct switch_stack *) (child->thread.ksp + 16);
  765. unw_init_from_blocked_task(&info, child);
  766. if (unw_unwind_to_user(&info) < 0) {
  767. return -EIO;
  768. }
  769. if (((unsigned long) ppr & 0x7) != 0) {
  770. dprintk("ptrace:unaligned register address %p\n", ppr);
  771. return -EIO;
  772. }
  773. if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0
  774. || access_uarea(child, PT_AR_EC, &ec, 0) < 0
  775. || access_uarea(child, PT_AR_LC, &lc, 0) < 0
  776. || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0
  777. || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0
  778. || access_uarea(child, PT_CFM, &cfm, 0)
  779. || access_uarea(child, PT_NAT_BITS, &nat_bits, 0))
  780. return -EIO;
  781. /* control regs */
  782. retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
  783. retval |= __put_user(psr, &ppr->cr_ipsr);
  784. /* app regs */
  785. retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
  786. retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
  787. retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
  788. retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
  789. retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
  790. retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
  791. retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
  792. retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
  793. retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
  794. retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
  795. retval |= __put_user(cfm, &ppr->cfm);
  796. /* gr1-gr3 */
  797. retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
  798. retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
  799. /* gr4-gr7 */
  800. for (i = 4; i < 8; i++) {
  801. if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
  802. return -EIO;
  803. retval |= __put_user(val, &ppr->gr[i]);
  804. }
  805. /* gr8-gr11 */
  806. retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
  807. /* gr12-gr15 */
  808. retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
  809. retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
  810. retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
  811. /* gr16-gr31 */
  812. retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
  813. /* b0 */
  814. retval |= __put_user(pt->b0, &ppr->br[0]);
  815. /* b1-b5 */
  816. for (i = 1; i < 6; i++) {
  817. if (unw_access_br(&info, i, &val, 0) < 0)
  818. return -EIO;
  819. __put_user(val, &ppr->br[i]);
  820. }
  821. /* b6-b7 */
  822. retval |= __put_user(pt->b6, &ppr->br[6]);
  823. retval |= __put_user(pt->b7, &ppr->br[7]);
  824. /* fr2-fr5 */
  825. for (i = 2; i < 6; i++) {
  826. if (unw_get_fr(&info, i, &fpval) < 0)
  827. return -EIO;
  828. retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
  829. }
  830. /* fr6-fr11 */
  831. retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
  832. sizeof(struct ia64_fpreg) * 6);
  833. /* fp scratch regs(12-15) */
  834. retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
  835. sizeof(struct ia64_fpreg) * 4);
  836. /* fr16-fr31 */
  837. for (i = 16; i < 32; i++) {
  838. if (unw_get_fr(&info, i, &fpval) < 0)
  839. return -EIO;
  840. retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
  841. }
  842. /* fph */
  843. ia64_flush_fph(child);
  844. retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
  845. sizeof(ppr->fr[32]) * 96);
  846. /* preds */
  847. retval |= __put_user(pt->pr, &ppr->pr);
  848. /* nat bits */
  849. retval |= __put_user(nat_bits, &ppr->nat);
  850. ret = retval ? -EIO : 0;
  851. return ret;
  852. }
  853. static long
  854. ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
  855. {
  856. unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
  857. struct unw_frame_info info;
  858. struct switch_stack *sw;
  859. struct ia64_fpreg fpval;
  860. struct pt_regs *pt;
  861. long ret, retval = 0;
  862. int i;
  863. memset(&fpval, 0, sizeof(fpval));
  864. if (!access_ok(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)))
  865. return -EIO;
  866. pt = task_pt_regs(child);
  867. sw = (struct switch_stack *) (child->thread.ksp + 16);
  868. unw_init_from_blocked_task(&info, child);
  869. if (unw_unwind_to_user(&info) < 0) {
  870. return -EIO;
  871. }
  872. if (((unsigned long) ppr & 0x7) != 0) {
  873. dprintk("ptrace:unaligned register address %p\n", ppr);
  874. return -EIO;
  875. }
  876. /* control regs */
  877. retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
  878. retval |= __get_user(psr, &ppr->cr_ipsr);
  879. /* app regs */
  880. retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
  881. retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
  882. retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
  883. retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
  884. retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
  885. retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
  886. retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
  887. retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
  888. retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
  889. retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
  890. retval |= __get_user(cfm, &ppr->cfm);
  891. /* gr1-gr3 */
  892. retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
  893. retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
  894. /* gr4-gr7 */
  895. for (i = 4; i < 8; i++) {
  896. retval |= __get_user(val, &ppr->gr[i]);
  897. /* NaT bit will be set via PT_NAT_BITS: */
  898. if (unw_set_gr(&info, i, val, 0) < 0)
  899. return -EIO;
  900. }
  901. /* gr8-gr11 */
  902. retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
  903. /* gr12-gr15 */
  904. retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
  905. retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
  906. retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
  907. /* gr16-gr31 */
  908. retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
  909. /* b0 */
  910. retval |= __get_user(pt->b0, &ppr->br[0]);
  911. /* b1-b5 */
  912. for (i = 1; i < 6; i++) {
  913. retval |= __get_user(val, &ppr->br[i]);
  914. unw_set_br(&info, i, val);
  915. }
  916. /* b6-b7 */
  917. retval |= __get_user(pt->b6, &ppr->br[6]);
  918. retval |= __get_user(pt->b7, &ppr->br[7]);
  919. /* fr2-fr5 */
  920. for (i = 2; i < 6; i++) {
  921. retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
  922. if (unw_set_fr(&info, i, fpval) < 0)
  923. return -EIO;
  924. }
  925. /* fr6-fr11 */
  926. retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
  927. sizeof(ppr->fr[6]) * 6);
  928. /* fp scratch regs(12-15) */
  929. retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
  930. sizeof(ppr->fr[12]) * 4);
  931. /* fr16-fr31 */
  932. for (i = 16; i < 32; i++) {
  933. retval |= __copy_from_user(&fpval, &ppr->fr[i],
  934. sizeof(fpval));
  935. if (unw_set_fr(&info, i, fpval) < 0)
  936. return -EIO;
  937. }
  938. /* fph */
  939. ia64_sync_fph(child);
  940. retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
  941. sizeof(ppr->fr[32]) * 96);
  942. /* preds */
  943. retval |= __get_user(pt->pr, &ppr->pr);
  944. /* nat bits */
  945. retval |= __get_user(nat_bits, &ppr->nat);
  946. retval |= access_uarea(child, PT_CR_IPSR, &psr, 1);
  947. retval |= access_uarea(child, PT_AR_RSC, &rsc, 1);
  948. retval |= access_uarea(child, PT_AR_EC, &ec, 1);
  949. retval |= access_uarea(child, PT_AR_LC, &lc, 1);
  950. retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1);
  951. retval |= access_uarea(child, PT_AR_BSP, &bsp, 1);
  952. retval |= access_uarea(child, PT_CFM, &cfm, 1);
  953. retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1);
  954. ret = retval ? -EIO : 0;
  955. return ret;
  956. }
  957. void
  958. user_enable_single_step (struct task_struct *child)
  959. {
  960. struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
  961. set_tsk_thread_flag(child, TIF_SINGLESTEP);
  962. child_psr->ss = 1;
  963. }
  964. void
  965. user_enable_block_step (struct task_struct *child)
  966. {
  967. struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
  968. set_tsk_thread_flag(child, TIF_SINGLESTEP);
  969. child_psr->tb = 1;
  970. }
  971. void
  972. user_disable_single_step (struct task_struct *child)
  973. {
  974. struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
  975. /* make sure the single step/taken-branch trap bits are not set: */
  976. clear_tsk_thread_flag(child, TIF_SINGLESTEP);
  977. child_psr->ss = 0;
  978. child_psr->tb = 0;
  979. }
  980. /*
  981. * Called by kernel/ptrace.c when detaching..
  982. *
  983. * Make sure the single step bit is not set.
  984. */
  985. void
  986. ptrace_disable (struct task_struct *child)
  987. {
  988. user_disable_single_step(child);
  989. }
  990. long
  991. arch_ptrace (struct task_struct *child, long request,
  992. unsigned long addr, unsigned long data)
  993. {
  994. switch (request) {
  995. case PTRACE_PEEKTEXT:
  996. case PTRACE_PEEKDATA:
  997. /* read word at location addr */
  998. if (ptrace_access_vm(child, addr, &data, sizeof(data),
  999. FOLL_FORCE)
  1000. != sizeof(data))
  1001. return -EIO;
  1002. /* ensure return value is not mistaken for error code */
  1003. force_successful_syscall_return();
  1004. return data;
  1005. /* PTRACE_POKETEXT and PTRACE_POKEDATA is handled
  1006. * by the generic ptrace_request().
  1007. */
  1008. case PTRACE_PEEKUSR:
  1009. /* read the word at addr in the USER area */
  1010. if (access_uarea(child, addr, &data, 0) < 0)
  1011. return -EIO;
  1012. /* ensure return value is not mistaken for error code */
  1013. force_successful_syscall_return();
  1014. return data;
  1015. case PTRACE_POKEUSR:
  1016. /* write the word at addr in the USER area */
  1017. if (access_uarea(child, addr, &data, 1) < 0)
  1018. return -EIO;
  1019. return 0;
  1020. case PTRACE_OLD_GETSIGINFO:
  1021. /* for backwards-compatibility */
  1022. return ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
  1023. case PTRACE_OLD_SETSIGINFO:
  1024. /* for backwards-compatibility */
  1025. return ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
  1026. case PTRACE_GETREGS:
  1027. return ptrace_getregs(child,
  1028. (struct pt_all_user_regs __user *) data);
  1029. case PTRACE_SETREGS:
  1030. return ptrace_setregs(child,
  1031. (struct pt_all_user_regs __user *) data);
  1032. default:
  1033. return ptrace_request(child, request, addr, data);
  1034. }
  1035. }
  1036. /* "asmlinkage" so the input arguments are preserved... */
  1037. asmlinkage long
  1038. syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
  1039. long arg4, long arg5, long arg6, long arg7,
  1040. struct pt_regs regs)
  1041. {
  1042. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1043. if (tracehook_report_syscall_entry(&regs))
  1044. return -ENOSYS;
  1045. /* copy user rbs to kernel rbs */
  1046. if (test_thread_flag(TIF_RESTORE_RSE))
  1047. ia64_sync_krbs();
  1048. audit_syscall_entry(regs.r15, arg0, arg1, arg2, arg3);
  1049. return 0;
  1050. }
  1051. /* "asmlinkage" so the input arguments are preserved... */
  1052. asmlinkage void
  1053. syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
  1054. long arg4, long arg5, long arg6, long arg7,
  1055. struct pt_regs regs)
  1056. {
  1057. int step;
  1058. audit_syscall_exit(&regs);
  1059. step = test_thread_flag(TIF_SINGLESTEP);
  1060. if (step || test_thread_flag(TIF_SYSCALL_TRACE))
  1061. tracehook_report_syscall_exit(&regs, step);
  1062. /* copy user rbs to kernel rbs */
  1063. if (test_thread_flag(TIF_RESTORE_RSE))
  1064. ia64_sync_krbs();
  1065. }
  1066. /* Utrace implementation starts here */
  1067. struct regset_get {
  1068. void *kbuf;
  1069. void __user *ubuf;
  1070. };
  1071. struct regset_set {
  1072. const void *kbuf;
  1073. const void __user *ubuf;
  1074. };
  1075. struct regset_getset {
  1076. struct task_struct *target;
  1077. const struct user_regset *regset;
  1078. union {
  1079. struct regset_get get;
  1080. struct regset_set set;
  1081. } u;
  1082. unsigned int pos;
  1083. unsigned int count;
  1084. int ret;
  1085. };
  1086. static int
  1087. access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
  1088. unsigned long addr, unsigned long *data, int write_access)
  1089. {
  1090. struct pt_regs *pt;
  1091. unsigned long *ptr = NULL;
  1092. int ret;
  1093. char nat = 0;
  1094. pt = task_pt_regs(target);
  1095. switch (addr) {
  1096. case ELF_GR_OFFSET(1):
  1097. ptr = &pt->r1;
  1098. break;
  1099. case ELF_GR_OFFSET(2):
  1100. case ELF_GR_OFFSET(3):
  1101. ptr = (void *)&pt->r2 + (addr - ELF_GR_OFFSET(2));
  1102. break;
  1103. case ELF_GR_OFFSET(4) ... ELF_GR_OFFSET(7):
  1104. if (write_access) {
  1105. /* read NaT bit first: */
  1106. unsigned long dummy;
  1107. ret = unw_get_gr(info, addr/8, &dummy, &nat);
  1108. if (ret < 0)
  1109. return ret;
  1110. }
  1111. return unw_access_gr(info, addr/8, data, &nat, write_access);
  1112. case ELF_GR_OFFSET(8) ... ELF_GR_OFFSET(11):
  1113. ptr = (void *)&pt->r8 + addr - ELF_GR_OFFSET(8);
  1114. break;
  1115. case ELF_GR_OFFSET(12):
  1116. case ELF_GR_OFFSET(13):
  1117. ptr = (void *)&pt->r12 + addr - ELF_GR_OFFSET(12);
  1118. break;
  1119. case ELF_GR_OFFSET(14):
  1120. ptr = &pt->r14;
  1121. break;
  1122. case ELF_GR_OFFSET(15):
  1123. ptr = &pt->r15;
  1124. }
  1125. if (write_access)
  1126. *ptr = *data;
  1127. else
  1128. *data = *ptr;
  1129. return 0;
  1130. }
  1131. static int
  1132. access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
  1133. unsigned long addr, unsigned long *data, int write_access)
  1134. {
  1135. struct pt_regs *pt;
  1136. unsigned long *ptr = NULL;
  1137. pt = task_pt_regs(target);
  1138. switch (addr) {
  1139. case ELF_BR_OFFSET(0):
  1140. ptr = &pt->b0;
  1141. break;
  1142. case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
  1143. return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
  1144. data, write_access);
  1145. case ELF_BR_OFFSET(6):
  1146. ptr = &pt->b6;
  1147. break;
  1148. case ELF_BR_OFFSET(7):
  1149. ptr = &pt->b7;
  1150. }
  1151. if (write_access)
  1152. *ptr = *data;
  1153. else
  1154. *data = *ptr;
  1155. return 0;
  1156. }
  1157. static int
  1158. access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
  1159. unsigned long addr, unsigned long *data, int write_access)
  1160. {
  1161. struct pt_regs *pt;
  1162. unsigned long cfm, urbs_end;
  1163. unsigned long *ptr = NULL;
  1164. pt = task_pt_regs(target);
  1165. if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
  1166. switch (addr) {
  1167. case ELF_AR_RSC_OFFSET:
  1168. /* force PL3 */
  1169. if (write_access)
  1170. pt->ar_rsc = *data | (3 << 2);
  1171. else
  1172. *data = pt->ar_rsc;
  1173. return 0;
  1174. case ELF_AR_BSP_OFFSET:
  1175. /*
  1176. * By convention, we use PT_AR_BSP to refer to
  1177. * the end of the user-level backing store.
  1178. * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
  1179. * to get the real value of ar.bsp at the time
  1180. * the kernel was entered.
  1181. *
  1182. * Furthermore, when changing the contents of
  1183. * PT_AR_BSP (or PT_CFM) while the task is
  1184. * blocked in a system call, convert the state
  1185. * so that the non-system-call exit
  1186. * path is used. This ensures that the proper
  1187. * state will be picked up when resuming
  1188. * execution. However, it *also* means that
  1189. * once we write PT_AR_BSP/PT_CFM, it won't be
  1190. * possible to modify the syscall arguments of
  1191. * the pending system call any longer. This
  1192. * shouldn't be an issue because modifying
  1193. * PT_AR_BSP/PT_CFM generally implies that
  1194. * we're either abandoning the pending system
  1195. * call or that we defer it's re-execution
  1196. * (e.g., due to GDB doing an inferior
  1197. * function call).
  1198. */
  1199. urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
  1200. if (write_access) {
  1201. if (*data != urbs_end) {
  1202. if (in_syscall(pt))
  1203. convert_to_non_syscall(target,
  1204. pt,
  1205. cfm);
  1206. /*
  1207. * Simulate user-level write
  1208. * of ar.bsp:
  1209. */
  1210. pt->loadrs = 0;
  1211. pt->ar_bspstore = *data;
  1212. }
  1213. } else
  1214. *data = urbs_end;
  1215. return 0;
  1216. case ELF_AR_BSPSTORE_OFFSET:
  1217. ptr = &pt->ar_bspstore;
  1218. break;
  1219. case ELF_AR_RNAT_OFFSET:
  1220. ptr = &pt->ar_rnat;
  1221. break;
  1222. case ELF_AR_CCV_OFFSET:
  1223. ptr = &pt->ar_ccv;
  1224. break;
  1225. case ELF_AR_UNAT_OFFSET:
  1226. ptr = &pt->ar_unat;
  1227. break;
  1228. case ELF_AR_FPSR_OFFSET:
  1229. ptr = &pt->ar_fpsr;
  1230. break;
  1231. case ELF_AR_PFS_OFFSET:
  1232. ptr = &pt->ar_pfs;
  1233. break;
  1234. case ELF_AR_LC_OFFSET:
  1235. return unw_access_ar(info, UNW_AR_LC, data,
  1236. write_access);
  1237. case ELF_AR_EC_OFFSET:
  1238. return unw_access_ar(info, UNW_AR_EC, data,
  1239. write_access);
  1240. case ELF_AR_CSD_OFFSET:
  1241. ptr = &pt->ar_csd;
  1242. break;
  1243. case ELF_AR_SSD_OFFSET:
  1244. ptr = &pt->ar_ssd;
  1245. }
  1246. } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
  1247. switch (addr) {
  1248. case ELF_CR_IIP_OFFSET:
  1249. ptr = &pt->cr_iip;
  1250. break;
  1251. case ELF_CFM_OFFSET:
  1252. urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
  1253. if (write_access) {
  1254. if (((cfm ^ *data) & PFM_MASK) != 0) {
  1255. if (in_syscall(pt))
  1256. convert_to_non_syscall(target,
  1257. pt,
  1258. cfm);
  1259. pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
  1260. | (*data & PFM_MASK));
  1261. }
  1262. } else
  1263. *data = cfm;
  1264. return 0;
  1265. case ELF_CR_IPSR_OFFSET:
  1266. if (write_access) {
  1267. unsigned long tmp = *data;
  1268. /* psr.ri==3 is a reserved value: SDM 2:25 */
  1269. if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
  1270. tmp &= ~IA64_PSR_RI;
  1271. pt->cr_ipsr = ((tmp & IPSR_MASK)
  1272. | (pt->cr_ipsr & ~IPSR_MASK));
  1273. } else
  1274. *data = (pt->cr_ipsr & IPSR_MASK);
  1275. return 0;
  1276. }
  1277. } else if (addr == ELF_NAT_OFFSET)
  1278. return access_nat_bits(target, pt, info,
  1279. data, write_access);
  1280. else if (addr == ELF_PR_OFFSET)
  1281. ptr = &pt->pr;
  1282. else
  1283. return -1;
  1284. if (write_access)
  1285. *ptr = *data;
  1286. else
  1287. *data = *ptr;
  1288. return 0;
  1289. }
  1290. static int
  1291. access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
  1292. unsigned long addr, unsigned long *data, int write_access)
  1293. {
  1294. if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(15))
  1295. return access_elf_gpreg(target, info, addr, data, write_access);
  1296. else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
  1297. return access_elf_breg(target, info, addr, data, write_access);
  1298. else
  1299. return access_elf_areg(target, info, addr, data, write_access);
  1300. }
  1301. void do_gpregs_get(struct unw_frame_info *info, void *arg)
  1302. {
  1303. struct pt_regs *pt;
  1304. struct regset_getset *dst = arg;
  1305. elf_greg_t tmp[16];
  1306. unsigned int i, index, min_copy;
  1307. if (unw_unwind_to_user(info) < 0)
  1308. return;
  1309. /*
  1310. * coredump format:
  1311. * r0-r31
  1312. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  1313. * predicate registers (p0-p63)
  1314. * b0-b7
  1315. * ip cfm user-mask
  1316. * ar.rsc ar.bsp ar.bspstore ar.rnat
  1317. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  1318. */
  1319. /* Skip r0 */
  1320. if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
  1321. dst->ret = user_regset_copyout_zero(&dst->pos, &dst->count,
  1322. &dst->u.get.kbuf,
  1323. &dst->u.get.ubuf,
  1324. 0, ELF_GR_OFFSET(1));
  1325. if (dst->ret || dst->count == 0)
  1326. return;
  1327. }
  1328. /* gr1 - gr15 */
  1329. if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
  1330. index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
  1331. min_copy = ELF_GR_OFFSET(16) > (dst->pos + dst->count) ?
  1332. (dst->pos + dst->count) : ELF_GR_OFFSET(16);
  1333. for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
  1334. index++)
  1335. if (access_elf_reg(dst->target, info, i,
  1336. &tmp[index], 0) < 0) {
  1337. dst->ret = -EIO;
  1338. return;
  1339. }
  1340. dst->ret = user_regset_copyout(&dst->pos, &dst->count,
  1341. &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
  1342. ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
  1343. if (dst->ret || dst->count == 0)
  1344. return;
  1345. }
  1346. /* r16-r31 */
  1347. if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
  1348. pt = task_pt_regs(dst->target);
  1349. dst->ret = user_regset_copyout(&dst->pos, &dst->count,
  1350. &dst->u.get.kbuf, &dst->u.get.ubuf, &pt->r16,
  1351. ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
  1352. if (dst->ret || dst->count == 0)
  1353. return;
  1354. }
  1355. /* nat, pr, b0 - b7 */
  1356. if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
  1357. index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
  1358. min_copy = ELF_CR_IIP_OFFSET > (dst->pos + dst->count) ?
  1359. (dst->pos + dst->count) : ELF_CR_IIP_OFFSET;
  1360. for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
  1361. index++)
  1362. if (access_elf_reg(dst->target, info, i,
  1363. &tmp[index], 0) < 0) {
  1364. dst->ret = -EIO;
  1365. return;
  1366. }
  1367. dst->ret = user_regset_copyout(&dst->pos, &dst->count,
  1368. &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
  1369. ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
  1370. if (dst->ret || dst->count == 0)
  1371. return;
  1372. }
  1373. /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
  1374. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
  1375. */
  1376. if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
  1377. index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
  1378. min_copy = ELF_AR_END_OFFSET > (dst->pos + dst->count) ?
  1379. (dst->pos + dst->count) : ELF_AR_END_OFFSET;
  1380. for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
  1381. index++)
  1382. if (access_elf_reg(dst->target, info, i,
  1383. &tmp[index], 0) < 0) {
  1384. dst->ret = -EIO;
  1385. return;
  1386. }
  1387. dst->ret = user_regset_copyout(&dst->pos, &dst->count,
  1388. &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
  1389. ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
  1390. }
  1391. }
  1392. void do_gpregs_set(struct unw_frame_info *info, void *arg)
  1393. {
  1394. struct pt_regs *pt;
  1395. struct regset_getset *dst = arg;
  1396. elf_greg_t tmp[16];
  1397. unsigned int i, index;
  1398. if (unw_unwind_to_user(info) < 0)
  1399. return;
  1400. /* Skip r0 */
  1401. if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
  1402. dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
  1403. &dst->u.set.kbuf,
  1404. &dst->u.set.ubuf,
  1405. 0, ELF_GR_OFFSET(1));
  1406. if (dst->ret || dst->count == 0)
  1407. return;
  1408. }
  1409. /* gr1-gr15 */
  1410. if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
  1411. i = dst->pos;
  1412. index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
  1413. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1414. &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
  1415. ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
  1416. if (dst->ret)
  1417. return;
  1418. for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
  1419. if (access_elf_reg(dst->target, info, i,
  1420. &tmp[index], 1) < 0) {
  1421. dst->ret = -EIO;
  1422. return;
  1423. }
  1424. if (dst->count == 0)
  1425. return;
  1426. }
  1427. /* gr16-gr31 */
  1428. if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
  1429. pt = task_pt_regs(dst->target);
  1430. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1431. &dst->u.set.kbuf, &dst->u.set.ubuf, &pt->r16,
  1432. ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
  1433. if (dst->ret || dst->count == 0)
  1434. return;
  1435. }
  1436. /* nat, pr, b0 - b7 */
  1437. if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
  1438. i = dst->pos;
  1439. index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
  1440. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1441. &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
  1442. ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
  1443. if (dst->ret)
  1444. return;
  1445. for (; i < dst->pos; i += sizeof(elf_greg_t), index++)
  1446. if (access_elf_reg(dst->target, info, i,
  1447. &tmp[index], 1) < 0) {
  1448. dst->ret = -EIO;
  1449. return;
  1450. }
  1451. if (dst->count == 0)
  1452. return;
  1453. }
  1454. /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
  1455. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
  1456. */
  1457. if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
  1458. i = dst->pos;
  1459. index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
  1460. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1461. &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
  1462. ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
  1463. if (dst->ret)
  1464. return;
  1465. for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
  1466. if (access_elf_reg(dst->target, info, i,
  1467. &tmp[index], 1) < 0) {
  1468. dst->ret = -EIO;
  1469. return;
  1470. }
  1471. }
  1472. }
  1473. #define ELF_FP_OFFSET(i) (i * sizeof(elf_fpreg_t))
  1474. void do_fpregs_get(struct unw_frame_info *info, void *arg)
  1475. {
  1476. struct regset_getset *dst = arg;
  1477. struct task_struct *task = dst->target;
  1478. elf_fpreg_t tmp[30];
  1479. int index, min_copy, i;
  1480. if (unw_unwind_to_user(info) < 0)
  1481. return;
  1482. /* Skip pos 0 and 1 */
  1483. if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
  1484. dst->ret = user_regset_copyout_zero(&dst->pos, &dst->count,
  1485. &dst->u.get.kbuf,
  1486. &dst->u.get.ubuf,
  1487. 0, ELF_FP_OFFSET(2));
  1488. if (dst->count == 0 || dst->ret)
  1489. return;
  1490. }
  1491. /* fr2-fr31 */
  1492. if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
  1493. index = (dst->pos - ELF_FP_OFFSET(2)) / sizeof(elf_fpreg_t);
  1494. min_copy = min(((unsigned int)ELF_FP_OFFSET(32)),
  1495. dst->pos + dst->count);
  1496. for (i = dst->pos; i < min_copy; i += sizeof(elf_fpreg_t),
  1497. index++)
  1498. if (unw_get_fr(info, i / sizeof(elf_fpreg_t),
  1499. &tmp[index])) {
  1500. dst->ret = -EIO;
  1501. return;
  1502. }
  1503. dst->ret = user_regset_copyout(&dst->pos, &dst->count,
  1504. &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
  1505. ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
  1506. if (dst->count == 0 || dst->ret)
  1507. return;
  1508. }
  1509. /* fph */
  1510. if (dst->count > 0) {
  1511. ia64_flush_fph(dst->target);
  1512. if (task->thread.flags & IA64_THREAD_FPH_VALID)
  1513. dst->ret = user_regset_copyout(
  1514. &dst->pos, &dst->count,
  1515. &dst->u.get.kbuf, &dst->u.get.ubuf,
  1516. &dst->target->thread.fph,
  1517. ELF_FP_OFFSET(32), -1);
  1518. else
  1519. /* Zero fill instead. */
  1520. dst->ret = user_regset_copyout_zero(
  1521. &dst->pos, &dst->count,
  1522. &dst->u.get.kbuf, &dst->u.get.ubuf,
  1523. ELF_FP_OFFSET(32), -1);
  1524. }
  1525. }
  1526. void do_fpregs_set(struct unw_frame_info *info, void *arg)
  1527. {
  1528. struct regset_getset *dst = arg;
  1529. elf_fpreg_t fpreg, tmp[30];
  1530. int index, start, end;
  1531. if (unw_unwind_to_user(info) < 0)
  1532. return;
  1533. /* Skip pos 0 and 1 */
  1534. if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
  1535. dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
  1536. &dst->u.set.kbuf,
  1537. &dst->u.set.ubuf,
  1538. 0, ELF_FP_OFFSET(2));
  1539. if (dst->count == 0 || dst->ret)
  1540. return;
  1541. }
  1542. /* fr2-fr31 */
  1543. if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
  1544. start = dst->pos;
  1545. end = min(((unsigned int)ELF_FP_OFFSET(32)),
  1546. dst->pos + dst->count);
  1547. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1548. &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
  1549. ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
  1550. if (dst->ret)
  1551. return;
  1552. if (start & 0xF) { /* only write high part */
  1553. if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
  1554. &fpreg)) {
  1555. dst->ret = -EIO;
  1556. return;
  1557. }
  1558. tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
  1559. = fpreg.u.bits[0];
  1560. start &= ~0xFUL;
  1561. }
  1562. if (end & 0xF) { /* only write low part */
  1563. if (unw_get_fr(info, end / sizeof(elf_fpreg_t),
  1564. &fpreg)) {
  1565. dst->ret = -EIO;
  1566. return;
  1567. }
  1568. tmp[end / sizeof(elf_fpreg_t) - 2].u.bits[1]
  1569. = fpreg.u.bits[1];
  1570. end = (end + 0xF) & ~0xFUL;
  1571. }
  1572. for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
  1573. index = start / sizeof(elf_fpreg_t);
  1574. if (unw_set_fr(info, index, tmp[index - 2])) {
  1575. dst->ret = -EIO;
  1576. return;
  1577. }
  1578. }
  1579. if (dst->ret || dst->count == 0)
  1580. return;
  1581. }
  1582. /* fph */
  1583. if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
  1584. ia64_sync_fph(dst->target);
  1585. dst->ret = user_regset_copyin(&dst->pos, &dst->count,
  1586. &dst->u.set.kbuf,
  1587. &dst->u.set.ubuf,
  1588. &dst->target->thread.fph,
  1589. ELF_FP_OFFSET(32), -1);
  1590. }
  1591. }
  1592. static int
  1593. do_regset_call(void (*call)(struct unw_frame_info *, void *),
  1594. struct task_struct *target,
  1595. const struct user_regset *regset,
  1596. unsigned int pos, unsigned int count,
  1597. const void *kbuf, const void __user *ubuf)
  1598. {
  1599. struct regset_getset info = { .target = target, .regset = regset,
  1600. .pos = pos, .count = count,
  1601. .u.set = { .kbuf = kbuf, .ubuf = ubuf },
  1602. .ret = 0 };
  1603. if (target == current)
  1604. unw_init_running(call, &info);
  1605. else {
  1606. struct unw_frame_info ufi;
  1607. memset(&ufi, 0, sizeof(ufi));
  1608. unw_init_from_blocked_task(&ufi, target);
  1609. (*call)(&ufi, &info);
  1610. }
  1611. return info.ret;
  1612. }
  1613. static int
  1614. gpregs_get(struct task_struct *target,
  1615. const struct user_regset *regset,
  1616. unsigned int pos, unsigned int count,
  1617. void *kbuf, void __user *ubuf)
  1618. {
  1619. return do_regset_call(do_gpregs_get, target, regset, pos, count,
  1620. kbuf, ubuf);
  1621. }
  1622. static int gpregs_set(struct task_struct *target,
  1623. const struct user_regset *regset,
  1624. unsigned int pos, unsigned int count,
  1625. const void *kbuf, const void __user *ubuf)
  1626. {
  1627. return do_regset_call(do_gpregs_set, target, regset, pos, count,
  1628. kbuf, ubuf);
  1629. }
  1630. static void do_gpregs_writeback(struct unw_frame_info *info, void *arg)
  1631. {
  1632. do_sync_rbs(info, ia64_sync_user_rbs);
  1633. }
  1634. /*
  1635. * This is called to write back the register backing store.
  1636. * ptrace does this before it stops, so that a tracer reading the user
  1637. * memory after the thread stops will get the current register data.
  1638. */
  1639. static int
  1640. gpregs_writeback(struct task_struct *target,
  1641. const struct user_regset *regset,
  1642. int now)
  1643. {
  1644. if (test_and_set_tsk_thread_flag(target, TIF_RESTORE_RSE))
  1645. return 0;
  1646. set_notify_resume(target);
  1647. return do_regset_call(do_gpregs_writeback, target, regset, 0, 0,
  1648. NULL, NULL);
  1649. }
  1650. static int
  1651. fpregs_active(struct task_struct *target, const struct user_regset *regset)
  1652. {
  1653. return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
  1654. }
  1655. static int fpregs_get(struct task_struct *target,
  1656. const struct user_regset *regset,
  1657. unsigned int pos, unsigned int count,
  1658. void *kbuf, void __user *ubuf)
  1659. {
  1660. return do_regset_call(do_fpregs_get, target, regset, pos, count,
  1661. kbuf, ubuf);
  1662. }
  1663. static int fpregs_set(struct task_struct *target,
  1664. const struct user_regset *regset,
  1665. unsigned int pos, unsigned int count,
  1666. const void *kbuf, const void __user *ubuf)
  1667. {
  1668. return do_regset_call(do_fpregs_set, target, regset, pos, count,
  1669. kbuf, ubuf);
  1670. }
  1671. static int
  1672. access_uarea(struct task_struct *child, unsigned long addr,
  1673. unsigned long *data, int write_access)
  1674. {
  1675. unsigned int pos = -1; /* an invalid value */
  1676. int ret;
  1677. unsigned long *ptr, regnum;
  1678. if ((addr & 0x7) != 0) {
  1679. dprintk("ptrace: unaligned register address 0x%lx\n", addr);
  1680. return -1;
  1681. }
  1682. if ((addr >= PT_NAT_BITS + 8 && addr < PT_F2) ||
  1683. (addr >= PT_R7 + 8 && addr < PT_B1) ||
  1684. (addr >= PT_AR_LC + 8 && addr < PT_CR_IPSR) ||
  1685. (addr >= PT_AR_SSD + 8 && addr < PT_DBR)) {
  1686. dprintk("ptrace: rejecting access to register "
  1687. "address 0x%lx\n", addr);
  1688. return -1;
  1689. }
  1690. switch (addr) {
  1691. case PT_F32 ... (PT_F127 + 15):
  1692. pos = addr - PT_F32 + ELF_FP_OFFSET(32);
  1693. break;
  1694. case PT_F2 ... (PT_F5 + 15):
  1695. pos = addr - PT_F2 + ELF_FP_OFFSET(2);
  1696. break;
  1697. case PT_F10 ... (PT_F31 + 15):
  1698. pos = addr - PT_F10 + ELF_FP_OFFSET(10);
  1699. break;
  1700. case PT_F6 ... (PT_F9 + 15):
  1701. pos = addr - PT_F6 + ELF_FP_OFFSET(6);
  1702. break;
  1703. }
  1704. if (pos != -1) {
  1705. if (write_access)
  1706. ret = fpregs_set(child, NULL, pos,
  1707. sizeof(unsigned long), data, NULL);
  1708. else
  1709. ret = fpregs_get(child, NULL, pos,
  1710. sizeof(unsigned long), data, NULL);
  1711. if (ret != 0)
  1712. return -1;
  1713. return 0;
  1714. }
  1715. switch (addr) {
  1716. case PT_NAT_BITS:
  1717. pos = ELF_NAT_OFFSET;
  1718. break;
  1719. case PT_R4 ... PT_R7:
  1720. pos = addr - PT_R4 + ELF_GR_OFFSET(4);
  1721. break;
  1722. case PT_B1 ... PT_B5:
  1723. pos = addr - PT_B1 + ELF_BR_OFFSET(1);
  1724. break;
  1725. case PT_AR_EC:
  1726. pos = ELF_AR_EC_OFFSET;
  1727. break;
  1728. case PT_AR_LC:
  1729. pos = ELF_AR_LC_OFFSET;
  1730. break;
  1731. case PT_CR_IPSR:
  1732. pos = ELF_CR_IPSR_OFFSET;
  1733. break;
  1734. case PT_CR_IIP:
  1735. pos = ELF_CR_IIP_OFFSET;
  1736. break;
  1737. case PT_CFM:
  1738. pos = ELF_CFM_OFFSET;
  1739. break;
  1740. case PT_AR_UNAT:
  1741. pos = ELF_AR_UNAT_OFFSET;
  1742. break;
  1743. case PT_AR_PFS:
  1744. pos = ELF_AR_PFS_OFFSET;
  1745. break;
  1746. case PT_AR_RSC:
  1747. pos = ELF_AR_RSC_OFFSET;
  1748. break;
  1749. case PT_AR_RNAT:
  1750. pos = ELF_AR_RNAT_OFFSET;
  1751. break;
  1752. case PT_AR_BSPSTORE:
  1753. pos = ELF_AR_BSPSTORE_OFFSET;
  1754. break;
  1755. case PT_PR:
  1756. pos = ELF_PR_OFFSET;
  1757. break;
  1758. case PT_B6:
  1759. pos = ELF_BR_OFFSET(6);
  1760. break;
  1761. case PT_AR_BSP:
  1762. pos = ELF_AR_BSP_OFFSET;
  1763. break;
  1764. case PT_R1 ... PT_R3:
  1765. pos = addr - PT_R1 + ELF_GR_OFFSET(1);
  1766. break;
  1767. case PT_R12 ... PT_R15:
  1768. pos = addr - PT_R12 + ELF_GR_OFFSET(12);
  1769. break;
  1770. case PT_R8 ... PT_R11:
  1771. pos = addr - PT_R8 + ELF_GR_OFFSET(8);
  1772. break;
  1773. case PT_R16 ... PT_R31:
  1774. pos = addr - PT_R16 + ELF_GR_OFFSET(16);
  1775. break;
  1776. case PT_AR_CCV:
  1777. pos = ELF_AR_CCV_OFFSET;
  1778. break;
  1779. case PT_AR_FPSR:
  1780. pos = ELF_AR_FPSR_OFFSET;
  1781. break;
  1782. case PT_B0:
  1783. pos = ELF_BR_OFFSET(0);
  1784. break;
  1785. case PT_B7:
  1786. pos = ELF_BR_OFFSET(7);
  1787. break;
  1788. case PT_AR_CSD:
  1789. pos = ELF_AR_CSD_OFFSET;
  1790. break;
  1791. case PT_AR_SSD:
  1792. pos = ELF_AR_SSD_OFFSET;
  1793. break;
  1794. }
  1795. if (pos != -1) {
  1796. if (write_access)
  1797. ret = gpregs_set(child, NULL, pos,
  1798. sizeof(unsigned long), data, NULL);
  1799. else
  1800. ret = gpregs_get(child, NULL, pos,
  1801. sizeof(unsigned long), data, NULL);
  1802. if (ret != 0)
  1803. return -1;
  1804. return 0;
  1805. }
  1806. /* access debug registers */
  1807. if (addr >= PT_IBR) {
  1808. regnum = (addr - PT_IBR) >> 3;
  1809. ptr = &child->thread.ibr[0];
  1810. } else {
  1811. regnum = (addr - PT_DBR) >> 3;
  1812. ptr = &child->thread.dbr[0];
  1813. }
  1814. if (regnum >= 8) {
  1815. dprintk("ptrace: rejecting access to register "
  1816. "address 0x%lx\n", addr);
  1817. return -1;
  1818. }
  1819. #ifdef CONFIG_PERFMON
  1820. /*
  1821. * Check if debug registers are used by perfmon. This
  1822. * test must be done once we know that we can do the
  1823. * operation, i.e. the arguments are all valid, but
  1824. * before we start modifying the state.
  1825. *
  1826. * Perfmon needs to keep a count of how many processes
  1827. * are trying to modify the debug registers for system
  1828. * wide monitoring sessions.
  1829. *
  1830. * We also include read access here, because they may
  1831. * cause the PMU-installed debug register state
  1832. * (dbr[], ibr[]) to be reset. The two arrays are also
  1833. * used by perfmon, but we do not use
  1834. * IA64_THREAD_DBG_VALID. The registers are restored
  1835. * by the PMU context switch code.
  1836. */
  1837. if (pfm_use_debug_registers(child))
  1838. return -1;
  1839. #endif
  1840. if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
  1841. child->thread.flags |= IA64_THREAD_DBG_VALID;
  1842. memset(child->thread.dbr, 0,
  1843. sizeof(child->thread.dbr));
  1844. memset(child->thread.ibr, 0,
  1845. sizeof(child->thread.ibr));
  1846. }
  1847. ptr += regnum;
  1848. if ((regnum & 1) && write_access) {
  1849. /* don't let the user set kernel-level breakpoints: */
  1850. *ptr = *data & ~(7UL << 56);
  1851. return 0;
  1852. }
  1853. if (write_access)
  1854. *ptr = *data;
  1855. else
  1856. *data = *ptr;
  1857. return 0;
  1858. }
  1859. static const struct user_regset native_regsets[] = {
  1860. {
  1861. .core_note_type = NT_PRSTATUS,
  1862. .n = ELF_NGREG,
  1863. .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
  1864. .get = gpregs_get, .set = gpregs_set,
  1865. .writeback = gpregs_writeback
  1866. },
  1867. {
  1868. .core_note_type = NT_PRFPREG,
  1869. .n = ELF_NFPREG,
  1870. .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
  1871. .get = fpregs_get, .set = fpregs_set, .active = fpregs_active
  1872. },
  1873. };
  1874. static const struct user_regset_view user_ia64_view = {
  1875. .name = "ia64",
  1876. .e_machine = EM_IA_64,
  1877. .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
  1878. };
  1879. const struct user_regset_view *task_user_regset_view(struct task_struct *tsk)
  1880. {
  1881. return &user_ia64_view;
  1882. }
  1883. struct syscall_get_set_args {
  1884. unsigned int i;
  1885. unsigned int n;
  1886. unsigned long *args;
  1887. struct pt_regs *regs;
  1888. int rw;
  1889. };
  1890. static void syscall_get_set_args_cb(struct unw_frame_info *info, void *data)
  1891. {
  1892. struct syscall_get_set_args *args = data;
  1893. struct pt_regs *pt = args->regs;
  1894. unsigned long *krbs, cfm, ndirty, nlocals, nouts;
  1895. int i, count;
  1896. if (unw_unwind_to_user(info) < 0)
  1897. return;
  1898. /*
  1899. * We get here via a few paths:
  1900. * - break instruction: cfm is shared with caller.
  1901. * syscall args are in out= regs, locals are non-empty.
  1902. * - epsinstruction: cfm is set by br.call
  1903. * locals don't exist.
  1904. *
  1905. * For both cases argguments are reachable in cfm.sof - cfm.sol.
  1906. * CFM: [ ... | sor: 17..14 | sol : 13..7 | sof : 6..0 ]
  1907. */
  1908. cfm = pt->cr_ifs;
  1909. nlocals = (cfm >> 7) & 0x7f; /* aka sol */
  1910. nouts = (cfm & 0x7f) - nlocals; /* aka sof - sol */
  1911. krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
  1912. ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
  1913. count = 0;
  1914. if (in_syscall(pt))
  1915. count = min_t(int, args->n, nouts);
  1916. /* Iterate over outs. */
  1917. for (i = 0; i < count; i++) {
  1918. int j = ndirty + nlocals + i + args->i;
  1919. if (args->rw)
  1920. *ia64_rse_skip_regs(krbs, j) = args->args[i];
  1921. else
  1922. args->args[i] = *ia64_rse_skip_regs(krbs, j);
  1923. }
  1924. if (!args->rw) {
  1925. while (i < args->n) {
  1926. args->args[i] = 0;
  1927. i++;
  1928. }
  1929. }
  1930. }
  1931. void ia64_syscall_get_set_arguments(struct task_struct *task,
  1932. struct pt_regs *regs, unsigned int i, unsigned int n,
  1933. unsigned long *args, int rw)
  1934. {
  1935. struct syscall_get_set_args data = {
  1936. .i = i,
  1937. .n = n,
  1938. .args = args,
  1939. .regs = regs,
  1940. .rw = rw,
  1941. };
  1942. if (task == current)
  1943. unw_init_running(syscall_get_set_args_cb, &data);
  1944. else {
  1945. struct unw_frame_info ufi;
  1946. memset(&ufi, 0, sizeof(ufi));
  1947. unw_init_from_blocked_task(&ufi, task);
  1948. syscall_get_set_args_cb(&ufi, &data);
  1949. }
  1950. }