book3s_xics.c 36 KB

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  1. /*
  2. * Copyright 2012 Michael Ellerman, IBM Corporation.
  3. * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/kvm_host.h>
  11. #include <linux/err.h>
  12. #include <linux/gfp.h>
  13. #include <linux/anon_inodes.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/uaccess.h>
  16. #include <asm/kvm_book3s.h>
  17. #include <asm/kvm_ppc.h>
  18. #include <asm/hvcall.h>
  19. #include <asm/xics.h>
  20. #include <asm/debugfs.h>
  21. #include <asm/time.h>
  22. #include <linux/seq_file.h>
  23. #include "book3s_xics.h"
  24. #if 1
  25. #define XICS_DBG(fmt...) do { } while (0)
  26. #else
  27. #define XICS_DBG(fmt...) trace_printk(fmt)
  28. #endif
  29. #define ENABLE_REALMODE true
  30. #define DEBUG_REALMODE false
  31. /*
  32. * LOCKING
  33. * =======
  34. *
  35. * Each ICS has a spin lock protecting the information about the IRQ
  36. * sources and avoiding simultaneous deliveries of the same interrupt.
  37. *
  38. * ICP operations are done via a single compare & swap transaction
  39. * (most ICP state fits in the union kvmppc_icp_state)
  40. */
  41. /*
  42. * TODO
  43. * ====
  44. *
  45. * - To speed up resends, keep a bitmap of "resend" set bits in the
  46. * ICS
  47. *
  48. * - Speed up server# -> ICP lookup (array ? hash table ?)
  49. *
  50. * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
  51. * locks array to improve scalability
  52. */
  53. /* -- ICS routines -- */
  54. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  55. u32 new_irq, bool check_resend);
  56. /*
  57. * Return value ideally indicates how the interrupt was handled, but no
  58. * callers look at it (given that we don't implement KVM_IRQ_LINE_STATUS),
  59. * so just return 0.
  60. */
  61. static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
  62. {
  63. struct ics_irq_state *state;
  64. struct kvmppc_ics *ics;
  65. u16 src;
  66. u32 pq_old, pq_new;
  67. XICS_DBG("ics deliver %#x (level: %d)\n", irq, level);
  68. ics = kvmppc_xics_find_ics(xics, irq, &src);
  69. if (!ics) {
  70. XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq);
  71. return -EINVAL;
  72. }
  73. state = &ics->irq_state[src];
  74. if (!state->exists)
  75. return -EINVAL;
  76. if (level == KVM_INTERRUPT_SET_LEVEL || level == KVM_INTERRUPT_SET)
  77. level = 1;
  78. else if (level == KVM_INTERRUPT_UNSET)
  79. level = 0;
  80. /*
  81. * Take other values the same as 1, consistent with original code.
  82. * maybe WARN here?
  83. */
  84. if (!state->lsi && level == 0) /* noop for MSI */
  85. return 0;
  86. do {
  87. pq_old = state->pq_state;
  88. if (state->lsi) {
  89. if (level) {
  90. if (pq_old & PQ_PRESENTED)
  91. /* Setting already set LSI ... */
  92. return 0;
  93. pq_new = PQ_PRESENTED;
  94. } else
  95. pq_new = 0;
  96. } else
  97. pq_new = ((pq_old << 1) & 3) | PQ_PRESENTED;
  98. } while (cmpxchg(&state->pq_state, pq_old, pq_new) != pq_old);
  99. /* Test P=1, Q=0, this is the only case where we present */
  100. if (pq_new == PQ_PRESENTED)
  101. icp_deliver_irq(xics, NULL, irq, false);
  102. /* Record which CPU this arrived on for passed-through interrupts */
  103. if (state->host_irq)
  104. state->intr_cpu = raw_smp_processor_id();
  105. return 0;
  106. }
  107. static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  108. struct kvmppc_icp *icp)
  109. {
  110. int i;
  111. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  112. struct ics_irq_state *state = &ics->irq_state[i];
  113. if (state->resend) {
  114. XICS_DBG("resend %#x prio %#x\n", state->number,
  115. state->priority);
  116. icp_deliver_irq(xics, icp, state->number, true);
  117. }
  118. }
  119. }
  120. static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  121. struct ics_irq_state *state,
  122. u32 server, u32 priority, u32 saved_priority)
  123. {
  124. bool deliver;
  125. unsigned long flags;
  126. local_irq_save(flags);
  127. arch_spin_lock(&ics->lock);
  128. state->server = server;
  129. state->priority = priority;
  130. state->saved_priority = saved_priority;
  131. deliver = false;
  132. if ((state->masked_pending || state->resend) && priority != MASKED) {
  133. state->masked_pending = 0;
  134. state->resend = 0;
  135. deliver = true;
  136. }
  137. arch_spin_unlock(&ics->lock);
  138. local_irq_restore(flags);
  139. return deliver;
  140. }
  141. int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority)
  142. {
  143. struct kvmppc_xics *xics = kvm->arch.xics;
  144. struct kvmppc_icp *icp;
  145. struct kvmppc_ics *ics;
  146. struct ics_irq_state *state;
  147. u16 src;
  148. if (!xics)
  149. return -ENODEV;
  150. ics = kvmppc_xics_find_ics(xics, irq, &src);
  151. if (!ics)
  152. return -EINVAL;
  153. state = &ics->irq_state[src];
  154. icp = kvmppc_xics_find_server(kvm, server);
  155. if (!icp)
  156. return -EINVAL;
  157. XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n",
  158. irq, server, priority,
  159. state->masked_pending, state->resend);
  160. if (write_xive(xics, ics, state, server, priority, priority))
  161. icp_deliver_irq(xics, icp, irq, false);
  162. return 0;
  163. }
  164. int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority)
  165. {
  166. struct kvmppc_xics *xics = kvm->arch.xics;
  167. struct kvmppc_ics *ics;
  168. struct ics_irq_state *state;
  169. u16 src;
  170. unsigned long flags;
  171. if (!xics)
  172. return -ENODEV;
  173. ics = kvmppc_xics_find_ics(xics, irq, &src);
  174. if (!ics)
  175. return -EINVAL;
  176. state = &ics->irq_state[src];
  177. local_irq_save(flags);
  178. arch_spin_lock(&ics->lock);
  179. *server = state->server;
  180. *priority = state->priority;
  181. arch_spin_unlock(&ics->lock);
  182. local_irq_restore(flags);
  183. return 0;
  184. }
  185. int kvmppc_xics_int_on(struct kvm *kvm, u32 irq)
  186. {
  187. struct kvmppc_xics *xics = kvm->arch.xics;
  188. struct kvmppc_icp *icp;
  189. struct kvmppc_ics *ics;
  190. struct ics_irq_state *state;
  191. u16 src;
  192. if (!xics)
  193. return -ENODEV;
  194. ics = kvmppc_xics_find_ics(xics, irq, &src);
  195. if (!ics)
  196. return -EINVAL;
  197. state = &ics->irq_state[src];
  198. icp = kvmppc_xics_find_server(kvm, state->server);
  199. if (!icp)
  200. return -EINVAL;
  201. if (write_xive(xics, ics, state, state->server, state->saved_priority,
  202. state->saved_priority))
  203. icp_deliver_irq(xics, icp, irq, false);
  204. return 0;
  205. }
  206. int kvmppc_xics_int_off(struct kvm *kvm, u32 irq)
  207. {
  208. struct kvmppc_xics *xics = kvm->arch.xics;
  209. struct kvmppc_ics *ics;
  210. struct ics_irq_state *state;
  211. u16 src;
  212. if (!xics)
  213. return -ENODEV;
  214. ics = kvmppc_xics_find_ics(xics, irq, &src);
  215. if (!ics)
  216. return -EINVAL;
  217. state = &ics->irq_state[src];
  218. write_xive(xics, ics, state, state->server, MASKED, state->priority);
  219. return 0;
  220. }
  221. /* -- ICP routines, including hcalls -- */
  222. static inline bool icp_try_update(struct kvmppc_icp *icp,
  223. union kvmppc_icp_state old,
  224. union kvmppc_icp_state new,
  225. bool change_self)
  226. {
  227. bool success;
  228. /* Calculate new output value */
  229. new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
  230. /* Attempt atomic update */
  231. success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
  232. if (!success)
  233. goto bail;
  234. XICS_DBG("UPD [%04lx] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  235. icp->server_num,
  236. old.cppr, old.mfrr, old.pending_pri, old.xisr,
  237. old.need_resend, old.out_ee);
  238. XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  239. new.cppr, new.mfrr, new.pending_pri, new.xisr,
  240. new.need_resend, new.out_ee);
  241. /*
  242. * Check for output state update
  243. *
  244. * Note that this is racy since another processor could be updating
  245. * the state already. This is why we never clear the interrupt output
  246. * here, we only ever set it. The clear only happens prior to doing
  247. * an update and only by the processor itself. Currently we do it
  248. * in Accept (H_XIRR) and Up_Cppr (H_XPPR).
  249. *
  250. * We also do not try to figure out whether the EE state has changed,
  251. * we unconditionally set it if the new state calls for it. The reason
  252. * for that is that we opportunistically remove the pending interrupt
  253. * flag when raising CPPR, so we need to set it back here if an
  254. * interrupt is still pending.
  255. */
  256. if (new.out_ee) {
  257. kvmppc_book3s_queue_irqprio(icp->vcpu,
  258. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  259. if (!change_self)
  260. kvmppc_fast_vcpu_kick(icp->vcpu);
  261. }
  262. bail:
  263. return success;
  264. }
  265. static void icp_check_resend(struct kvmppc_xics *xics,
  266. struct kvmppc_icp *icp)
  267. {
  268. u32 icsid;
  269. /* Order this load with the test for need_resend in the caller */
  270. smp_rmb();
  271. for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
  272. struct kvmppc_ics *ics = xics->ics[icsid];
  273. if (!test_and_clear_bit(icsid, icp->resend_map))
  274. continue;
  275. if (!ics)
  276. continue;
  277. ics_check_resend(xics, ics, icp);
  278. }
  279. }
  280. static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
  281. u32 *reject)
  282. {
  283. union kvmppc_icp_state old_state, new_state;
  284. bool success;
  285. XICS_DBG("try deliver %#x(P:%#x) to server %#lx\n", irq, priority,
  286. icp->server_num);
  287. do {
  288. old_state = new_state = READ_ONCE(icp->state);
  289. *reject = 0;
  290. /* See if we can deliver */
  291. success = new_state.cppr > priority &&
  292. new_state.mfrr > priority &&
  293. new_state.pending_pri > priority;
  294. /*
  295. * If we can, check for a rejection and perform the
  296. * delivery
  297. */
  298. if (success) {
  299. *reject = new_state.xisr;
  300. new_state.xisr = irq;
  301. new_state.pending_pri = priority;
  302. } else {
  303. /*
  304. * If we failed to deliver we set need_resend
  305. * so a subsequent CPPR state change causes us
  306. * to try a new delivery.
  307. */
  308. new_state.need_resend = true;
  309. }
  310. } while (!icp_try_update(icp, old_state, new_state, false));
  311. return success;
  312. }
  313. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  314. u32 new_irq, bool check_resend)
  315. {
  316. struct ics_irq_state *state;
  317. struct kvmppc_ics *ics;
  318. u32 reject;
  319. u16 src;
  320. unsigned long flags;
  321. /*
  322. * This is used both for initial delivery of an interrupt and
  323. * for subsequent rejection.
  324. *
  325. * Rejection can be racy vs. resends. We have evaluated the
  326. * rejection in an atomic ICP transaction which is now complete,
  327. * so potentially the ICP can already accept the interrupt again.
  328. *
  329. * So we need to retry the delivery. Essentially the reject path
  330. * boils down to a failed delivery. Always.
  331. *
  332. * Now the interrupt could also have moved to a different target,
  333. * thus we may need to re-do the ICP lookup as well
  334. */
  335. again:
  336. /* Get the ICS state and lock it */
  337. ics = kvmppc_xics_find_ics(xics, new_irq, &src);
  338. if (!ics) {
  339. XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq);
  340. return;
  341. }
  342. state = &ics->irq_state[src];
  343. /* Get a lock on the ICS */
  344. local_irq_save(flags);
  345. arch_spin_lock(&ics->lock);
  346. /* Get our server */
  347. if (!icp || state->server != icp->server_num) {
  348. icp = kvmppc_xics_find_server(xics->kvm, state->server);
  349. if (!icp) {
  350. pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n",
  351. new_irq, state->server);
  352. goto out;
  353. }
  354. }
  355. if (check_resend)
  356. if (!state->resend)
  357. goto out;
  358. /* Clear the resend bit of that interrupt */
  359. state->resend = 0;
  360. /*
  361. * If masked, bail out
  362. *
  363. * Note: PAPR doesn't mention anything about masked pending
  364. * when doing a resend, only when doing a delivery.
  365. *
  366. * However that would have the effect of losing a masked
  367. * interrupt that was rejected and isn't consistent with
  368. * the whole masked_pending business which is about not
  369. * losing interrupts that occur while masked.
  370. *
  371. * I don't differentiate normal deliveries and resends, this
  372. * implementation will differ from PAPR and not lose such
  373. * interrupts.
  374. */
  375. if (state->priority == MASKED) {
  376. XICS_DBG("irq %#x masked pending\n", new_irq);
  377. state->masked_pending = 1;
  378. goto out;
  379. }
  380. /*
  381. * Try the delivery, this will set the need_resend flag
  382. * in the ICP as part of the atomic transaction if the
  383. * delivery is not possible.
  384. *
  385. * Note that if successful, the new delivery might have itself
  386. * rejected an interrupt that was "delivered" before we took the
  387. * ics spin lock.
  388. *
  389. * In this case we do the whole sequence all over again for the
  390. * new guy. We cannot assume that the rejected interrupt is less
  391. * favored than the new one, and thus doesn't need to be delivered,
  392. * because by the time we exit icp_try_to_deliver() the target
  393. * processor may well have alrady consumed & completed it, and thus
  394. * the rejected interrupt might actually be already acceptable.
  395. */
  396. if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) {
  397. /*
  398. * Delivery was successful, did we reject somebody else ?
  399. */
  400. if (reject && reject != XICS_IPI) {
  401. arch_spin_unlock(&ics->lock);
  402. local_irq_restore(flags);
  403. new_irq = reject;
  404. check_resend = 0;
  405. goto again;
  406. }
  407. } else {
  408. /*
  409. * We failed to deliver the interrupt we need to set the
  410. * resend map bit and mark the ICS state as needing a resend
  411. */
  412. state->resend = 1;
  413. /*
  414. * Make sure when checking resend, we don't miss the resend
  415. * if resend_map bit is seen and cleared.
  416. */
  417. smp_wmb();
  418. set_bit(ics->icsid, icp->resend_map);
  419. /*
  420. * If the need_resend flag got cleared in the ICP some time
  421. * between icp_try_to_deliver() atomic update and now, then
  422. * we know it might have missed the resend_map bit. So we
  423. * retry
  424. */
  425. smp_mb();
  426. if (!icp->state.need_resend) {
  427. state->resend = 0;
  428. arch_spin_unlock(&ics->lock);
  429. local_irq_restore(flags);
  430. check_resend = 0;
  431. goto again;
  432. }
  433. }
  434. out:
  435. arch_spin_unlock(&ics->lock);
  436. local_irq_restore(flags);
  437. }
  438. static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  439. u8 new_cppr)
  440. {
  441. union kvmppc_icp_state old_state, new_state;
  442. bool resend;
  443. /*
  444. * This handles several related states in one operation:
  445. *
  446. * ICP State: Down_CPPR
  447. *
  448. * Load CPPR with new value and if the XISR is 0
  449. * then check for resends:
  450. *
  451. * ICP State: Resend
  452. *
  453. * If MFRR is more favored than CPPR, check for IPIs
  454. * and notify ICS of a potential resend. This is done
  455. * asynchronously (when used in real mode, we will have
  456. * to exit here).
  457. *
  458. * We do not handle the complete Check_IPI as documented
  459. * here. In the PAPR, this state will be used for both
  460. * Set_MFRR and Down_CPPR. However, we know that we aren't
  461. * changing the MFRR state here so we don't need to handle
  462. * the case of an MFRR causing a reject of a pending irq,
  463. * this will have been handled when the MFRR was set in the
  464. * first place.
  465. *
  466. * Thus we don't have to handle rejects, only resends.
  467. *
  468. * When implementing real mode for HV KVM, resend will lead to
  469. * a H_TOO_HARD return and the whole transaction will be handled
  470. * in virtual mode.
  471. */
  472. do {
  473. old_state = new_state = READ_ONCE(icp->state);
  474. /* Down_CPPR */
  475. new_state.cppr = new_cppr;
  476. /*
  477. * Cut down Resend / Check_IPI / IPI
  478. *
  479. * The logic is that we cannot have a pending interrupt
  480. * trumped by an IPI at this point (see above), so we
  481. * know that either the pending interrupt is already an
  482. * IPI (in which case we don't care to override it) or
  483. * it's either more favored than us or non existent
  484. */
  485. if (new_state.mfrr < new_cppr &&
  486. new_state.mfrr <= new_state.pending_pri) {
  487. WARN_ON(new_state.xisr != XICS_IPI &&
  488. new_state.xisr != 0);
  489. new_state.pending_pri = new_state.mfrr;
  490. new_state.xisr = XICS_IPI;
  491. }
  492. /* Latch/clear resend bit */
  493. resend = new_state.need_resend;
  494. new_state.need_resend = 0;
  495. } while (!icp_try_update(icp, old_state, new_state, true));
  496. /*
  497. * Now handle resend checks. Those are asynchronous to the ICP
  498. * state update in HW (ie bus transactions) so we can handle them
  499. * separately here too
  500. */
  501. if (resend)
  502. icp_check_resend(xics, icp);
  503. }
  504. static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu)
  505. {
  506. union kvmppc_icp_state old_state, new_state;
  507. struct kvmppc_icp *icp = vcpu->arch.icp;
  508. u32 xirr;
  509. /* First, remove EE from the processor */
  510. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  511. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  512. /*
  513. * ICP State: Accept_Interrupt
  514. *
  515. * Return the pending interrupt (if any) along with the
  516. * current CPPR, then clear the XISR & set CPPR to the
  517. * pending priority
  518. */
  519. do {
  520. old_state = new_state = READ_ONCE(icp->state);
  521. xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
  522. if (!old_state.xisr)
  523. break;
  524. new_state.cppr = new_state.pending_pri;
  525. new_state.pending_pri = 0xff;
  526. new_state.xisr = 0;
  527. } while (!icp_try_update(icp, old_state, new_state, true));
  528. XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr);
  529. return xirr;
  530. }
  531. static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
  532. unsigned long mfrr)
  533. {
  534. union kvmppc_icp_state old_state, new_state;
  535. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  536. struct kvmppc_icp *icp;
  537. u32 reject;
  538. bool resend;
  539. bool local;
  540. XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n",
  541. vcpu->vcpu_id, server, mfrr);
  542. icp = vcpu->arch.icp;
  543. local = icp->server_num == server;
  544. if (!local) {
  545. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  546. if (!icp)
  547. return H_PARAMETER;
  548. }
  549. /*
  550. * ICP state: Set_MFRR
  551. *
  552. * If the CPPR is more favored than the new MFRR, then
  553. * nothing needs to be rejected as there can be no XISR to
  554. * reject. If the MFRR is being made less favored then
  555. * there might be a previously-rejected interrupt needing
  556. * to be resent.
  557. *
  558. * ICP state: Check_IPI
  559. *
  560. * If the CPPR is less favored, then we might be replacing
  561. * an interrupt, and thus need to possibly reject it.
  562. *
  563. * ICP State: IPI
  564. *
  565. * Besides rejecting any pending interrupts, we also
  566. * update XISR and pending_pri to mark IPI as pending.
  567. *
  568. * PAPR does not describe this state, but if the MFRR is being
  569. * made less favored than its earlier value, there might be
  570. * a previously-rejected interrupt needing to be resent.
  571. * Ideally, we would want to resend only if
  572. * prio(pending_interrupt) < mfrr &&
  573. * prio(pending_interrupt) < cppr
  574. * where pending interrupt is the one that was rejected. But
  575. * we don't have that state, so we simply trigger a resend
  576. * whenever the MFRR is made less favored.
  577. */
  578. do {
  579. old_state = new_state = READ_ONCE(icp->state);
  580. /* Set_MFRR */
  581. new_state.mfrr = mfrr;
  582. /* Check_IPI */
  583. reject = 0;
  584. resend = false;
  585. if (mfrr < new_state.cppr) {
  586. /* Reject a pending interrupt if not an IPI */
  587. if (mfrr <= new_state.pending_pri) {
  588. reject = new_state.xisr;
  589. new_state.pending_pri = mfrr;
  590. new_state.xisr = XICS_IPI;
  591. }
  592. }
  593. if (mfrr > old_state.mfrr) {
  594. resend = new_state.need_resend;
  595. new_state.need_resend = 0;
  596. }
  597. } while (!icp_try_update(icp, old_state, new_state, local));
  598. /* Handle reject */
  599. if (reject && reject != XICS_IPI)
  600. icp_deliver_irq(xics, icp, reject, false);
  601. /* Handle resend */
  602. if (resend)
  603. icp_check_resend(xics, icp);
  604. return H_SUCCESS;
  605. }
  606. static int kvmppc_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server)
  607. {
  608. union kvmppc_icp_state state;
  609. struct kvmppc_icp *icp;
  610. icp = vcpu->arch.icp;
  611. if (icp->server_num != server) {
  612. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  613. if (!icp)
  614. return H_PARAMETER;
  615. }
  616. state = READ_ONCE(icp->state);
  617. kvmppc_set_gpr(vcpu, 4, ((u32)state.cppr << 24) | state.xisr);
  618. kvmppc_set_gpr(vcpu, 5, state.mfrr);
  619. return H_SUCCESS;
  620. }
  621. static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
  622. {
  623. union kvmppc_icp_state old_state, new_state;
  624. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  625. struct kvmppc_icp *icp = vcpu->arch.icp;
  626. u32 reject;
  627. XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr);
  628. /*
  629. * ICP State: Set_CPPR
  630. *
  631. * We can safely compare the new value with the current
  632. * value outside of the transaction as the CPPR is only
  633. * ever changed by the processor on itself
  634. */
  635. if (cppr > icp->state.cppr)
  636. icp_down_cppr(xics, icp, cppr);
  637. else if (cppr == icp->state.cppr)
  638. return;
  639. /*
  640. * ICP State: Up_CPPR
  641. *
  642. * The processor is raising its priority, this can result
  643. * in a rejection of a pending interrupt:
  644. *
  645. * ICP State: Reject_Current
  646. *
  647. * We can remove EE from the current processor, the update
  648. * transaction will set it again if needed
  649. */
  650. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  651. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  652. do {
  653. old_state = new_state = READ_ONCE(icp->state);
  654. reject = 0;
  655. new_state.cppr = cppr;
  656. if (cppr <= new_state.pending_pri) {
  657. reject = new_state.xisr;
  658. new_state.xisr = 0;
  659. new_state.pending_pri = 0xff;
  660. }
  661. } while (!icp_try_update(icp, old_state, new_state, true));
  662. /*
  663. * Check for rejects. They are handled by doing a new delivery
  664. * attempt (see comments in icp_deliver_irq).
  665. */
  666. if (reject && reject != XICS_IPI)
  667. icp_deliver_irq(xics, icp, reject, false);
  668. }
  669. static int ics_eoi(struct kvm_vcpu *vcpu, u32 irq)
  670. {
  671. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  672. struct kvmppc_icp *icp = vcpu->arch.icp;
  673. struct kvmppc_ics *ics;
  674. struct ics_irq_state *state;
  675. u16 src;
  676. u32 pq_old, pq_new;
  677. /*
  678. * ICS EOI handling: For LSI, if P bit is still set, we need to
  679. * resend it.
  680. *
  681. * For MSI, we move Q bit into P (and clear Q). If it is set,
  682. * resend it.
  683. */
  684. ics = kvmppc_xics_find_ics(xics, irq, &src);
  685. if (!ics) {
  686. XICS_DBG("ios_eoi: IRQ 0x%06x not found !\n", irq);
  687. return H_PARAMETER;
  688. }
  689. state = &ics->irq_state[src];
  690. if (state->lsi)
  691. pq_new = state->pq_state;
  692. else
  693. do {
  694. pq_old = state->pq_state;
  695. pq_new = pq_old >> 1;
  696. } while (cmpxchg(&state->pq_state, pq_old, pq_new) != pq_old);
  697. if (pq_new & PQ_PRESENTED)
  698. icp_deliver_irq(xics, icp, irq, false);
  699. kvm_notify_acked_irq(vcpu->kvm, 0, irq);
  700. return H_SUCCESS;
  701. }
  702. static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
  703. {
  704. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  705. struct kvmppc_icp *icp = vcpu->arch.icp;
  706. u32 irq = xirr & 0x00ffffff;
  707. XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr);
  708. /*
  709. * ICP State: EOI
  710. *
  711. * Note: If EOI is incorrectly used by SW to lower the CPPR
  712. * value (ie more favored), we do not check for rejection of
  713. * a pending interrupt, this is a SW error and PAPR sepcifies
  714. * that we don't have to deal with it.
  715. *
  716. * The sending of an EOI to the ICS is handled after the
  717. * CPPR update
  718. *
  719. * ICP State: Down_CPPR which we handle
  720. * in a separate function as it's shared with H_CPPR.
  721. */
  722. icp_down_cppr(xics, icp, xirr >> 24);
  723. /* IPIs have no EOI */
  724. if (irq == XICS_IPI)
  725. return H_SUCCESS;
  726. return ics_eoi(vcpu, irq);
  727. }
  728. int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
  729. {
  730. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  731. struct kvmppc_icp *icp = vcpu->arch.icp;
  732. XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n",
  733. hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt);
  734. if (icp->rm_action & XICS_RM_KICK_VCPU) {
  735. icp->n_rm_kick_vcpu++;
  736. kvmppc_fast_vcpu_kick(icp->rm_kick_target);
  737. }
  738. if (icp->rm_action & XICS_RM_CHECK_RESEND) {
  739. icp->n_rm_check_resend++;
  740. icp_check_resend(xics, icp->rm_resend_icp);
  741. }
  742. if (icp->rm_action & XICS_RM_NOTIFY_EOI) {
  743. icp->n_rm_notify_eoi++;
  744. kvm_notify_acked_irq(vcpu->kvm, 0, icp->rm_eoied_irq);
  745. }
  746. icp->rm_action = 0;
  747. return H_SUCCESS;
  748. }
  749. EXPORT_SYMBOL_GPL(kvmppc_xics_rm_complete);
  750. int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
  751. {
  752. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  753. unsigned long res;
  754. int rc = H_SUCCESS;
  755. /* Check if we have an ICP */
  756. if (!xics || !vcpu->arch.icp)
  757. return H_HARDWARE;
  758. /* These requests don't have real-mode implementations at present */
  759. switch (req) {
  760. case H_XIRR_X:
  761. res = kvmppc_h_xirr(vcpu);
  762. kvmppc_set_gpr(vcpu, 4, res);
  763. kvmppc_set_gpr(vcpu, 5, get_tb());
  764. return rc;
  765. case H_IPOLL:
  766. rc = kvmppc_h_ipoll(vcpu, kvmppc_get_gpr(vcpu, 4));
  767. return rc;
  768. }
  769. /* Check for real mode returning too hard */
  770. if (xics->real_mode && is_kvmppc_hv_enabled(vcpu->kvm))
  771. return kvmppc_xics_rm_complete(vcpu, req);
  772. switch (req) {
  773. case H_XIRR:
  774. res = kvmppc_h_xirr(vcpu);
  775. kvmppc_set_gpr(vcpu, 4, res);
  776. break;
  777. case H_CPPR:
  778. kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4));
  779. break;
  780. case H_EOI:
  781. rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4));
  782. break;
  783. case H_IPI:
  784. rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4),
  785. kvmppc_get_gpr(vcpu, 5));
  786. break;
  787. }
  788. return rc;
  789. }
  790. EXPORT_SYMBOL_GPL(kvmppc_xics_hcall);
  791. /* -- Initialisation code etc. -- */
  792. static void xics_debugfs_irqmap(struct seq_file *m,
  793. struct kvmppc_passthru_irqmap *pimap)
  794. {
  795. int i;
  796. if (!pimap)
  797. return;
  798. seq_printf(m, "========\nPIRQ mappings: %d maps\n===========\n",
  799. pimap->n_mapped);
  800. for (i = 0; i < pimap->n_mapped; i++) {
  801. seq_printf(m, "r_hwirq=%x, v_hwirq=%x\n",
  802. pimap->mapped[i].r_hwirq, pimap->mapped[i].v_hwirq);
  803. }
  804. }
  805. static int xics_debug_show(struct seq_file *m, void *private)
  806. {
  807. struct kvmppc_xics *xics = m->private;
  808. struct kvm *kvm = xics->kvm;
  809. struct kvm_vcpu *vcpu;
  810. int icsid, i;
  811. unsigned long flags;
  812. unsigned long t_rm_kick_vcpu, t_rm_check_resend;
  813. unsigned long t_rm_notify_eoi;
  814. unsigned long t_reject, t_check_resend;
  815. if (!kvm)
  816. return 0;
  817. t_rm_kick_vcpu = 0;
  818. t_rm_notify_eoi = 0;
  819. t_rm_check_resend = 0;
  820. t_check_resend = 0;
  821. t_reject = 0;
  822. xics_debugfs_irqmap(m, kvm->arch.pimap);
  823. seq_printf(m, "=========\nICP state\n=========\n");
  824. kvm_for_each_vcpu(i, vcpu, kvm) {
  825. struct kvmppc_icp *icp = vcpu->arch.icp;
  826. union kvmppc_icp_state state;
  827. if (!icp)
  828. continue;
  829. state.raw = READ_ONCE(icp->state.raw);
  830. seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n",
  831. icp->server_num, state.xisr,
  832. state.pending_pri, state.cppr, state.mfrr,
  833. state.out_ee, state.need_resend);
  834. t_rm_kick_vcpu += icp->n_rm_kick_vcpu;
  835. t_rm_notify_eoi += icp->n_rm_notify_eoi;
  836. t_rm_check_resend += icp->n_rm_check_resend;
  837. t_check_resend += icp->n_check_resend;
  838. t_reject += icp->n_reject;
  839. }
  840. seq_printf(m, "ICP Guest->Host totals: kick_vcpu=%lu check_resend=%lu notify_eoi=%lu\n",
  841. t_rm_kick_vcpu, t_rm_check_resend,
  842. t_rm_notify_eoi);
  843. seq_printf(m, "ICP Real Mode totals: check_resend=%lu resend=%lu\n",
  844. t_check_resend, t_reject);
  845. for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) {
  846. struct kvmppc_ics *ics = xics->ics[icsid];
  847. if (!ics)
  848. continue;
  849. seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n",
  850. icsid);
  851. local_irq_save(flags);
  852. arch_spin_lock(&ics->lock);
  853. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  854. struct ics_irq_state *irq = &ics->irq_state[i];
  855. seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x pq_state %d resend %d masked pending %d\n",
  856. irq->number, irq->server, irq->priority,
  857. irq->saved_priority, irq->pq_state,
  858. irq->resend, irq->masked_pending);
  859. }
  860. arch_spin_unlock(&ics->lock);
  861. local_irq_restore(flags);
  862. }
  863. return 0;
  864. }
  865. static int xics_debug_open(struct inode *inode, struct file *file)
  866. {
  867. return single_open(file, xics_debug_show, inode->i_private);
  868. }
  869. static const struct file_operations xics_debug_fops = {
  870. .open = xics_debug_open,
  871. .read = seq_read,
  872. .llseek = seq_lseek,
  873. .release = single_release,
  874. };
  875. static void xics_debugfs_init(struct kvmppc_xics *xics)
  876. {
  877. char *name;
  878. name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics);
  879. if (!name) {
  880. pr_err("%s: no memory for name\n", __func__);
  881. return;
  882. }
  883. xics->dentry = debugfs_create_file(name, 0444, powerpc_debugfs_root,
  884. xics, &xics_debug_fops);
  885. pr_debug("%s: created %s\n", __func__, name);
  886. kfree(name);
  887. }
  888. static struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm,
  889. struct kvmppc_xics *xics, int irq)
  890. {
  891. struct kvmppc_ics *ics;
  892. int i, icsid;
  893. icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
  894. mutex_lock(&kvm->lock);
  895. /* ICS already exists - somebody else got here first */
  896. if (xics->ics[icsid])
  897. goto out;
  898. /* Create the ICS */
  899. ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL);
  900. if (!ics)
  901. goto out;
  902. ics->icsid = icsid;
  903. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  904. ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i;
  905. ics->irq_state[i].priority = MASKED;
  906. ics->irq_state[i].saved_priority = MASKED;
  907. }
  908. smp_wmb();
  909. xics->ics[icsid] = ics;
  910. if (icsid > xics->max_icsid)
  911. xics->max_icsid = icsid;
  912. out:
  913. mutex_unlock(&kvm->lock);
  914. return xics->ics[icsid];
  915. }
  916. static int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num)
  917. {
  918. struct kvmppc_icp *icp;
  919. if (!vcpu->kvm->arch.xics)
  920. return -ENODEV;
  921. if (kvmppc_xics_find_server(vcpu->kvm, server_num))
  922. return -EEXIST;
  923. icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL);
  924. if (!icp)
  925. return -ENOMEM;
  926. icp->vcpu = vcpu;
  927. icp->server_num = server_num;
  928. icp->state.mfrr = MASKED;
  929. icp->state.pending_pri = MASKED;
  930. vcpu->arch.icp = icp;
  931. XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id);
  932. return 0;
  933. }
  934. u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu)
  935. {
  936. struct kvmppc_icp *icp = vcpu->arch.icp;
  937. union kvmppc_icp_state state;
  938. if (!icp)
  939. return 0;
  940. state = icp->state;
  941. return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) |
  942. ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) |
  943. ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
  944. ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT);
  945. }
  946. int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval)
  947. {
  948. struct kvmppc_icp *icp = vcpu->arch.icp;
  949. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  950. union kvmppc_icp_state old_state, new_state;
  951. struct kvmppc_ics *ics;
  952. u8 cppr, mfrr, pending_pri;
  953. u32 xisr;
  954. u16 src;
  955. bool resend;
  956. if (!icp || !xics)
  957. return -ENOENT;
  958. cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT;
  959. xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) &
  960. KVM_REG_PPC_ICP_XISR_MASK;
  961. mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT;
  962. pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT;
  963. /* Require the new state to be internally consistent */
  964. if (xisr == 0) {
  965. if (pending_pri != 0xff)
  966. return -EINVAL;
  967. } else if (xisr == XICS_IPI) {
  968. if (pending_pri != mfrr || pending_pri >= cppr)
  969. return -EINVAL;
  970. } else {
  971. if (pending_pri >= mfrr || pending_pri >= cppr)
  972. return -EINVAL;
  973. ics = kvmppc_xics_find_ics(xics, xisr, &src);
  974. if (!ics)
  975. return -EINVAL;
  976. }
  977. new_state.raw = 0;
  978. new_state.cppr = cppr;
  979. new_state.xisr = xisr;
  980. new_state.mfrr = mfrr;
  981. new_state.pending_pri = pending_pri;
  982. /*
  983. * Deassert the CPU interrupt request.
  984. * icp_try_update will reassert it if necessary.
  985. */
  986. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  987. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  988. /*
  989. * Note that if we displace an interrupt from old_state.xisr,
  990. * we don't mark it as rejected. We expect userspace to set
  991. * the state of the interrupt sources to be consistent with
  992. * the ICP states (either before or afterwards, which doesn't
  993. * matter). We do handle resends due to CPPR becoming less
  994. * favoured because that is necessary to end up with a
  995. * consistent state in the situation where userspace restores
  996. * the ICS states before the ICP states.
  997. */
  998. do {
  999. old_state = READ_ONCE(icp->state);
  1000. if (new_state.mfrr <= old_state.mfrr) {
  1001. resend = false;
  1002. new_state.need_resend = old_state.need_resend;
  1003. } else {
  1004. resend = old_state.need_resend;
  1005. new_state.need_resend = 0;
  1006. }
  1007. } while (!icp_try_update(icp, old_state, new_state, false));
  1008. if (resend)
  1009. icp_check_resend(xics, icp);
  1010. return 0;
  1011. }
  1012. static int xics_get_source(struct kvmppc_xics *xics, long irq, u64 addr)
  1013. {
  1014. int ret;
  1015. struct kvmppc_ics *ics;
  1016. struct ics_irq_state *irqp;
  1017. u64 __user *ubufp = (u64 __user *) addr;
  1018. u16 idx;
  1019. u64 val, prio;
  1020. unsigned long flags;
  1021. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1022. if (!ics)
  1023. return -ENOENT;
  1024. irqp = &ics->irq_state[idx];
  1025. local_irq_save(flags);
  1026. arch_spin_lock(&ics->lock);
  1027. ret = -ENOENT;
  1028. if (irqp->exists) {
  1029. val = irqp->server;
  1030. prio = irqp->priority;
  1031. if (prio == MASKED) {
  1032. val |= KVM_XICS_MASKED;
  1033. prio = irqp->saved_priority;
  1034. }
  1035. val |= prio << KVM_XICS_PRIORITY_SHIFT;
  1036. if (irqp->lsi) {
  1037. val |= KVM_XICS_LEVEL_SENSITIVE;
  1038. if (irqp->pq_state & PQ_PRESENTED)
  1039. val |= KVM_XICS_PENDING;
  1040. } else if (irqp->masked_pending || irqp->resend)
  1041. val |= KVM_XICS_PENDING;
  1042. if (irqp->pq_state & PQ_PRESENTED)
  1043. val |= KVM_XICS_PRESENTED;
  1044. if (irqp->pq_state & PQ_QUEUED)
  1045. val |= KVM_XICS_QUEUED;
  1046. ret = 0;
  1047. }
  1048. arch_spin_unlock(&ics->lock);
  1049. local_irq_restore(flags);
  1050. if (!ret && put_user(val, ubufp))
  1051. ret = -EFAULT;
  1052. return ret;
  1053. }
  1054. static int xics_set_source(struct kvmppc_xics *xics, long irq, u64 addr)
  1055. {
  1056. struct kvmppc_ics *ics;
  1057. struct ics_irq_state *irqp;
  1058. u64 __user *ubufp = (u64 __user *) addr;
  1059. u16 idx;
  1060. u64 val;
  1061. u8 prio;
  1062. u32 server;
  1063. unsigned long flags;
  1064. if (irq < KVMPPC_XICS_FIRST_IRQ || irq >= KVMPPC_XICS_NR_IRQS)
  1065. return -ENOENT;
  1066. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1067. if (!ics) {
  1068. ics = kvmppc_xics_create_ics(xics->kvm, xics, irq);
  1069. if (!ics)
  1070. return -ENOMEM;
  1071. }
  1072. irqp = &ics->irq_state[idx];
  1073. if (get_user(val, ubufp))
  1074. return -EFAULT;
  1075. server = val & KVM_XICS_DESTINATION_MASK;
  1076. prio = val >> KVM_XICS_PRIORITY_SHIFT;
  1077. if (prio != MASKED &&
  1078. kvmppc_xics_find_server(xics->kvm, server) == NULL)
  1079. return -EINVAL;
  1080. local_irq_save(flags);
  1081. arch_spin_lock(&ics->lock);
  1082. irqp->server = server;
  1083. irqp->saved_priority = prio;
  1084. if (val & KVM_XICS_MASKED)
  1085. prio = MASKED;
  1086. irqp->priority = prio;
  1087. irqp->resend = 0;
  1088. irqp->masked_pending = 0;
  1089. irqp->lsi = 0;
  1090. irqp->pq_state = 0;
  1091. if (val & KVM_XICS_LEVEL_SENSITIVE)
  1092. irqp->lsi = 1;
  1093. /* If PENDING, set P in case P is not saved because of old code */
  1094. if (val & KVM_XICS_PRESENTED || val & KVM_XICS_PENDING)
  1095. irqp->pq_state |= PQ_PRESENTED;
  1096. if (val & KVM_XICS_QUEUED)
  1097. irqp->pq_state |= PQ_QUEUED;
  1098. irqp->exists = 1;
  1099. arch_spin_unlock(&ics->lock);
  1100. local_irq_restore(flags);
  1101. if (val & KVM_XICS_PENDING)
  1102. icp_deliver_irq(xics, NULL, irqp->number, false);
  1103. return 0;
  1104. }
  1105. int kvmppc_xics_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
  1106. bool line_status)
  1107. {
  1108. struct kvmppc_xics *xics = kvm->arch.xics;
  1109. if (!xics)
  1110. return -ENODEV;
  1111. return ics_deliver_irq(xics, irq, level);
  1112. }
  1113. static int xics_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1114. {
  1115. struct kvmppc_xics *xics = dev->private;
  1116. switch (attr->group) {
  1117. case KVM_DEV_XICS_GRP_SOURCES:
  1118. return xics_set_source(xics, attr->attr, attr->addr);
  1119. }
  1120. return -ENXIO;
  1121. }
  1122. static int xics_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1123. {
  1124. struct kvmppc_xics *xics = dev->private;
  1125. switch (attr->group) {
  1126. case KVM_DEV_XICS_GRP_SOURCES:
  1127. return xics_get_source(xics, attr->attr, attr->addr);
  1128. }
  1129. return -ENXIO;
  1130. }
  1131. static int xics_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1132. {
  1133. switch (attr->group) {
  1134. case KVM_DEV_XICS_GRP_SOURCES:
  1135. if (attr->attr >= KVMPPC_XICS_FIRST_IRQ &&
  1136. attr->attr < KVMPPC_XICS_NR_IRQS)
  1137. return 0;
  1138. break;
  1139. }
  1140. return -ENXIO;
  1141. }
  1142. static void kvmppc_xics_free(struct kvm_device *dev)
  1143. {
  1144. struct kvmppc_xics *xics = dev->private;
  1145. int i;
  1146. struct kvm *kvm = xics->kvm;
  1147. debugfs_remove(xics->dentry);
  1148. if (kvm)
  1149. kvm->arch.xics = NULL;
  1150. for (i = 0; i <= xics->max_icsid; i++)
  1151. kfree(xics->ics[i]);
  1152. kfree(xics);
  1153. kfree(dev);
  1154. }
  1155. static int kvmppc_xics_create(struct kvm_device *dev, u32 type)
  1156. {
  1157. struct kvmppc_xics *xics;
  1158. struct kvm *kvm = dev->kvm;
  1159. int ret = 0;
  1160. xics = kzalloc(sizeof(*xics), GFP_KERNEL);
  1161. if (!xics)
  1162. return -ENOMEM;
  1163. dev->private = xics;
  1164. xics->dev = dev;
  1165. xics->kvm = kvm;
  1166. /* Already there ? */
  1167. if (kvm->arch.xics)
  1168. ret = -EEXIST;
  1169. else
  1170. kvm->arch.xics = xics;
  1171. if (ret) {
  1172. kfree(xics);
  1173. return ret;
  1174. }
  1175. #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
  1176. if (cpu_has_feature(CPU_FTR_ARCH_206)) {
  1177. /* Enable real mode support */
  1178. xics->real_mode = ENABLE_REALMODE;
  1179. xics->real_mode_dbg = DEBUG_REALMODE;
  1180. }
  1181. #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
  1182. return 0;
  1183. }
  1184. static void kvmppc_xics_init(struct kvm_device *dev)
  1185. {
  1186. struct kvmppc_xics *xics = (struct kvmppc_xics *)dev->private;
  1187. xics_debugfs_init(xics);
  1188. }
  1189. struct kvm_device_ops kvm_xics_ops = {
  1190. .name = "kvm-xics",
  1191. .create = kvmppc_xics_create,
  1192. .init = kvmppc_xics_init,
  1193. .destroy = kvmppc_xics_free,
  1194. .set_attr = xics_set_attr,
  1195. .get_attr = xics_get_attr,
  1196. .has_attr = xics_has_attr,
  1197. };
  1198. int kvmppc_xics_connect_vcpu(struct kvm_device *dev, struct kvm_vcpu *vcpu,
  1199. u32 xcpu)
  1200. {
  1201. struct kvmppc_xics *xics = dev->private;
  1202. int r = -EBUSY;
  1203. if (dev->ops != &kvm_xics_ops)
  1204. return -EPERM;
  1205. if (xics->kvm != vcpu->kvm)
  1206. return -EPERM;
  1207. if (vcpu->arch.irq_type)
  1208. return -EBUSY;
  1209. r = kvmppc_xics_create_icp(vcpu, xcpu);
  1210. if (!r)
  1211. vcpu->arch.irq_type = KVMPPC_IRQ_XICS;
  1212. return r;
  1213. }
  1214. void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu)
  1215. {
  1216. if (!vcpu->arch.icp)
  1217. return;
  1218. kfree(vcpu->arch.icp);
  1219. vcpu->arch.icp = NULL;
  1220. vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
  1221. }
  1222. void kvmppc_xics_set_mapped(struct kvm *kvm, unsigned long irq,
  1223. unsigned long host_irq)
  1224. {
  1225. struct kvmppc_xics *xics = kvm->arch.xics;
  1226. struct kvmppc_ics *ics;
  1227. u16 idx;
  1228. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1229. if (!ics)
  1230. return;
  1231. ics->irq_state[idx].host_irq = host_irq;
  1232. ics->irq_state[idx].intr_cpu = -1;
  1233. }
  1234. EXPORT_SYMBOL_GPL(kvmppc_xics_set_mapped);
  1235. void kvmppc_xics_clr_mapped(struct kvm *kvm, unsigned long irq,
  1236. unsigned long host_irq)
  1237. {
  1238. struct kvmppc_xics *xics = kvm->arch.xics;
  1239. struct kvmppc_ics *ics;
  1240. u16 idx;
  1241. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1242. if (!ics)
  1243. return;
  1244. ics->irq_state[idx].host_irq = 0;
  1245. }
  1246. EXPORT_SYMBOL_GPL(kvmppc_xics_clr_mapped);