msi.c 7.2 KB

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  1. /*
  2. * Adding PCI-E MSI support for PPC4XX SoCs.
  3. *
  4. * Copyright (c) 2010, Applied Micro Circuits Corporation
  5. * Authors: Tirumala R Marri <tmarri@apm.com>
  6. * Feng Kan <fkan@apm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <linux/irq.h>
  24. #include <linux/pci.h>
  25. #include <linux/msi.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/export.h>
  29. #include <linux/kernel.h>
  30. #include <asm/prom.h>
  31. #include <asm/hw_irq.h>
  32. #include <asm/ppc-pci.h>
  33. #include <asm/dcr.h>
  34. #include <asm/dcr-regs.h>
  35. #include <asm/msi_bitmap.h>
  36. #define PEIH_TERMADH 0x00
  37. #define PEIH_TERMADL 0x08
  38. #define PEIH_MSIED 0x10
  39. #define PEIH_MSIMK 0x18
  40. #define PEIH_MSIASS 0x20
  41. #define PEIH_FLUSH0 0x30
  42. #define PEIH_FLUSH1 0x38
  43. #define PEIH_CNTRST 0x48
  44. static int msi_irqs;
  45. struct ppc4xx_msi {
  46. u32 msi_addr_lo;
  47. u32 msi_addr_hi;
  48. void __iomem *msi_regs;
  49. int *msi_virqs;
  50. struct msi_bitmap bitmap;
  51. struct device_node *msi_dev;
  52. };
  53. static struct ppc4xx_msi ppc4xx_msi;
  54. static int ppc4xx_msi_init_allocator(struct platform_device *dev,
  55. struct ppc4xx_msi *msi_data)
  56. {
  57. int err;
  58. err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
  59. dev->dev.of_node);
  60. if (err)
  61. return err;
  62. err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
  63. if (err < 0) {
  64. msi_bitmap_free(&msi_data->bitmap);
  65. return err;
  66. }
  67. return 0;
  68. }
  69. static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  70. {
  71. int int_no = -ENOMEM;
  72. unsigned int virq;
  73. struct msi_msg msg;
  74. struct msi_desc *entry;
  75. struct ppc4xx_msi *msi_data = &ppc4xx_msi;
  76. dev_dbg(&dev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
  77. __func__, nvec, type);
  78. if (type == PCI_CAP_ID_MSIX)
  79. pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
  80. msi_data->msi_virqs = kmalloc_array(msi_irqs, sizeof(int), GFP_KERNEL);
  81. if (!msi_data->msi_virqs)
  82. return -ENOMEM;
  83. for_each_pci_msi_entry(entry, dev) {
  84. int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
  85. if (int_no >= 0)
  86. break;
  87. if (int_no < 0) {
  88. pr_debug("%s: fail allocating msi interrupt\n",
  89. __func__);
  90. }
  91. virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
  92. if (!virq) {
  93. dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
  94. msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
  95. return -ENOSPC;
  96. }
  97. dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
  98. /* Setup msi address space */
  99. msg.address_hi = msi_data->msi_addr_hi;
  100. msg.address_lo = msi_data->msi_addr_lo;
  101. irq_set_msi_desc(virq, entry);
  102. msg.data = int_no;
  103. pci_write_msi_msg(virq, &msg);
  104. }
  105. return 0;
  106. }
  107. void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
  108. {
  109. struct msi_desc *entry;
  110. struct ppc4xx_msi *msi_data = &ppc4xx_msi;
  111. irq_hw_number_t hwirq;
  112. dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
  113. for_each_pci_msi_entry(entry, dev) {
  114. if (!entry->irq)
  115. continue;
  116. hwirq = virq_to_hw(entry->irq);
  117. irq_set_msi_desc(entry->irq, NULL);
  118. irq_dispose_mapping(entry->irq);
  119. msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
  120. }
  121. }
  122. static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
  123. struct resource res, struct ppc4xx_msi *msi)
  124. {
  125. const u32 *msi_data;
  126. const u32 *msi_mask;
  127. const u32 *sdr_addr;
  128. dma_addr_t msi_phys;
  129. void *msi_virt;
  130. int err;
  131. sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
  132. if (!sdr_addr)
  133. return -EINVAL;
  134. msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
  135. if (!msi_data)
  136. return -EINVAL;
  137. msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
  138. if (!msi_mask)
  139. return -EINVAL;
  140. msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
  141. if (!msi->msi_dev)
  142. return -ENODEV;
  143. msi->msi_regs = of_iomap(msi->msi_dev, 0);
  144. if (!msi->msi_regs) {
  145. dev_err(&dev->dev, "of_iomap failed\n");
  146. err = -ENOMEM;
  147. goto node_put;
  148. }
  149. dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
  150. (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
  151. msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
  152. if (!msi_virt) {
  153. err = -ENOMEM;
  154. goto iounmap;
  155. }
  156. msi->msi_addr_hi = upper_32_bits(msi_phys);
  157. msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff);
  158. dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
  159. msi->msi_addr_hi, msi->msi_addr_lo);
  160. mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
  161. mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
  162. /* Progam the Interrupt handler Termination addr registers */
  163. out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
  164. out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
  165. /* Program MSI Expected data and Mask bits */
  166. out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
  167. out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
  168. dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
  169. return 0;
  170. iounmap:
  171. iounmap(msi->msi_regs);
  172. node_put:
  173. of_node_put(msi->msi_dev);
  174. return err;
  175. }
  176. static int ppc4xx_of_msi_remove(struct platform_device *dev)
  177. {
  178. struct ppc4xx_msi *msi = dev->dev.platform_data;
  179. int i;
  180. int virq;
  181. for (i = 0; i < msi_irqs; i++) {
  182. virq = msi->msi_virqs[i];
  183. if (virq)
  184. irq_dispose_mapping(virq);
  185. }
  186. if (msi->bitmap.bitmap)
  187. msi_bitmap_free(&msi->bitmap);
  188. iounmap(msi->msi_regs);
  189. of_node_put(msi->msi_dev);
  190. return 0;
  191. }
  192. static int ppc4xx_msi_probe(struct platform_device *dev)
  193. {
  194. struct ppc4xx_msi *msi;
  195. struct resource res;
  196. int err = 0;
  197. struct pci_controller *phb;
  198. dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
  199. msi = devm_kzalloc(&dev->dev, sizeof(*msi), GFP_KERNEL);
  200. if (!msi)
  201. return -ENOMEM;
  202. dev->dev.platform_data = msi;
  203. /* Get MSI ranges */
  204. err = of_address_to_resource(dev->dev.of_node, 0, &res);
  205. if (err) {
  206. dev_err(&dev->dev, "%pOF resource error!\n", dev->dev.of_node);
  207. return err;
  208. }
  209. msi_irqs = of_irq_count(dev->dev.of_node);
  210. if (!msi_irqs)
  211. return -ENODEV;
  212. err = ppc4xx_setup_pcieh_hw(dev, res, msi);
  213. if (err)
  214. return err;
  215. err = ppc4xx_msi_init_allocator(dev, msi);
  216. if (err) {
  217. dev_err(&dev->dev, "Error allocating MSI bitmap\n");
  218. goto error_out;
  219. }
  220. ppc4xx_msi = *msi;
  221. list_for_each_entry(phb, &hose_list, list_node) {
  222. phb->controller_ops.setup_msi_irqs = ppc4xx_setup_msi_irqs;
  223. phb->controller_ops.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
  224. }
  225. return 0;
  226. error_out:
  227. ppc4xx_of_msi_remove(dev);
  228. return err;
  229. }
  230. static const struct of_device_id ppc4xx_msi_ids[] = {
  231. {
  232. .compatible = "amcc,ppc4xx-msi",
  233. },
  234. {}
  235. };
  236. static struct platform_driver ppc4xx_msi_driver = {
  237. .probe = ppc4xx_msi_probe,
  238. .remove = ppc4xx_of_msi_remove,
  239. .driver = {
  240. .name = "ppc4xx-msi",
  241. .of_match_table = ppc4xx_msi_ids,
  242. },
  243. };
  244. static __init int ppc4xx_msi_init(void)
  245. {
  246. return platform_driver_register(&ppc4xx_msi_driver);
  247. }
  248. subsys_initcall(ppc4xx_msi_init);