opal-lpc.c 10 KB

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  1. /*
  2. * PowerNV LPC bus handling.
  3. *
  4. * Copyright 2013 IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/of.h>
  13. #include <linux/bug.h>
  14. #include <linux/io.h>
  15. #include <linux/slab.h>
  16. #include <asm/machdep.h>
  17. #include <asm/firmware.h>
  18. #include <asm/opal.h>
  19. #include <asm/prom.h>
  20. #include <linux/uaccess.h>
  21. #include <asm/debugfs.h>
  22. #include <asm/isa-bridge.h>
  23. static int opal_lpc_chip_id = -1;
  24. static u8 opal_lpc_inb(unsigned long port)
  25. {
  26. int64_t rc;
  27. __be32 data;
  28. if (opal_lpc_chip_id < 0 || port > 0xffff)
  29. return 0xff;
  30. rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1);
  31. return rc ? 0xff : be32_to_cpu(data);
  32. }
  33. static __le16 __opal_lpc_inw(unsigned long port)
  34. {
  35. int64_t rc;
  36. __be32 data;
  37. if (opal_lpc_chip_id < 0 || port > 0xfffe)
  38. return 0xffff;
  39. if (port & 1)
  40. return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1);
  41. rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2);
  42. return rc ? 0xffff : be32_to_cpu(data);
  43. }
  44. static u16 opal_lpc_inw(unsigned long port)
  45. {
  46. return le16_to_cpu(__opal_lpc_inw(port));
  47. }
  48. static __le32 __opal_lpc_inl(unsigned long port)
  49. {
  50. int64_t rc;
  51. __be32 data;
  52. if (opal_lpc_chip_id < 0 || port > 0xfffc)
  53. return 0xffffffff;
  54. if (port & 3)
  55. return (__le32)opal_lpc_inb(port ) << 24 |
  56. (__le32)opal_lpc_inb(port + 1) << 16 |
  57. (__le32)opal_lpc_inb(port + 2) << 8 |
  58. opal_lpc_inb(port + 3);
  59. rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4);
  60. return rc ? 0xffffffff : be32_to_cpu(data);
  61. }
  62. static u32 opal_lpc_inl(unsigned long port)
  63. {
  64. return le32_to_cpu(__opal_lpc_inl(port));
  65. }
  66. static void opal_lpc_outb(u8 val, unsigned long port)
  67. {
  68. if (opal_lpc_chip_id < 0 || port > 0xffff)
  69. return;
  70. opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1);
  71. }
  72. static void __opal_lpc_outw(__le16 val, unsigned long port)
  73. {
  74. if (opal_lpc_chip_id < 0 || port > 0xfffe)
  75. return;
  76. if (port & 1) {
  77. opal_lpc_outb(val >> 8, port);
  78. opal_lpc_outb(val , port + 1);
  79. return;
  80. }
  81. opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2);
  82. }
  83. static void opal_lpc_outw(u16 val, unsigned long port)
  84. {
  85. __opal_lpc_outw(cpu_to_le16(val), port);
  86. }
  87. static void __opal_lpc_outl(__le32 val, unsigned long port)
  88. {
  89. if (opal_lpc_chip_id < 0 || port > 0xfffc)
  90. return;
  91. if (port & 3) {
  92. opal_lpc_outb(val >> 24, port);
  93. opal_lpc_outb(val >> 16, port + 1);
  94. opal_lpc_outb(val >> 8, port + 2);
  95. opal_lpc_outb(val , port + 3);
  96. return;
  97. }
  98. opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4);
  99. }
  100. static void opal_lpc_outl(u32 val, unsigned long port)
  101. {
  102. __opal_lpc_outl(cpu_to_le32(val), port);
  103. }
  104. static void opal_lpc_insb(unsigned long p, void *b, unsigned long c)
  105. {
  106. u8 *ptr = b;
  107. while(c--)
  108. *(ptr++) = opal_lpc_inb(p);
  109. }
  110. static void opal_lpc_insw(unsigned long p, void *b, unsigned long c)
  111. {
  112. __le16 *ptr = b;
  113. while(c--)
  114. *(ptr++) = __opal_lpc_inw(p);
  115. }
  116. static void opal_lpc_insl(unsigned long p, void *b, unsigned long c)
  117. {
  118. __le32 *ptr = b;
  119. while(c--)
  120. *(ptr++) = __opal_lpc_inl(p);
  121. }
  122. static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c)
  123. {
  124. const u8 *ptr = b;
  125. while(c--)
  126. opal_lpc_outb(*(ptr++), p);
  127. }
  128. static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c)
  129. {
  130. const __le16 *ptr = b;
  131. while(c--)
  132. __opal_lpc_outw(*(ptr++), p);
  133. }
  134. static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c)
  135. {
  136. const __le32 *ptr = b;
  137. while(c--)
  138. __opal_lpc_outl(*(ptr++), p);
  139. }
  140. static const struct ppc_pci_io opal_lpc_io = {
  141. .inb = opal_lpc_inb,
  142. .inw = opal_lpc_inw,
  143. .inl = opal_lpc_inl,
  144. .outb = opal_lpc_outb,
  145. .outw = opal_lpc_outw,
  146. .outl = opal_lpc_outl,
  147. .insb = opal_lpc_insb,
  148. .insw = opal_lpc_insw,
  149. .insl = opal_lpc_insl,
  150. .outsb = opal_lpc_outsb,
  151. .outsw = opal_lpc_outsw,
  152. .outsl = opal_lpc_outsl,
  153. };
  154. #ifdef CONFIG_DEBUG_FS
  155. struct lpc_debugfs_entry {
  156. enum OpalLPCAddressType lpc_type;
  157. };
  158. static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
  159. size_t count, loff_t *ppos)
  160. {
  161. struct lpc_debugfs_entry *lpc = filp->private_data;
  162. u32 data, pos, len, todo;
  163. int rc;
  164. if (!access_ok(VERIFY_WRITE, ubuf, count))
  165. return -EFAULT;
  166. todo = count;
  167. while (todo) {
  168. pos = *ppos;
  169. /*
  170. * Select access size based on count and alignment and
  171. * access type. IO and MEM only support byte acceses,
  172. * FW supports all 3.
  173. */
  174. len = 1;
  175. if (lpc->lpc_type == OPAL_LPC_FW) {
  176. if (todo > 3 && (pos & 3) == 0)
  177. len = 4;
  178. else if (todo > 1 && (pos & 1) == 0)
  179. len = 2;
  180. }
  181. rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
  182. &data, len);
  183. if (rc)
  184. return -ENXIO;
  185. /*
  186. * Now there is some trickery with the data returned by OPAL
  187. * as it's the desired data right justified in a 32-bit BE
  188. * word.
  189. *
  190. * This is a very bad interface and I'm to blame for it :-(
  191. *
  192. * So we can't just apply a 32-bit swap to what comes from OPAL,
  193. * because user space expects the *bytes* to be in their proper
  194. * respective positions (ie, LPC position).
  195. *
  196. * So what we really want to do here is to shift data right
  197. * appropriately on a LE kernel.
  198. *
  199. * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
  200. * order, we have in memory written to by OPAL at the "data"
  201. * pointer:
  202. *
  203. * Bytes: OPAL "data" LE "data"
  204. * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0
  205. * 16-bit: B0 B1 0000B0B1 B1B00000
  206. * 8-bit: B0 000000B0 B0000000
  207. *
  208. * So a BE kernel will have the leftmost of the above in the MSB
  209. * and rightmost in the LSB and can just then "cast" the u32 "data"
  210. * down to the appropriate quantity and write it.
  211. *
  212. * However, an LE kernel can't. It doesn't need to swap because a
  213. * load from data followed by a store to user are going to preserve
  214. * the byte ordering which is the wire byte order which is what the
  215. * user wants, but in order to "crop" to the right size, we need to
  216. * shift right first.
  217. */
  218. switch(len) {
  219. case 4:
  220. rc = __put_user((u32)data, (u32 __user *)ubuf);
  221. break;
  222. case 2:
  223. #ifdef __LITTLE_ENDIAN__
  224. data >>= 16;
  225. #endif
  226. rc = __put_user((u16)data, (u16 __user *)ubuf);
  227. break;
  228. default:
  229. #ifdef __LITTLE_ENDIAN__
  230. data >>= 24;
  231. #endif
  232. rc = __put_user((u8)data, (u8 __user *)ubuf);
  233. break;
  234. }
  235. if (rc)
  236. return -EFAULT;
  237. *ppos += len;
  238. ubuf += len;
  239. todo -= len;
  240. }
  241. return count;
  242. }
  243. static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
  244. size_t count, loff_t *ppos)
  245. {
  246. struct lpc_debugfs_entry *lpc = filp->private_data;
  247. u32 data, pos, len, todo;
  248. int rc;
  249. if (!access_ok(VERIFY_READ, ubuf, count))
  250. return -EFAULT;
  251. todo = count;
  252. while (todo) {
  253. pos = *ppos;
  254. /*
  255. * Select access size based on count and alignment and
  256. * access type. IO and MEM only support byte acceses,
  257. * FW supports all 3.
  258. */
  259. len = 1;
  260. if (lpc->lpc_type == OPAL_LPC_FW) {
  261. if (todo > 3 && (pos & 3) == 0)
  262. len = 4;
  263. else if (todo > 1 && (pos & 1) == 0)
  264. len = 2;
  265. }
  266. /*
  267. * Similarly to the read case, we have some trickery here but
  268. * it's different to handle. We need to pass the value to OPAL in
  269. * a register whose layout depends on the access size. We want
  270. * to reproduce the memory layout of the user, however we aren't
  271. * doing a load from user and a store to another memory location
  272. * which would achieve that. Here we pass the value to OPAL via
  273. * a register which is expected to contain the "BE" interpretation
  274. * of the byte sequence. IE: for a 32-bit access, byte 0 should be
  275. * in the MSB. So here we *do* need to byteswap on LE.
  276. *
  277. * User bytes: LE "data" OPAL "data"
  278. * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3
  279. * 16-bit: B0 B1 0000B1B0 0000B0B1
  280. * 8-bit: B0 000000B0 000000B0
  281. */
  282. switch(len) {
  283. case 4:
  284. rc = __get_user(data, (u32 __user *)ubuf);
  285. data = cpu_to_be32(data);
  286. break;
  287. case 2:
  288. rc = __get_user(data, (u16 __user *)ubuf);
  289. data = cpu_to_be16(data);
  290. break;
  291. default:
  292. rc = __get_user(data, (u8 __user *)ubuf);
  293. break;
  294. }
  295. if (rc)
  296. return -EFAULT;
  297. rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos,
  298. data, len);
  299. if (rc)
  300. return -ENXIO;
  301. *ppos += len;
  302. ubuf += len;
  303. todo -= len;
  304. }
  305. return count;
  306. }
  307. static const struct file_operations lpc_fops = {
  308. .read = lpc_debug_read,
  309. .write = lpc_debug_write,
  310. .open = simple_open,
  311. .llseek = default_llseek,
  312. };
  313. static int opal_lpc_debugfs_create_type(struct dentry *folder,
  314. const char *fname,
  315. enum OpalLPCAddressType type)
  316. {
  317. struct lpc_debugfs_entry *entry;
  318. entry = kzalloc(sizeof(*entry), GFP_KERNEL);
  319. if (!entry)
  320. return -ENOMEM;
  321. entry->lpc_type = type;
  322. debugfs_create_file(fname, 0600, folder, entry, &lpc_fops);
  323. return 0;
  324. }
  325. static int opal_lpc_init_debugfs(void)
  326. {
  327. struct dentry *root;
  328. int rc = 0;
  329. if (opal_lpc_chip_id < 0)
  330. return -ENODEV;
  331. root = debugfs_create_dir("lpc", powerpc_debugfs_root);
  332. rc |= opal_lpc_debugfs_create_type(root, "io", OPAL_LPC_IO);
  333. rc |= opal_lpc_debugfs_create_type(root, "mem", OPAL_LPC_MEM);
  334. rc |= opal_lpc_debugfs_create_type(root, "fw", OPAL_LPC_FW);
  335. return rc;
  336. }
  337. machine_device_initcall(powernv, opal_lpc_init_debugfs);
  338. #endif /* CONFIG_DEBUG_FS */
  339. void __init opal_lpc_init(void)
  340. {
  341. struct device_node *np;
  342. /*
  343. * Look for a Power8 LPC bus tagged as "primary",
  344. * we currently support only one though the OPAL APIs
  345. * support any number.
  346. */
  347. for_each_compatible_node(np, NULL, "ibm,power8-lpc") {
  348. if (!of_device_is_available(np))
  349. continue;
  350. if (!of_get_property(np, "primary", NULL))
  351. continue;
  352. opal_lpc_chip_id = of_get_ibm_chip_id(np);
  353. break;
  354. }
  355. if (opal_lpc_chip_id < 0)
  356. return;
  357. /* Does it support direct mapping ? */
  358. if (of_get_property(np, "ranges", NULL)) {
  359. pr_info("OPAL: Found memory mapped LPC bus on chip %d\n",
  360. opal_lpc_chip_id);
  361. isa_bridge_init_non_pci(np);
  362. } else {
  363. pr_info("OPAL: Found non-mapped LPC bus on chip %d\n",
  364. opal_lpc_chip_id);
  365. /* Setup special IO ops */
  366. ppc_pci_io = opal_lpc_io;
  367. isa_io_special = true;
  368. }
  369. }