sha256_ssse3_glue.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432
  1. /*
  2. * Cryptographic API.
  3. *
  4. * Glue code for the SHA256 Secure Hash Algorithm assembler
  5. * implementation using supplemental SSE3 / AVX / AVX2 instructions.
  6. *
  7. * This file is based on sha256_generic.c
  8. *
  9. * Copyright (C) 2013 Intel Corporation.
  10. *
  11. * Author:
  12. * Tim Chen <tim.c.chen@linux.intel.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License as published by the Free
  16. * Software Foundation; either version 2 of the License, or (at your option)
  17. * any later version.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  20. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  22. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  23. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  24. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  25. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  26. * SOFTWARE.
  27. */
  28. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29. #include <crypto/internal/hash.h>
  30. #include <linux/init.h>
  31. #include <linux/module.h>
  32. #include <linux/mm.h>
  33. #include <linux/cryptohash.h>
  34. #include <linux/types.h>
  35. #include <crypto/sha.h>
  36. #include <crypto/sha256_base.h>
  37. #include <asm/fpu/api.h>
  38. #include <linux/string.h>
  39. asmlinkage void sha256_transform_ssse3(u32 *digest, const char *data,
  40. u64 rounds);
  41. typedef void (sha256_transform_fn)(u32 *digest, const char *data, u64 rounds);
  42. static int sha256_update(struct shash_desc *desc, const u8 *data,
  43. unsigned int len, sha256_transform_fn *sha256_xform)
  44. {
  45. struct sha256_state *sctx = shash_desc_ctx(desc);
  46. if (!irq_fpu_usable() ||
  47. (sctx->count % SHA256_BLOCK_SIZE) + len < SHA256_BLOCK_SIZE)
  48. return crypto_sha256_update(desc, data, len);
  49. /* make sure casting to sha256_block_fn() is safe */
  50. BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);
  51. kernel_fpu_begin();
  52. sha256_base_do_update(desc, data, len,
  53. (sha256_block_fn *)sha256_xform);
  54. kernel_fpu_end();
  55. return 0;
  56. }
  57. static int sha256_finup(struct shash_desc *desc, const u8 *data,
  58. unsigned int len, u8 *out, sha256_transform_fn *sha256_xform)
  59. {
  60. if (!irq_fpu_usable())
  61. return crypto_sha256_finup(desc, data, len, out);
  62. kernel_fpu_begin();
  63. if (len)
  64. sha256_base_do_update(desc, data, len,
  65. (sha256_block_fn *)sha256_xform);
  66. sha256_base_do_finalize(desc, (sha256_block_fn *)sha256_xform);
  67. kernel_fpu_end();
  68. return sha256_base_finish(desc, out);
  69. }
  70. static int sha256_ssse3_update(struct shash_desc *desc, const u8 *data,
  71. unsigned int len)
  72. {
  73. return sha256_update(desc, data, len, sha256_transform_ssse3);
  74. }
  75. static int sha256_ssse3_finup(struct shash_desc *desc, const u8 *data,
  76. unsigned int len, u8 *out)
  77. {
  78. return sha256_finup(desc, data, len, out, sha256_transform_ssse3);
  79. }
  80. /* Add padding and return the message digest. */
  81. static int sha256_ssse3_final(struct shash_desc *desc, u8 *out)
  82. {
  83. return sha256_ssse3_finup(desc, NULL, 0, out);
  84. }
  85. static struct shash_alg sha256_ssse3_algs[] = { {
  86. .digestsize = SHA256_DIGEST_SIZE,
  87. .init = sha256_base_init,
  88. .update = sha256_ssse3_update,
  89. .final = sha256_ssse3_final,
  90. .finup = sha256_ssse3_finup,
  91. .descsize = sizeof(struct sha256_state),
  92. .base = {
  93. .cra_name = "sha256",
  94. .cra_driver_name = "sha256-ssse3",
  95. .cra_priority = 150,
  96. .cra_blocksize = SHA256_BLOCK_SIZE,
  97. .cra_module = THIS_MODULE,
  98. }
  99. }, {
  100. .digestsize = SHA224_DIGEST_SIZE,
  101. .init = sha224_base_init,
  102. .update = sha256_ssse3_update,
  103. .final = sha256_ssse3_final,
  104. .finup = sha256_ssse3_finup,
  105. .descsize = sizeof(struct sha256_state),
  106. .base = {
  107. .cra_name = "sha224",
  108. .cra_driver_name = "sha224-ssse3",
  109. .cra_priority = 150,
  110. .cra_blocksize = SHA224_BLOCK_SIZE,
  111. .cra_module = THIS_MODULE,
  112. }
  113. } };
  114. static int register_sha256_ssse3(void)
  115. {
  116. if (boot_cpu_has(X86_FEATURE_SSSE3))
  117. return crypto_register_shashes(sha256_ssse3_algs,
  118. ARRAY_SIZE(sha256_ssse3_algs));
  119. return 0;
  120. }
  121. static void unregister_sha256_ssse3(void)
  122. {
  123. if (boot_cpu_has(X86_FEATURE_SSSE3))
  124. crypto_unregister_shashes(sha256_ssse3_algs,
  125. ARRAY_SIZE(sha256_ssse3_algs));
  126. }
  127. #ifdef CONFIG_AS_AVX
  128. asmlinkage void sha256_transform_avx(u32 *digest, const char *data,
  129. u64 rounds);
  130. static int sha256_avx_update(struct shash_desc *desc, const u8 *data,
  131. unsigned int len)
  132. {
  133. return sha256_update(desc, data, len, sha256_transform_avx);
  134. }
  135. static int sha256_avx_finup(struct shash_desc *desc, const u8 *data,
  136. unsigned int len, u8 *out)
  137. {
  138. return sha256_finup(desc, data, len, out, sha256_transform_avx);
  139. }
  140. static int sha256_avx_final(struct shash_desc *desc, u8 *out)
  141. {
  142. return sha256_avx_finup(desc, NULL, 0, out);
  143. }
  144. static struct shash_alg sha256_avx_algs[] = { {
  145. .digestsize = SHA256_DIGEST_SIZE,
  146. .init = sha256_base_init,
  147. .update = sha256_avx_update,
  148. .final = sha256_avx_final,
  149. .finup = sha256_avx_finup,
  150. .descsize = sizeof(struct sha256_state),
  151. .base = {
  152. .cra_name = "sha256",
  153. .cra_driver_name = "sha256-avx",
  154. .cra_priority = 160,
  155. .cra_blocksize = SHA256_BLOCK_SIZE,
  156. .cra_module = THIS_MODULE,
  157. }
  158. }, {
  159. .digestsize = SHA224_DIGEST_SIZE,
  160. .init = sha224_base_init,
  161. .update = sha256_avx_update,
  162. .final = sha256_avx_final,
  163. .finup = sha256_avx_finup,
  164. .descsize = sizeof(struct sha256_state),
  165. .base = {
  166. .cra_name = "sha224",
  167. .cra_driver_name = "sha224-avx",
  168. .cra_priority = 160,
  169. .cra_blocksize = SHA224_BLOCK_SIZE,
  170. .cra_module = THIS_MODULE,
  171. }
  172. } };
  173. static bool avx_usable(void)
  174. {
  175. if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
  176. if (boot_cpu_has(X86_FEATURE_AVX))
  177. pr_info("AVX detected but unusable.\n");
  178. return false;
  179. }
  180. return true;
  181. }
  182. static int register_sha256_avx(void)
  183. {
  184. if (avx_usable())
  185. return crypto_register_shashes(sha256_avx_algs,
  186. ARRAY_SIZE(sha256_avx_algs));
  187. return 0;
  188. }
  189. static void unregister_sha256_avx(void)
  190. {
  191. if (avx_usable())
  192. crypto_unregister_shashes(sha256_avx_algs,
  193. ARRAY_SIZE(sha256_avx_algs));
  194. }
  195. #else
  196. static inline int register_sha256_avx(void) { return 0; }
  197. static inline void unregister_sha256_avx(void) { }
  198. #endif
  199. #if defined(CONFIG_AS_AVX2) && defined(CONFIG_AS_AVX)
  200. asmlinkage void sha256_transform_rorx(u32 *digest, const char *data,
  201. u64 rounds);
  202. static int sha256_avx2_update(struct shash_desc *desc, const u8 *data,
  203. unsigned int len)
  204. {
  205. return sha256_update(desc, data, len, sha256_transform_rorx);
  206. }
  207. static int sha256_avx2_finup(struct shash_desc *desc, const u8 *data,
  208. unsigned int len, u8 *out)
  209. {
  210. return sha256_finup(desc, data, len, out, sha256_transform_rorx);
  211. }
  212. static int sha256_avx2_final(struct shash_desc *desc, u8 *out)
  213. {
  214. return sha256_avx2_finup(desc, NULL, 0, out);
  215. }
  216. static struct shash_alg sha256_avx2_algs[] = { {
  217. .digestsize = SHA256_DIGEST_SIZE,
  218. .init = sha256_base_init,
  219. .update = sha256_avx2_update,
  220. .final = sha256_avx2_final,
  221. .finup = sha256_avx2_finup,
  222. .descsize = sizeof(struct sha256_state),
  223. .base = {
  224. .cra_name = "sha256",
  225. .cra_driver_name = "sha256-avx2",
  226. .cra_priority = 170,
  227. .cra_blocksize = SHA256_BLOCK_SIZE,
  228. .cra_module = THIS_MODULE,
  229. }
  230. }, {
  231. .digestsize = SHA224_DIGEST_SIZE,
  232. .init = sha224_base_init,
  233. .update = sha256_avx2_update,
  234. .final = sha256_avx2_final,
  235. .finup = sha256_avx2_finup,
  236. .descsize = sizeof(struct sha256_state),
  237. .base = {
  238. .cra_name = "sha224",
  239. .cra_driver_name = "sha224-avx2",
  240. .cra_priority = 170,
  241. .cra_blocksize = SHA224_BLOCK_SIZE,
  242. .cra_module = THIS_MODULE,
  243. }
  244. } };
  245. static bool avx2_usable(void)
  246. {
  247. if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) &&
  248. boot_cpu_has(X86_FEATURE_BMI2))
  249. return true;
  250. return false;
  251. }
  252. static int register_sha256_avx2(void)
  253. {
  254. if (avx2_usable())
  255. return crypto_register_shashes(sha256_avx2_algs,
  256. ARRAY_SIZE(sha256_avx2_algs));
  257. return 0;
  258. }
  259. static void unregister_sha256_avx2(void)
  260. {
  261. if (avx2_usable())
  262. crypto_unregister_shashes(sha256_avx2_algs,
  263. ARRAY_SIZE(sha256_avx2_algs));
  264. }
  265. #else
  266. static inline int register_sha256_avx2(void) { return 0; }
  267. static inline void unregister_sha256_avx2(void) { }
  268. #endif
  269. #ifdef CONFIG_AS_SHA256_NI
  270. asmlinkage void sha256_ni_transform(u32 *digest, const char *data,
  271. u64 rounds); /*unsigned int rounds);*/
  272. static int sha256_ni_update(struct shash_desc *desc, const u8 *data,
  273. unsigned int len)
  274. {
  275. return sha256_update(desc, data, len, sha256_ni_transform);
  276. }
  277. static int sha256_ni_finup(struct shash_desc *desc, const u8 *data,
  278. unsigned int len, u8 *out)
  279. {
  280. return sha256_finup(desc, data, len, out, sha256_ni_transform);
  281. }
  282. static int sha256_ni_final(struct shash_desc *desc, u8 *out)
  283. {
  284. return sha256_ni_finup(desc, NULL, 0, out);
  285. }
  286. static struct shash_alg sha256_ni_algs[] = { {
  287. .digestsize = SHA256_DIGEST_SIZE,
  288. .init = sha256_base_init,
  289. .update = sha256_ni_update,
  290. .final = sha256_ni_final,
  291. .finup = sha256_ni_finup,
  292. .descsize = sizeof(struct sha256_state),
  293. .base = {
  294. .cra_name = "sha256",
  295. .cra_driver_name = "sha256-ni",
  296. .cra_priority = 250,
  297. .cra_blocksize = SHA256_BLOCK_SIZE,
  298. .cra_module = THIS_MODULE,
  299. }
  300. }, {
  301. .digestsize = SHA224_DIGEST_SIZE,
  302. .init = sha224_base_init,
  303. .update = sha256_ni_update,
  304. .final = sha256_ni_final,
  305. .finup = sha256_ni_finup,
  306. .descsize = sizeof(struct sha256_state),
  307. .base = {
  308. .cra_name = "sha224",
  309. .cra_driver_name = "sha224-ni",
  310. .cra_priority = 250,
  311. .cra_blocksize = SHA224_BLOCK_SIZE,
  312. .cra_module = THIS_MODULE,
  313. }
  314. } };
  315. static int register_sha256_ni(void)
  316. {
  317. if (boot_cpu_has(X86_FEATURE_SHA_NI))
  318. return crypto_register_shashes(sha256_ni_algs,
  319. ARRAY_SIZE(sha256_ni_algs));
  320. return 0;
  321. }
  322. static void unregister_sha256_ni(void)
  323. {
  324. if (boot_cpu_has(X86_FEATURE_SHA_NI))
  325. crypto_unregister_shashes(sha256_ni_algs,
  326. ARRAY_SIZE(sha256_ni_algs));
  327. }
  328. #else
  329. static inline int register_sha256_ni(void) { return 0; }
  330. static inline void unregister_sha256_ni(void) { }
  331. #endif
  332. static int __init sha256_ssse3_mod_init(void)
  333. {
  334. if (register_sha256_ssse3())
  335. goto fail;
  336. if (register_sha256_avx()) {
  337. unregister_sha256_ssse3();
  338. goto fail;
  339. }
  340. if (register_sha256_avx2()) {
  341. unregister_sha256_avx();
  342. unregister_sha256_ssse3();
  343. goto fail;
  344. }
  345. if (register_sha256_ni()) {
  346. unregister_sha256_avx2();
  347. unregister_sha256_avx();
  348. unregister_sha256_ssse3();
  349. goto fail;
  350. }
  351. return 0;
  352. fail:
  353. return -ENODEV;
  354. }
  355. static void __exit sha256_ssse3_mod_fini(void)
  356. {
  357. unregister_sha256_ni();
  358. unregister_sha256_avx2();
  359. unregister_sha256_avx();
  360. unregister_sha256_ssse3();
  361. }
  362. module_init(sha256_ssse3_mod_init);
  363. module_exit(sha256_ssse3_mod_fini);
  364. MODULE_LICENSE("GPL");
  365. MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated");
  366. MODULE_ALIAS_CRYPTO("sha256");
  367. MODULE_ALIAS_CRYPTO("sha256-ssse3");
  368. MODULE_ALIAS_CRYPTO("sha256-avx");
  369. MODULE_ALIAS_CRYPTO("sha256-avx2");
  370. MODULE_ALIAS_CRYPTO("sha224");
  371. MODULE_ALIAS_CRYPTO("sha224-ssse3");
  372. MODULE_ALIAS_CRYPTO("sha224-avx");
  373. MODULE_ALIAS_CRYPTO("sha224-avx2");
  374. #ifdef CONFIG_AS_SHA256_NI
  375. MODULE_ALIAS_CRYPTO("sha256-ni");
  376. MODULE_ALIAS_CRYPTO("sha224-ni");
  377. #endif