init_64.c 38 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544
  1. /*
  2. * linux/arch/x86_64/mm/init.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
  6. * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
  7. */
  8. #include <linux/signal.h>
  9. #include <linux/sched.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/string.h>
  13. #include <linux/types.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/mman.h>
  16. #include <linux/mm.h>
  17. #include <linux/swap.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/initrd.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/bootmem.h>
  23. #include <linux/memblock.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/pci.h>
  26. #include <linux/pfn.h>
  27. #include <linux/poison.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/memory.h>
  30. #include <linux/memory_hotplug.h>
  31. #include <linux/memremap.h>
  32. #include <linux/nmi.h>
  33. #include <linux/gfp.h>
  34. #include <linux/kcore.h>
  35. #include <asm/processor.h>
  36. #include <asm/bios_ebda.h>
  37. #include <linux/uaccess.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/dma.h>
  41. #include <asm/fixmap.h>
  42. #include <asm/e820/api.h>
  43. #include <asm/apic.h>
  44. #include <asm/tlb.h>
  45. #include <asm/mmu_context.h>
  46. #include <asm/proto.h>
  47. #include <asm/smp.h>
  48. #include <asm/sections.h>
  49. #include <asm/kdebug.h>
  50. #include <asm/numa.h>
  51. #include <asm/set_memory.h>
  52. #include <asm/init.h>
  53. #include <asm/uv/uv.h>
  54. #include <asm/setup.h>
  55. #include "mm_internal.h"
  56. #include "ident_map.c"
  57. /*
  58. * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  59. * physical space so we can cache the place of the first one and move
  60. * around without checking the pgd every time.
  61. */
  62. /* Bits supported by the hardware: */
  63. pteval_t __supported_pte_mask __read_mostly = ~0;
  64. /* Bits allowed in normal kernel mappings: */
  65. pteval_t __default_kernel_pte_mask __read_mostly = ~0;
  66. EXPORT_SYMBOL_GPL(__supported_pte_mask);
  67. /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */
  68. EXPORT_SYMBOL(__default_kernel_pte_mask);
  69. int force_personality32;
  70. /*
  71. * noexec32=on|off
  72. * Control non executable heap for 32bit processes.
  73. * To control the stack too use noexec=off
  74. *
  75. * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
  76. * off PROT_READ implies PROT_EXEC
  77. */
  78. static int __init nonx32_setup(char *str)
  79. {
  80. if (!strcmp(str, "on"))
  81. force_personality32 &= ~READ_IMPLIES_EXEC;
  82. else if (!strcmp(str, "off"))
  83. force_personality32 |= READ_IMPLIES_EXEC;
  84. return 1;
  85. }
  86. __setup("noexec32=", nonx32_setup);
  87. static void sync_global_pgds_l5(unsigned long start, unsigned long end)
  88. {
  89. unsigned long addr;
  90. for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
  91. const pgd_t *pgd_ref = pgd_offset_k(addr);
  92. struct page *page;
  93. /* Check for overflow */
  94. if (addr < start)
  95. break;
  96. if (pgd_none(*pgd_ref))
  97. continue;
  98. spin_lock(&pgd_lock);
  99. list_for_each_entry(page, &pgd_list, lru) {
  100. pgd_t *pgd;
  101. spinlock_t *pgt_lock;
  102. pgd = (pgd_t *)page_address(page) + pgd_index(addr);
  103. /* the pgt_lock only for Xen */
  104. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  105. spin_lock(pgt_lock);
  106. if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
  107. BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
  108. if (pgd_none(*pgd))
  109. set_pgd(pgd, *pgd_ref);
  110. spin_unlock(pgt_lock);
  111. }
  112. spin_unlock(&pgd_lock);
  113. }
  114. }
  115. static void sync_global_pgds_l4(unsigned long start, unsigned long end)
  116. {
  117. unsigned long addr;
  118. for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
  119. pgd_t *pgd_ref = pgd_offset_k(addr);
  120. const p4d_t *p4d_ref;
  121. struct page *page;
  122. /*
  123. * With folded p4d, pgd_none() is always false, we need to
  124. * handle synchonization on p4d level.
  125. */
  126. MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref));
  127. p4d_ref = p4d_offset(pgd_ref, addr);
  128. if (p4d_none(*p4d_ref))
  129. continue;
  130. spin_lock(&pgd_lock);
  131. list_for_each_entry(page, &pgd_list, lru) {
  132. pgd_t *pgd;
  133. p4d_t *p4d;
  134. spinlock_t *pgt_lock;
  135. pgd = (pgd_t *)page_address(page) + pgd_index(addr);
  136. p4d = p4d_offset(pgd, addr);
  137. /* the pgt_lock only for Xen */
  138. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  139. spin_lock(pgt_lock);
  140. if (!p4d_none(*p4d_ref) && !p4d_none(*p4d))
  141. BUG_ON(p4d_page_vaddr(*p4d)
  142. != p4d_page_vaddr(*p4d_ref));
  143. if (p4d_none(*p4d))
  144. set_p4d(p4d, *p4d_ref);
  145. spin_unlock(pgt_lock);
  146. }
  147. spin_unlock(&pgd_lock);
  148. }
  149. }
  150. /*
  151. * When memory was added make sure all the processes MM have
  152. * suitable PGD entries in the local PGD level page.
  153. */
  154. void sync_global_pgds(unsigned long start, unsigned long end)
  155. {
  156. if (pgtable_l5_enabled())
  157. sync_global_pgds_l5(start, end);
  158. else
  159. sync_global_pgds_l4(start, end);
  160. }
  161. /*
  162. * NOTE: This function is marked __ref because it calls __init function
  163. * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
  164. */
  165. static __ref void *spp_getpage(void)
  166. {
  167. void *ptr;
  168. if (after_bootmem)
  169. ptr = (void *) get_zeroed_page(GFP_ATOMIC);
  170. else
  171. ptr = alloc_bootmem_pages(PAGE_SIZE);
  172. if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
  173. panic("set_pte_phys: cannot allocate page data %s\n",
  174. after_bootmem ? "after bootmem" : "");
  175. }
  176. pr_debug("spp_getpage %p\n", ptr);
  177. return ptr;
  178. }
  179. static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr)
  180. {
  181. if (pgd_none(*pgd)) {
  182. p4d_t *p4d = (p4d_t *)spp_getpage();
  183. pgd_populate(&init_mm, pgd, p4d);
  184. if (p4d != p4d_offset(pgd, 0))
  185. printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
  186. p4d, p4d_offset(pgd, 0));
  187. }
  188. return p4d_offset(pgd, vaddr);
  189. }
  190. static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr)
  191. {
  192. if (p4d_none(*p4d)) {
  193. pud_t *pud = (pud_t *)spp_getpage();
  194. p4d_populate(&init_mm, p4d, pud);
  195. if (pud != pud_offset(p4d, 0))
  196. printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
  197. pud, pud_offset(p4d, 0));
  198. }
  199. return pud_offset(p4d, vaddr);
  200. }
  201. static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
  202. {
  203. if (pud_none(*pud)) {
  204. pmd_t *pmd = (pmd_t *) spp_getpage();
  205. pud_populate(&init_mm, pud, pmd);
  206. if (pmd != pmd_offset(pud, 0))
  207. printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n",
  208. pmd, pmd_offset(pud, 0));
  209. }
  210. return pmd_offset(pud, vaddr);
  211. }
  212. static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
  213. {
  214. if (pmd_none(*pmd)) {
  215. pte_t *pte = (pte_t *) spp_getpage();
  216. pmd_populate_kernel(&init_mm, pmd, pte);
  217. if (pte != pte_offset_kernel(pmd, 0))
  218. printk(KERN_ERR "PAGETABLE BUG #03!\n");
  219. }
  220. return pte_offset_kernel(pmd, vaddr);
  221. }
  222. static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte)
  223. {
  224. pmd_t *pmd = fill_pmd(pud, vaddr);
  225. pte_t *pte = fill_pte(pmd, vaddr);
  226. set_pte(pte, new_pte);
  227. /*
  228. * It's enough to flush this one mapping.
  229. * (PGE mappings get flushed as well)
  230. */
  231. __flush_tlb_one_kernel(vaddr);
  232. }
  233. void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte)
  234. {
  235. p4d_t *p4d = p4d_page + p4d_index(vaddr);
  236. pud_t *pud = fill_pud(p4d, vaddr);
  237. __set_pte_vaddr(pud, vaddr, new_pte);
  238. }
  239. void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
  240. {
  241. pud_t *pud = pud_page + pud_index(vaddr);
  242. __set_pte_vaddr(pud, vaddr, new_pte);
  243. }
  244. void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
  245. {
  246. pgd_t *pgd;
  247. p4d_t *p4d_page;
  248. pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
  249. pgd = pgd_offset_k(vaddr);
  250. if (pgd_none(*pgd)) {
  251. printk(KERN_ERR
  252. "PGD FIXMAP MISSING, it should be setup in head.S!\n");
  253. return;
  254. }
  255. p4d_page = p4d_offset(pgd, 0);
  256. set_pte_vaddr_p4d(p4d_page, vaddr, pteval);
  257. }
  258. pmd_t * __init populate_extra_pmd(unsigned long vaddr)
  259. {
  260. pgd_t *pgd;
  261. p4d_t *p4d;
  262. pud_t *pud;
  263. pgd = pgd_offset_k(vaddr);
  264. p4d = fill_p4d(pgd, vaddr);
  265. pud = fill_pud(p4d, vaddr);
  266. return fill_pmd(pud, vaddr);
  267. }
  268. pte_t * __init populate_extra_pte(unsigned long vaddr)
  269. {
  270. pmd_t *pmd;
  271. pmd = populate_extra_pmd(vaddr);
  272. return fill_pte(pmd, vaddr);
  273. }
  274. /*
  275. * Create large page table mappings for a range of physical addresses.
  276. */
  277. static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
  278. enum page_cache_mode cache)
  279. {
  280. pgd_t *pgd;
  281. p4d_t *p4d;
  282. pud_t *pud;
  283. pmd_t *pmd;
  284. pgprot_t prot;
  285. pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
  286. pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
  287. BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
  288. for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
  289. pgd = pgd_offset_k((unsigned long)__va(phys));
  290. if (pgd_none(*pgd)) {
  291. p4d = (p4d_t *) spp_getpage();
  292. set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE |
  293. _PAGE_USER));
  294. }
  295. p4d = p4d_offset(pgd, (unsigned long)__va(phys));
  296. if (p4d_none(*p4d)) {
  297. pud = (pud_t *) spp_getpage();
  298. set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE |
  299. _PAGE_USER));
  300. }
  301. pud = pud_offset(p4d, (unsigned long)__va(phys));
  302. if (pud_none(*pud)) {
  303. pmd = (pmd_t *) spp_getpage();
  304. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
  305. _PAGE_USER));
  306. }
  307. pmd = pmd_offset(pud, phys);
  308. BUG_ON(!pmd_none(*pmd));
  309. set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
  310. }
  311. }
  312. void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
  313. {
  314. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
  315. }
  316. void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
  317. {
  318. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
  319. }
  320. /*
  321. * The head.S code sets up the kernel high mapping:
  322. *
  323. * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
  324. *
  325. * phys_base holds the negative offset to the kernel, which is added
  326. * to the compile time generated pmds. This results in invalid pmds up
  327. * to the point where we hit the physaddr 0 mapping.
  328. *
  329. * We limit the mappings to the region from _text to _brk_end. _brk_end
  330. * is rounded up to the 2MB boundary. This catches the invalid pmds as
  331. * well, as they are located before _text:
  332. */
  333. void __init cleanup_highmap(void)
  334. {
  335. unsigned long vaddr = __START_KERNEL_map;
  336. unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
  337. unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  338. pmd_t *pmd = level2_kernel_pgt;
  339. /*
  340. * Native path, max_pfn_mapped is not set yet.
  341. * Xen has valid max_pfn_mapped set in
  342. * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
  343. */
  344. if (max_pfn_mapped)
  345. vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
  346. for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
  347. if (pmd_none(*pmd))
  348. continue;
  349. if (vaddr < (unsigned long) _text || vaddr > end)
  350. set_pmd(pmd, __pmd(0));
  351. }
  352. }
  353. /*
  354. * Create PTE level page table mapping for physical addresses.
  355. * It returns the last physical address mapped.
  356. */
  357. static unsigned long __meminit
  358. phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
  359. pgprot_t prot)
  360. {
  361. unsigned long pages = 0, paddr_next;
  362. unsigned long paddr_last = paddr_end;
  363. pte_t *pte;
  364. int i;
  365. pte = pte_page + pte_index(paddr);
  366. i = pte_index(paddr);
  367. for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
  368. paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
  369. if (paddr >= paddr_end) {
  370. if (!after_bootmem &&
  371. !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
  372. E820_TYPE_RAM) &&
  373. !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
  374. E820_TYPE_RESERVED_KERN))
  375. set_pte(pte, __pte(0));
  376. continue;
  377. }
  378. /*
  379. * We will re-use the existing mapping.
  380. * Xen for example has some special requirements, like mapping
  381. * pagetable pages as RO. So assume someone who pre-setup
  382. * these mappings are more intelligent.
  383. */
  384. if (!pte_none(*pte)) {
  385. if (!after_bootmem)
  386. pages++;
  387. continue;
  388. }
  389. if (0)
  390. pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
  391. pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
  392. pages++;
  393. set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
  394. paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
  395. }
  396. update_page_count(PG_LEVEL_4K, pages);
  397. return paddr_last;
  398. }
  399. /*
  400. * Create PMD level page table mapping for physical addresses. The virtual
  401. * and physical address have to be aligned at this level.
  402. * It returns the last physical address mapped.
  403. */
  404. static unsigned long __meminit
  405. phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
  406. unsigned long page_size_mask, pgprot_t prot)
  407. {
  408. unsigned long pages = 0, paddr_next;
  409. unsigned long paddr_last = paddr_end;
  410. int i = pmd_index(paddr);
  411. for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
  412. pmd_t *pmd = pmd_page + pmd_index(paddr);
  413. pte_t *pte;
  414. pgprot_t new_prot = prot;
  415. paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
  416. if (paddr >= paddr_end) {
  417. if (!after_bootmem &&
  418. !e820__mapped_any(paddr & PMD_MASK, paddr_next,
  419. E820_TYPE_RAM) &&
  420. !e820__mapped_any(paddr & PMD_MASK, paddr_next,
  421. E820_TYPE_RESERVED_KERN))
  422. set_pmd(pmd, __pmd(0));
  423. continue;
  424. }
  425. if (!pmd_none(*pmd)) {
  426. if (!pmd_large(*pmd)) {
  427. spin_lock(&init_mm.page_table_lock);
  428. pte = (pte_t *)pmd_page_vaddr(*pmd);
  429. paddr_last = phys_pte_init(pte, paddr,
  430. paddr_end, prot);
  431. spin_unlock(&init_mm.page_table_lock);
  432. continue;
  433. }
  434. /*
  435. * If we are ok with PG_LEVEL_2M mapping, then we will
  436. * use the existing mapping,
  437. *
  438. * Otherwise, we will split the large page mapping but
  439. * use the same existing protection bits except for
  440. * large page, so that we don't violate Intel's TLB
  441. * Application note (317080) which says, while changing
  442. * the page sizes, new and old translations should
  443. * not differ with respect to page frame and
  444. * attributes.
  445. */
  446. if (page_size_mask & (1 << PG_LEVEL_2M)) {
  447. if (!after_bootmem)
  448. pages++;
  449. paddr_last = paddr_next;
  450. continue;
  451. }
  452. new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
  453. }
  454. if (page_size_mask & (1<<PG_LEVEL_2M)) {
  455. pages++;
  456. spin_lock(&init_mm.page_table_lock);
  457. set_pte((pte_t *)pmd,
  458. pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
  459. __pgprot(pgprot_val(prot) | _PAGE_PSE)));
  460. spin_unlock(&init_mm.page_table_lock);
  461. paddr_last = paddr_next;
  462. continue;
  463. }
  464. pte = alloc_low_page();
  465. paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
  466. spin_lock(&init_mm.page_table_lock);
  467. pmd_populate_kernel(&init_mm, pmd, pte);
  468. spin_unlock(&init_mm.page_table_lock);
  469. }
  470. update_page_count(PG_LEVEL_2M, pages);
  471. return paddr_last;
  472. }
  473. /*
  474. * Create PUD level page table mapping for physical addresses. The virtual
  475. * and physical address do not have to be aligned at this level. KASLR can
  476. * randomize virtual addresses up to this level.
  477. * It returns the last physical address mapped.
  478. */
  479. static unsigned long __meminit
  480. phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
  481. unsigned long page_size_mask)
  482. {
  483. unsigned long pages = 0, paddr_next;
  484. unsigned long paddr_last = paddr_end;
  485. unsigned long vaddr = (unsigned long)__va(paddr);
  486. int i = pud_index(vaddr);
  487. for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
  488. pud_t *pud;
  489. pmd_t *pmd;
  490. pgprot_t prot = PAGE_KERNEL;
  491. vaddr = (unsigned long)__va(paddr);
  492. pud = pud_page + pud_index(vaddr);
  493. paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
  494. if (paddr >= paddr_end) {
  495. if (!after_bootmem &&
  496. !e820__mapped_any(paddr & PUD_MASK, paddr_next,
  497. E820_TYPE_RAM) &&
  498. !e820__mapped_any(paddr & PUD_MASK, paddr_next,
  499. E820_TYPE_RESERVED_KERN))
  500. set_pud(pud, __pud(0));
  501. continue;
  502. }
  503. if (!pud_none(*pud)) {
  504. if (!pud_large(*pud)) {
  505. pmd = pmd_offset(pud, 0);
  506. paddr_last = phys_pmd_init(pmd, paddr,
  507. paddr_end,
  508. page_size_mask,
  509. prot);
  510. continue;
  511. }
  512. /*
  513. * If we are ok with PG_LEVEL_1G mapping, then we will
  514. * use the existing mapping.
  515. *
  516. * Otherwise, we will split the gbpage mapping but use
  517. * the same existing protection bits except for large
  518. * page, so that we don't violate Intel's TLB
  519. * Application note (317080) which says, while changing
  520. * the page sizes, new and old translations should
  521. * not differ with respect to page frame and
  522. * attributes.
  523. */
  524. if (page_size_mask & (1 << PG_LEVEL_1G)) {
  525. if (!after_bootmem)
  526. pages++;
  527. paddr_last = paddr_next;
  528. continue;
  529. }
  530. prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
  531. }
  532. if (page_size_mask & (1<<PG_LEVEL_1G)) {
  533. pages++;
  534. spin_lock(&init_mm.page_table_lock);
  535. set_pte((pte_t *)pud,
  536. pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
  537. PAGE_KERNEL_LARGE));
  538. spin_unlock(&init_mm.page_table_lock);
  539. paddr_last = paddr_next;
  540. continue;
  541. }
  542. pmd = alloc_low_page();
  543. paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
  544. page_size_mask, prot);
  545. spin_lock(&init_mm.page_table_lock);
  546. pud_populate(&init_mm, pud, pmd);
  547. spin_unlock(&init_mm.page_table_lock);
  548. }
  549. update_page_count(PG_LEVEL_1G, pages);
  550. return paddr_last;
  551. }
  552. static unsigned long __meminit
  553. phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
  554. unsigned long page_size_mask)
  555. {
  556. unsigned long paddr_next, paddr_last = paddr_end;
  557. unsigned long vaddr = (unsigned long)__va(paddr);
  558. int i = p4d_index(vaddr);
  559. if (!pgtable_l5_enabled())
  560. return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask);
  561. for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
  562. p4d_t *p4d;
  563. pud_t *pud;
  564. vaddr = (unsigned long)__va(paddr);
  565. p4d = p4d_page + p4d_index(vaddr);
  566. paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
  567. if (paddr >= paddr_end) {
  568. if (!after_bootmem &&
  569. !e820__mapped_any(paddr & P4D_MASK, paddr_next,
  570. E820_TYPE_RAM) &&
  571. !e820__mapped_any(paddr & P4D_MASK, paddr_next,
  572. E820_TYPE_RESERVED_KERN))
  573. set_p4d(p4d, __p4d(0));
  574. continue;
  575. }
  576. if (!p4d_none(*p4d)) {
  577. pud = pud_offset(p4d, 0);
  578. paddr_last = phys_pud_init(pud, paddr,
  579. paddr_end,
  580. page_size_mask);
  581. continue;
  582. }
  583. pud = alloc_low_page();
  584. paddr_last = phys_pud_init(pud, paddr, paddr_end,
  585. page_size_mask);
  586. spin_lock(&init_mm.page_table_lock);
  587. p4d_populate(&init_mm, p4d, pud);
  588. spin_unlock(&init_mm.page_table_lock);
  589. }
  590. return paddr_last;
  591. }
  592. /*
  593. * Create page table mapping for the physical memory for specific physical
  594. * addresses. The virtual and physical addresses have to be aligned on PMD level
  595. * down. It returns the last physical address mapped.
  596. */
  597. unsigned long __meminit
  598. kernel_physical_mapping_init(unsigned long paddr_start,
  599. unsigned long paddr_end,
  600. unsigned long page_size_mask)
  601. {
  602. bool pgd_changed = false;
  603. unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
  604. paddr_last = paddr_end;
  605. vaddr = (unsigned long)__va(paddr_start);
  606. vaddr_end = (unsigned long)__va(paddr_end);
  607. vaddr_start = vaddr;
  608. for (; vaddr < vaddr_end; vaddr = vaddr_next) {
  609. pgd_t *pgd = pgd_offset_k(vaddr);
  610. p4d_t *p4d;
  611. vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
  612. if (pgd_val(*pgd)) {
  613. p4d = (p4d_t *)pgd_page_vaddr(*pgd);
  614. paddr_last = phys_p4d_init(p4d, __pa(vaddr),
  615. __pa(vaddr_end),
  616. page_size_mask);
  617. continue;
  618. }
  619. p4d = alloc_low_page();
  620. paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end),
  621. page_size_mask);
  622. spin_lock(&init_mm.page_table_lock);
  623. if (pgtable_l5_enabled())
  624. pgd_populate(&init_mm, pgd, p4d);
  625. else
  626. p4d_populate(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d);
  627. spin_unlock(&init_mm.page_table_lock);
  628. pgd_changed = true;
  629. }
  630. if (pgd_changed)
  631. sync_global_pgds(vaddr_start, vaddr_end - 1);
  632. return paddr_last;
  633. }
  634. #ifndef CONFIG_NUMA
  635. void __init initmem_init(void)
  636. {
  637. memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
  638. }
  639. #endif
  640. void __init paging_init(void)
  641. {
  642. sparse_memory_present_with_active_regions(MAX_NUMNODES);
  643. sparse_init();
  644. /*
  645. * clear the default setting with node 0
  646. * note: don't use nodes_clear here, that is really clearing when
  647. * numa support is not compiled in, and later node_set_state
  648. * will not set it back.
  649. */
  650. node_clear_state(0, N_MEMORY);
  651. if (N_MEMORY != N_NORMAL_MEMORY)
  652. node_clear_state(0, N_NORMAL_MEMORY);
  653. zone_sizes_init();
  654. }
  655. /*
  656. * Memory hotplug specific functions
  657. */
  658. #ifdef CONFIG_MEMORY_HOTPLUG
  659. /*
  660. * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
  661. * updating.
  662. */
  663. static void update_end_of_memory_vars(u64 start, u64 size)
  664. {
  665. unsigned long end_pfn = PFN_UP(start + size);
  666. if (end_pfn > max_pfn) {
  667. max_pfn = end_pfn;
  668. max_low_pfn = end_pfn;
  669. high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
  670. }
  671. }
  672. int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages,
  673. struct vmem_altmap *altmap, bool want_memblock)
  674. {
  675. int ret;
  676. ret = __add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
  677. WARN_ON_ONCE(ret);
  678. /* update max_pfn, max_low_pfn and high_memory */
  679. update_end_of_memory_vars(start_pfn << PAGE_SHIFT,
  680. nr_pages << PAGE_SHIFT);
  681. return ret;
  682. }
  683. int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap,
  684. bool want_memblock)
  685. {
  686. unsigned long start_pfn = start >> PAGE_SHIFT;
  687. unsigned long nr_pages = size >> PAGE_SHIFT;
  688. init_memory_mapping(start, start + size);
  689. return add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
  690. }
  691. #define PAGE_INUSE 0xFD
  692. static void __meminit free_pagetable(struct page *page, int order)
  693. {
  694. unsigned long magic;
  695. unsigned int nr_pages = 1 << order;
  696. /* bootmem page has reserved flag */
  697. if (PageReserved(page)) {
  698. __ClearPageReserved(page);
  699. magic = (unsigned long)page->freelist;
  700. if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
  701. while (nr_pages--)
  702. put_page_bootmem(page++);
  703. } else
  704. while (nr_pages--)
  705. free_reserved_page(page++);
  706. } else
  707. free_pages((unsigned long)page_address(page), order);
  708. }
  709. static void __meminit free_hugepage_table(struct page *page,
  710. struct vmem_altmap *altmap)
  711. {
  712. if (altmap)
  713. vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE);
  714. else
  715. free_pagetable(page, get_order(PMD_SIZE));
  716. }
  717. static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
  718. {
  719. pte_t *pte;
  720. int i;
  721. for (i = 0; i < PTRS_PER_PTE; i++) {
  722. pte = pte_start + i;
  723. if (!pte_none(*pte))
  724. return;
  725. }
  726. /* free a pte talbe */
  727. free_pagetable(pmd_page(*pmd), 0);
  728. spin_lock(&init_mm.page_table_lock);
  729. pmd_clear(pmd);
  730. spin_unlock(&init_mm.page_table_lock);
  731. }
  732. static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
  733. {
  734. pmd_t *pmd;
  735. int i;
  736. for (i = 0; i < PTRS_PER_PMD; i++) {
  737. pmd = pmd_start + i;
  738. if (!pmd_none(*pmd))
  739. return;
  740. }
  741. /* free a pmd talbe */
  742. free_pagetable(pud_page(*pud), 0);
  743. spin_lock(&init_mm.page_table_lock);
  744. pud_clear(pud);
  745. spin_unlock(&init_mm.page_table_lock);
  746. }
  747. static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
  748. {
  749. pud_t *pud;
  750. int i;
  751. for (i = 0; i < PTRS_PER_PUD; i++) {
  752. pud = pud_start + i;
  753. if (!pud_none(*pud))
  754. return;
  755. }
  756. /* free a pud talbe */
  757. free_pagetable(p4d_page(*p4d), 0);
  758. spin_lock(&init_mm.page_table_lock);
  759. p4d_clear(p4d);
  760. spin_unlock(&init_mm.page_table_lock);
  761. }
  762. static void __meminit
  763. remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
  764. bool direct)
  765. {
  766. unsigned long next, pages = 0;
  767. pte_t *pte;
  768. void *page_addr;
  769. phys_addr_t phys_addr;
  770. pte = pte_start + pte_index(addr);
  771. for (; addr < end; addr = next, pte++) {
  772. next = (addr + PAGE_SIZE) & PAGE_MASK;
  773. if (next > end)
  774. next = end;
  775. if (!pte_present(*pte))
  776. continue;
  777. /*
  778. * We mapped [0,1G) memory as identity mapping when
  779. * initializing, in arch/x86/kernel/head_64.S. These
  780. * pagetables cannot be removed.
  781. */
  782. phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
  783. if (phys_addr < (phys_addr_t)0x40000000)
  784. return;
  785. if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
  786. /*
  787. * Do not free direct mapping pages since they were
  788. * freed when offlining, or simplely not in use.
  789. */
  790. if (!direct)
  791. free_pagetable(pte_page(*pte), 0);
  792. spin_lock(&init_mm.page_table_lock);
  793. pte_clear(&init_mm, addr, pte);
  794. spin_unlock(&init_mm.page_table_lock);
  795. /* For non-direct mapping, pages means nothing. */
  796. pages++;
  797. } else {
  798. /*
  799. * If we are here, we are freeing vmemmap pages since
  800. * direct mapped memory ranges to be freed are aligned.
  801. *
  802. * If we are not removing the whole page, it means
  803. * other page structs in this page are being used and
  804. * we canot remove them. So fill the unused page_structs
  805. * with 0xFD, and remove the page when it is wholly
  806. * filled with 0xFD.
  807. */
  808. memset((void *)addr, PAGE_INUSE, next - addr);
  809. page_addr = page_address(pte_page(*pte));
  810. if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
  811. free_pagetable(pte_page(*pte), 0);
  812. spin_lock(&init_mm.page_table_lock);
  813. pte_clear(&init_mm, addr, pte);
  814. spin_unlock(&init_mm.page_table_lock);
  815. }
  816. }
  817. }
  818. /* Call free_pte_table() in remove_pmd_table(). */
  819. flush_tlb_all();
  820. if (direct)
  821. update_page_count(PG_LEVEL_4K, -pages);
  822. }
  823. static void __meminit
  824. remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
  825. bool direct, struct vmem_altmap *altmap)
  826. {
  827. unsigned long next, pages = 0;
  828. pte_t *pte_base;
  829. pmd_t *pmd;
  830. void *page_addr;
  831. pmd = pmd_start + pmd_index(addr);
  832. for (; addr < end; addr = next, pmd++) {
  833. next = pmd_addr_end(addr, end);
  834. if (!pmd_present(*pmd))
  835. continue;
  836. if (pmd_large(*pmd)) {
  837. if (IS_ALIGNED(addr, PMD_SIZE) &&
  838. IS_ALIGNED(next, PMD_SIZE)) {
  839. if (!direct)
  840. free_hugepage_table(pmd_page(*pmd),
  841. altmap);
  842. spin_lock(&init_mm.page_table_lock);
  843. pmd_clear(pmd);
  844. spin_unlock(&init_mm.page_table_lock);
  845. pages++;
  846. } else {
  847. /* If here, we are freeing vmemmap pages. */
  848. memset((void *)addr, PAGE_INUSE, next - addr);
  849. page_addr = page_address(pmd_page(*pmd));
  850. if (!memchr_inv(page_addr, PAGE_INUSE,
  851. PMD_SIZE)) {
  852. free_hugepage_table(pmd_page(*pmd),
  853. altmap);
  854. spin_lock(&init_mm.page_table_lock);
  855. pmd_clear(pmd);
  856. spin_unlock(&init_mm.page_table_lock);
  857. }
  858. }
  859. continue;
  860. }
  861. pte_base = (pte_t *)pmd_page_vaddr(*pmd);
  862. remove_pte_table(pte_base, addr, next, direct);
  863. free_pte_table(pte_base, pmd);
  864. }
  865. /* Call free_pmd_table() in remove_pud_table(). */
  866. if (direct)
  867. update_page_count(PG_LEVEL_2M, -pages);
  868. }
  869. static void __meminit
  870. remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
  871. struct vmem_altmap *altmap, bool direct)
  872. {
  873. unsigned long next, pages = 0;
  874. pmd_t *pmd_base;
  875. pud_t *pud;
  876. void *page_addr;
  877. pud = pud_start + pud_index(addr);
  878. for (; addr < end; addr = next, pud++) {
  879. next = pud_addr_end(addr, end);
  880. if (!pud_present(*pud))
  881. continue;
  882. if (pud_large(*pud)) {
  883. if (IS_ALIGNED(addr, PUD_SIZE) &&
  884. IS_ALIGNED(next, PUD_SIZE)) {
  885. if (!direct)
  886. free_pagetable(pud_page(*pud),
  887. get_order(PUD_SIZE));
  888. spin_lock(&init_mm.page_table_lock);
  889. pud_clear(pud);
  890. spin_unlock(&init_mm.page_table_lock);
  891. pages++;
  892. } else {
  893. /* If here, we are freeing vmemmap pages. */
  894. memset((void *)addr, PAGE_INUSE, next - addr);
  895. page_addr = page_address(pud_page(*pud));
  896. if (!memchr_inv(page_addr, PAGE_INUSE,
  897. PUD_SIZE)) {
  898. free_pagetable(pud_page(*pud),
  899. get_order(PUD_SIZE));
  900. spin_lock(&init_mm.page_table_lock);
  901. pud_clear(pud);
  902. spin_unlock(&init_mm.page_table_lock);
  903. }
  904. }
  905. continue;
  906. }
  907. pmd_base = pmd_offset(pud, 0);
  908. remove_pmd_table(pmd_base, addr, next, direct, altmap);
  909. free_pmd_table(pmd_base, pud);
  910. }
  911. if (direct)
  912. update_page_count(PG_LEVEL_1G, -pages);
  913. }
  914. static void __meminit
  915. remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
  916. struct vmem_altmap *altmap, bool direct)
  917. {
  918. unsigned long next, pages = 0;
  919. pud_t *pud_base;
  920. p4d_t *p4d;
  921. p4d = p4d_start + p4d_index(addr);
  922. for (; addr < end; addr = next, p4d++) {
  923. next = p4d_addr_end(addr, end);
  924. if (!p4d_present(*p4d))
  925. continue;
  926. BUILD_BUG_ON(p4d_large(*p4d));
  927. pud_base = pud_offset(p4d, 0);
  928. remove_pud_table(pud_base, addr, next, altmap, direct);
  929. /*
  930. * For 4-level page tables we do not want to free PUDs, but in the
  931. * 5-level case we should free them. This code will have to change
  932. * to adapt for boot-time switching between 4 and 5 level page tables.
  933. */
  934. if (pgtable_l5_enabled())
  935. free_pud_table(pud_base, p4d);
  936. }
  937. if (direct)
  938. update_page_count(PG_LEVEL_512G, -pages);
  939. }
  940. /* start and end are both virtual address. */
  941. static void __meminit
  942. remove_pagetable(unsigned long start, unsigned long end, bool direct,
  943. struct vmem_altmap *altmap)
  944. {
  945. unsigned long next;
  946. unsigned long addr;
  947. pgd_t *pgd;
  948. p4d_t *p4d;
  949. for (addr = start; addr < end; addr = next) {
  950. next = pgd_addr_end(addr, end);
  951. pgd = pgd_offset_k(addr);
  952. if (!pgd_present(*pgd))
  953. continue;
  954. p4d = p4d_offset(pgd, 0);
  955. remove_p4d_table(p4d, addr, next, altmap, direct);
  956. }
  957. flush_tlb_all();
  958. }
  959. void __ref vmemmap_free(unsigned long start, unsigned long end,
  960. struct vmem_altmap *altmap)
  961. {
  962. remove_pagetable(start, end, false, altmap);
  963. }
  964. static void __meminit
  965. kernel_physical_mapping_remove(unsigned long start, unsigned long end)
  966. {
  967. start = (unsigned long)__va(start);
  968. end = (unsigned long)__va(end);
  969. remove_pagetable(start, end, true, NULL);
  970. }
  971. void __ref arch_remove_memory(int nid, u64 start, u64 size,
  972. struct vmem_altmap *altmap)
  973. {
  974. unsigned long start_pfn = start >> PAGE_SHIFT;
  975. unsigned long nr_pages = size >> PAGE_SHIFT;
  976. __remove_pages(start_pfn, nr_pages, altmap);
  977. kernel_physical_mapping_remove(start, start + size);
  978. }
  979. #endif /* CONFIG_MEMORY_HOTPLUG */
  980. static struct kcore_list kcore_vsyscall;
  981. static void __init register_page_bootmem_info(void)
  982. {
  983. #ifdef CONFIG_NUMA
  984. int i;
  985. for_each_online_node(i)
  986. register_page_bootmem_info_node(NODE_DATA(i));
  987. #endif
  988. }
  989. void __init mem_init(void)
  990. {
  991. pci_iommu_alloc();
  992. /* clear_bss() already clear the empty_zero_page */
  993. /* this will put all memory onto the freelists */
  994. free_all_bootmem();
  995. after_bootmem = 1;
  996. x86_init.hyper.init_after_bootmem();
  997. /*
  998. * Must be done after boot memory is put on freelist, because here we
  999. * might set fields in deferred struct pages that have not yet been
  1000. * initialized, and free_all_bootmem() initializes all the reserved
  1001. * deferred pages for us.
  1002. */
  1003. register_page_bootmem_info();
  1004. /* Register memory areas for /proc/kcore */
  1005. if (get_gate_vma(&init_mm))
  1006. kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER);
  1007. mem_init_print_info(NULL);
  1008. }
  1009. int kernel_set_to_readonly;
  1010. void set_kernel_text_rw(void)
  1011. {
  1012. unsigned long start = PFN_ALIGN(_text);
  1013. unsigned long end = PFN_ALIGN(__stop___ex_table);
  1014. if (!kernel_set_to_readonly)
  1015. return;
  1016. pr_debug("Set kernel text: %lx - %lx for read write\n",
  1017. start, end);
  1018. /*
  1019. * Make the kernel identity mapping for text RW. Kernel text
  1020. * mapping will always be RO. Refer to the comment in
  1021. * static_protections() in pageattr.c
  1022. */
  1023. set_memory_rw(start, (end - start) >> PAGE_SHIFT);
  1024. }
  1025. void set_kernel_text_ro(void)
  1026. {
  1027. unsigned long start = PFN_ALIGN(_text);
  1028. unsigned long end = PFN_ALIGN(__stop___ex_table);
  1029. if (!kernel_set_to_readonly)
  1030. return;
  1031. pr_debug("Set kernel text: %lx - %lx for read only\n",
  1032. start, end);
  1033. /*
  1034. * Set the kernel identity mapping for text RO.
  1035. */
  1036. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  1037. }
  1038. void mark_rodata_ro(void)
  1039. {
  1040. unsigned long start = PFN_ALIGN(_text);
  1041. unsigned long rodata_start = PFN_ALIGN(__start_rodata);
  1042. unsigned long end = (unsigned long) &__end_rodata_hpage_align;
  1043. unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
  1044. unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
  1045. unsigned long all_end;
  1046. printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
  1047. (end - start) >> 10);
  1048. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  1049. kernel_set_to_readonly = 1;
  1050. /*
  1051. * The rodata/data/bss/brk section (but not the kernel text!)
  1052. * should also be not-executable.
  1053. *
  1054. * We align all_end to PMD_SIZE because the existing mapping
  1055. * is a full PMD. If we would align _brk_end to PAGE_SIZE we
  1056. * split the PMD and the reminder between _brk_end and the end
  1057. * of the PMD will remain mapped executable.
  1058. *
  1059. * Any PMD which was setup after the one which covers _brk_end
  1060. * has been zapped already via cleanup_highmem().
  1061. */
  1062. all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
  1063. set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
  1064. #ifdef CONFIG_CPA_DEBUG
  1065. printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
  1066. set_memory_rw(start, (end-start) >> PAGE_SHIFT);
  1067. printk(KERN_INFO "Testing CPA: again\n");
  1068. set_memory_ro(start, (end-start) >> PAGE_SHIFT);
  1069. #endif
  1070. free_kernel_image_pages((void *)text_end, (void *)rodata_start);
  1071. free_kernel_image_pages((void *)rodata_end, (void *)_sdata);
  1072. debug_checkwx();
  1073. }
  1074. int kern_addr_valid(unsigned long addr)
  1075. {
  1076. unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
  1077. pgd_t *pgd;
  1078. p4d_t *p4d;
  1079. pud_t *pud;
  1080. pmd_t *pmd;
  1081. pte_t *pte;
  1082. if (above != 0 && above != -1UL)
  1083. return 0;
  1084. pgd = pgd_offset_k(addr);
  1085. if (pgd_none(*pgd))
  1086. return 0;
  1087. p4d = p4d_offset(pgd, addr);
  1088. if (p4d_none(*p4d))
  1089. return 0;
  1090. pud = pud_offset(p4d, addr);
  1091. if (pud_none(*pud))
  1092. return 0;
  1093. if (pud_large(*pud))
  1094. return pfn_valid(pud_pfn(*pud));
  1095. pmd = pmd_offset(pud, addr);
  1096. if (pmd_none(*pmd))
  1097. return 0;
  1098. if (pmd_large(*pmd))
  1099. return pfn_valid(pmd_pfn(*pmd));
  1100. pte = pte_offset_kernel(pmd, addr);
  1101. if (pte_none(*pte))
  1102. return 0;
  1103. return pfn_valid(pte_pfn(*pte));
  1104. }
  1105. /*
  1106. * Block size is the minimum amount of memory which can be hotplugged or
  1107. * hotremoved. It must be power of two and must be equal or larger than
  1108. * MIN_MEMORY_BLOCK_SIZE.
  1109. */
  1110. #define MAX_BLOCK_SIZE (2UL << 30)
  1111. /* Amount of ram needed to start using large blocks */
  1112. #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30)
  1113. /* Adjustable memory block size */
  1114. static unsigned long set_memory_block_size;
  1115. int __init set_memory_block_size_order(unsigned int order)
  1116. {
  1117. unsigned long size = 1UL << order;
  1118. if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE)
  1119. return -EINVAL;
  1120. set_memory_block_size = size;
  1121. return 0;
  1122. }
  1123. static unsigned long probe_memory_block_size(void)
  1124. {
  1125. unsigned long boot_mem_end = max_pfn << PAGE_SHIFT;
  1126. unsigned long bz;
  1127. /* If memory block size has been set, then use it */
  1128. bz = set_memory_block_size;
  1129. if (bz)
  1130. goto done;
  1131. /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */
  1132. if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) {
  1133. bz = MIN_MEMORY_BLOCK_SIZE;
  1134. goto done;
  1135. }
  1136. /* Find the largest allowed block size that aligns to memory end */
  1137. for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) {
  1138. if (IS_ALIGNED(boot_mem_end, bz))
  1139. break;
  1140. }
  1141. done:
  1142. pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
  1143. return bz;
  1144. }
  1145. static unsigned long memory_block_size_probed;
  1146. unsigned long memory_block_size_bytes(void)
  1147. {
  1148. if (!memory_block_size_probed)
  1149. memory_block_size_probed = probe_memory_block_size();
  1150. return memory_block_size_probed;
  1151. }
  1152. #ifdef CONFIG_SPARSEMEM_VMEMMAP
  1153. /*
  1154. * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
  1155. */
  1156. static long __meminitdata addr_start, addr_end;
  1157. static void __meminitdata *p_start, *p_end;
  1158. static int __meminitdata node_start;
  1159. static int __meminit vmemmap_populate_hugepages(unsigned long start,
  1160. unsigned long end, int node, struct vmem_altmap *altmap)
  1161. {
  1162. unsigned long addr;
  1163. unsigned long next;
  1164. pgd_t *pgd;
  1165. p4d_t *p4d;
  1166. pud_t *pud;
  1167. pmd_t *pmd;
  1168. for (addr = start; addr < end; addr = next) {
  1169. next = pmd_addr_end(addr, end);
  1170. pgd = vmemmap_pgd_populate(addr, node);
  1171. if (!pgd)
  1172. return -ENOMEM;
  1173. p4d = vmemmap_p4d_populate(pgd, addr, node);
  1174. if (!p4d)
  1175. return -ENOMEM;
  1176. pud = vmemmap_pud_populate(p4d, addr, node);
  1177. if (!pud)
  1178. return -ENOMEM;
  1179. pmd = pmd_offset(pud, addr);
  1180. if (pmd_none(*pmd)) {
  1181. void *p;
  1182. if (altmap)
  1183. p = altmap_alloc_block_buf(PMD_SIZE, altmap);
  1184. else
  1185. p = vmemmap_alloc_block_buf(PMD_SIZE, node);
  1186. if (p) {
  1187. pte_t entry;
  1188. entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
  1189. PAGE_KERNEL_LARGE);
  1190. set_pmd(pmd, __pmd(pte_val(entry)));
  1191. /* check to see if we have contiguous blocks */
  1192. if (p_end != p || node_start != node) {
  1193. if (p_start)
  1194. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1195. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1196. addr_start = addr;
  1197. node_start = node;
  1198. p_start = p;
  1199. }
  1200. addr_end = addr + PMD_SIZE;
  1201. p_end = p + PMD_SIZE;
  1202. continue;
  1203. } else if (altmap)
  1204. return -ENOMEM; /* no fallback */
  1205. } else if (pmd_large(*pmd)) {
  1206. vmemmap_verify((pte_t *)pmd, node, addr, next);
  1207. continue;
  1208. }
  1209. if (vmemmap_populate_basepages(addr, next, node))
  1210. return -ENOMEM;
  1211. }
  1212. return 0;
  1213. }
  1214. int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
  1215. struct vmem_altmap *altmap)
  1216. {
  1217. int err;
  1218. if (boot_cpu_has(X86_FEATURE_PSE))
  1219. err = vmemmap_populate_hugepages(start, end, node, altmap);
  1220. else if (altmap) {
  1221. pr_err_once("%s: no cpu support for altmap allocations\n",
  1222. __func__);
  1223. err = -ENOMEM;
  1224. } else
  1225. err = vmemmap_populate_basepages(start, end, node);
  1226. if (!err)
  1227. sync_global_pgds(start, end - 1);
  1228. return err;
  1229. }
  1230. #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
  1231. void register_page_bootmem_memmap(unsigned long section_nr,
  1232. struct page *start_page, unsigned long nr_pages)
  1233. {
  1234. unsigned long addr = (unsigned long)start_page;
  1235. unsigned long end = (unsigned long)(start_page + nr_pages);
  1236. unsigned long next;
  1237. pgd_t *pgd;
  1238. p4d_t *p4d;
  1239. pud_t *pud;
  1240. pmd_t *pmd;
  1241. unsigned int nr_pmd_pages;
  1242. struct page *page;
  1243. for (; addr < end; addr = next) {
  1244. pte_t *pte = NULL;
  1245. pgd = pgd_offset_k(addr);
  1246. if (pgd_none(*pgd)) {
  1247. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1248. continue;
  1249. }
  1250. get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
  1251. p4d = p4d_offset(pgd, addr);
  1252. if (p4d_none(*p4d)) {
  1253. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1254. continue;
  1255. }
  1256. get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO);
  1257. pud = pud_offset(p4d, addr);
  1258. if (pud_none(*pud)) {
  1259. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1260. continue;
  1261. }
  1262. get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
  1263. if (!boot_cpu_has(X86_FEATURE_PSE)) {
  1264. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1265. pmd = pmd_offset(pud, addr);
  1266. if (pmd_none(*pmd))
  1267. continue;
  1268. get_page_bootmem(section_nr, pmd_page(*pmd),
  1269. MIX_SECTION_INFO);
  1270. pte = pte_offset_kernel(pmd, addr);
  1271. if (pte_none(*pte))
  1272. continue;
  1273. get_page_bootmem(section_nr, pte_page(*pte),
  1274. SECTION_INFO);
  1275. } else {
  1276. next = pmd_addr_end(addr, end);
  1277. pmd = pmd_offset(pud, addr);
  1278. if (pmd_none(*pmd))
  1279. continue;
  1280. nr_pmd_pages = 1 << get_order(PMD_SIZE);
  1281. page = pmd_page(*pmd);
  1282. while (nr_pmd_pages--)
  1283. get_page_bootmem(section_nr, page++,
  1284. SECTION_INFO);
  1285. }
  1286. }
  1287. }
  1288. #endif
  1289. void __meminit vmemmap_populate_print_last(void)
  1290. {
  1291. if (p_start) {
  1292. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1293. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1294. p_start = NULL;
  1295. p_end = NULL;
  1296. node_start = 0;
  1297. }
  1298. }
  1299. #endif